DE112022003052T5 - Isolationsmodul - Google Patents

Isolationsmodul Download PDF

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Publication number
DE112022003052T5
DE112022003052T5 DE112022003052.6T DE112022003052T DE112022003052T5 DE 112022003052 T5 DE112022003052 T5 DE 112022003052T5 DE 112022003052 T DE112022003052 T DE 112022003052T DE 112022003052 T5 DE112022003052 T5 DE 112022003052T5
Authority
DE
Germany
Prior art keywords
light
emitting
resin
emitting element
receiving element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE112022003052.6T
Other languages
German (de)
English (en)
Inventor
Masahiko ARIMURA
Tomoichiro Toyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE112022003052T5 publication Critical patent/DE112022003052T5/de
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F55/00Radiation-sensitive semiconductor devices covered by groups H10F10/00, H10F19/00 or H10F30/00 being structurally associated with electric light sources and electrically or optically coupled thereto
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • H10W70/417Bonding materials between chips and die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/811Multiple chips on leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE112022003052.6T 2021-06-14 2022-06-14 Isolationsmodul Withdrawn DE112022003052T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021-098853 2021-06-14
JP2021098853 2021-06-14
PCT/JP2022/023701 WO2022264981A1 (ja) 2021-06-14 2022-06-14 絶縁モジュール

Publications (1)

Publication Number Publication Date
DE112022003052T5 true DE112022003052T5 (de) 2024-04-04

Family

ID=84526491

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022003052.6T Withdrawn DE112022003052T5 (de) 2021-06-14 2022-06-14 Isolationsmodul

Country Status (5)

Country Link
US (1) US20240113093A1 (https=)
JP (1) JPWO2022264981A1 (https=)
CN (1) CN117480622A (https=)
DE (1) DE112022003052T5 (https=)
WO (1) WO2022264981A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7582156B2 (ja) * 2021-10-27 2024-11-13 三菱電機株式会社 半導体装置及びその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9000675B2 (en) 2010-09-21 2015-04-07 Avago Technologies General Ip (Singapore) Pte. Ltd. Transmitting and receiving digital and analog signals across an isolator

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3418664B2 (ja) * 1996-11-29 2003-06-23 シャープ株式会社 複数型光結合素子及びその製造方法
JP2010153816A (ja) * 2008-11-21 2010-07-08 Renesas Electronics Corp フォトカプラおよびその組立方法
JP2012222224A (ja) * 2011-04-12 2012-11-12 Sharp Corp 光結合装置
JP2013065717A (ja) * 2011-09-16 2013-04-11 Toshiba Corp 半導体装置およびその製造方法
US9236521B2 (en) * 2012-10-30 2016-01-12 Avago Technologies General Ip (Singapore) Pte. Ltd. Optocoupler having lens layer
JP2014135473A (ja) * 2012-12-11 2014-07-24 Renesas Electronics Corp 光結合素子
JP5956968B2 (ja) * 2013-09-13 2016-07-27 株式会社東芝 受光素子および光結合型信号絶縁装置
JP2019012713A (ja) * 2017-06-29 2019-01-24 ルネサスエレクトロニクス株式会社 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9000675B2 (en) 2010-09-21 2015-04-07 Avago Technologies General Ip (Singapore) Pte. Ltd. Transmitting and receiving digital and analog signals across an isolator

Also Published As

Publication number Publication date
WO2022264981A1 (ja) 2022-12-22
US20240113093A1 (en) 2024-04-04
JPWO2022264981A1 (https=) 2022-12-22
CN117480622A (zh) 2024-01-30

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Legal Events

Date Code Title Description
R012 Request for examination validly filed
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0031120000

Ipc: H10F0055000000

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee