DE112008000180T5 - Verfahren und System für die Umsetzung eines Fast-Wakeup eines Flashspeichersystems - Google Patents

Verfahren und System für die Umsetzung eines Fast-Wakeup eines Flashspeichersystems Download PDF

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Publication number
DE112008000180T5
DE112008000180T5 DE112008000180T DE112008000180T DE112008000180T5 DE 112008000180 T5 DE112008000180 T5 DE 112008000180T5 DE 112008000180 T DE112008000180 T DE 112008000180T DE 112008000180 T DE112008000180 T DE 112008000180T DE 112008000180 T5 DE112008000180 T5 DE 112008000180T5
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DE
Germany
Prior art keywords
data structure
information data
volatile memory
memory
future information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE112008000180T
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German (de)
English (en)
Inventor
Menahem Lasser
Avraham Meir
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Western Digital Israel Ltd
Original Assignee
SanDisk IL Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk IL Ltd filed Critical SanDisk IL Ltd
Priority claimed from PCT/IL2008/000062 external-priority patent/WO2008087634A1/en
Publication of DE112008000180T5 publication Critical patent/DE112008000180T5/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)
DE112008000180T 2007-01-18 2008-01-16 Verfahren und System für die Umsetzung eines Fast-Wakeup eines Flashspeichersystems Ceased DE112008000180T5 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US88541207P 2007-01-18 2007-01-18
US60/885,412 2007-01-18
US11/808,452 2007-06-11
US11/808,451 US7769945B2 (en) 2007-01-18 2007-06-11 Method and system for facilitating fast wake-up of a flash memory system
US11/808,451 2007-06-11
US11/808,452 US7721040B2 (en) 2007-01-18 2007-06-11 Method and system for facilitating fast wake-up of a flash memory system
PCT/IL2008/000062 WO2008087634A1 (en) 2007-01-18 2008-01-16 A method and system for facilitating fast wake-up of a flash memory system

Publications (1)

Publication Number Publication Date
DE112008000180T5 true DE112008000180T5 (de) 2009-12-03

Family

ID=39642374

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112008000180T Ceased DE112008000180T5 (de) 2007-01-18 2008-01-16 Verfahren und System für die Umsetzung eines Fast-Wakeup eines Flashspeichersystems

Country Status (5)

Country Link
US (3) US7769945B2 (enExample)
JP (2) JP5351046B2 (enExample)
KR (1) KR101288408B1 (enExample)
DE (1) DE112008000180T5 (enExample)
TW (1) TWI388983B (enExample)

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Publication number Priority date Publication date Assignee Title
US10452561B2 (en) 2016-08-08 2019-10-22 Raytheon Company Central processing unit architecture and methods for high availability systems

Also Published As

Publication number Publication date
JP2010517131A (ja) 2010-05-20
US20100262799A1 (en) 2010-10-14
TW200839516A (en) 2008-10-01
JP2013211056A (ja) 2013-10-10
KR20090106399A (ko) 2009-10-08
US7769945B2 (en) 2010-08-03
JP5351046B2 (ja) 2013-11-27
US20080177935A1 (en) 2008-07-24
KR101288408B1 (ko) 2013-07-22
JP5663060B2 (ja) 2015-02-04
US7721040B2 (en) 2010-05-18
TWI388983B (zh) 2013-03-11
US20080177936A1 (en) 2008-07-24
US8135904B2 (en) 2012-03-13

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Representative=s name: RICHARDT PATENTANWAELTE, 65185 WIESBADEN

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