DE112005001513T5 - Hochschnelle Speichermodule mit In-Spur-Kondensatoren - Google Patents

Hochschnelle Speichermodule mit In-Spur-Kondensatoren Download PDF

Info

Publication number
DE112005001513T5
DE112005001513T5 DE112005001513T DE112005001513T DE112005001513T5 DE 112005001513 T5 DE112005001513 T5 DE 112005001513T5 DE 112005001513 T DE112005001513 T DE 112005001513T DE 112005001513 T DE112005001513 T DE 112005001513T DE 112005001513 T5 DE112005001513 T5 DE 112005001513T5
Authority
DE
Germany
Prior art keywords
capacitors
track
memory modules
speed memory
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE112005001513T
Other languages
English (en)
Inventor
Ge Chang
Hany M Fahmy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE112005001513T5 publication Critical patent/DE112005001513T5/de
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4086—Bus impedance matching, e.g. termination
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Multi Processors (AREA)
DE112005001513T 2004-06-30 2005-06-22 Hochschnelle Speichermodule mit In-Spur-Kondensatoren Withdrawn DE112005001513T5 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/882,459 US7151683B2 (en) 2004-06-30 2004-06-30 High speed memory modules utilizing on-trace capacitors
PCT/US2005/022466 WO2006012290A2 (en) 2004-06-30 2005-06-22 High speed memory modules utilizing on-trace capacitors

Publications (1)

Publication Number Publication Date
DE112005001513T5 true DE112005001513T5 (de) 2007-05-16

Family

ID=34972798

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112005001513T Withdrawn DE112005001513T5 (de) 2004-06-30 2005-06-22 Hochschnelle Speichermodule mit In-Spur-Kondensatoren

Country Status (8)

Country Link
US (1) US7151683B2 (de)
JP (1) JP2008502056A (de)
KR (1) KR100957875B1 (de)
CN (1) CN100478934C (de)
DE (1) DE112005001513T5 (de)
GB (1) GB2430521B (de)
TW (1) TWI313817B (de)
WO (1) WO2006012290A2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7336098B2 (en) * 2004-06-30 2008-02-26 Intel Corporation High speed memory modules utilizing on-pin capacitors
CN101398747A (zh) * 2007-09-28 2009-04-01 鸿富锦精密工业（深圳）有限公司 支持混合式存储器的主机板
JP5669175B2 (ja) * 2010-06-28 2015-02-12 ルネサスエレクトロニクス株式会社 電子機器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940016243A (ko) * 1992-12-26 1994-07-22 김광호 싱글 인 라인 메모리 모듈(simm; single in line memory module)
JP3399630B2 (ja) * 1993-09-27 2003-04-21 株式会社日立製作所 バスシステム
JPH07321828A (ja) * 1994-05-20 1995-12-08 Fujitsu Ltd 電子装置
KR100335501B1 (ko) * 2000-06-09 2002-05-08 윤종용 향상된 데이터 버스 성능을 갖는 메모리 모듈
JP2002025244A (ja) * 2000-07-10 2002-01-25 Mitsubishi Electric Corp メモリモジュール
US6745268B1 (en) * 2000-08-11 2004-06-01 Micron Technology, Lnc. Capacitive multidrop bus compensation
JP3821678B2 (ja) * 2001-09-06 2006-09-13 エルピーダメモリ株式会社 メモリ装置
KR100450677B1 (ko) * 2002-06-04 2004-10-01 삼성전자주식회사 고주파 잡음을 감소시키는 데이터 버스 구조를 가지는반도체 메모리 장치
JP3866618B2 (ja) * 2002-06-13 2007-01-10 エルピーダメモリ株式会社 メモリシステム及びその制御方法
JP4094370B2 (ja) * 2002-07-31 2008-06-04 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
EP1422717B1 (de) * 2002-11-21 2007-07-25 Infineon Technologies AG Speichersystem und Speichersubsystem
US7334141B2 (en) * 2003-04-23 2008-02-19 Dell Products L.P. Method of saving energy in an information handling system by controlling a main converter based on the amount of power drawn by the system
US20050050285A1 (en) * 2003-08-26 2005-03-03 Haas William Robert Memory control system and method for installing new memory

Also Published As

Publication number Publication date
GB2430521A (en) 2007-03-28
JP2008502056A (ja) 2008-01-24
KR20070024671A (ko) 2007-03-02
CN100478934C (zh) 2009-04-15
GB2430521B (en) 2008-05-07
WO2006012290A2 (en) 2006-02-02
TW200617689A (en) 2006-06-01
US7151683B2 (en) 2006-12-19
KR100957875B1 (ko) 2010-05-13
GB0621566D0 (en) 2006-12-27
US20060002165A1 (en) 2006-01-05
WO2006012290A3 (en) 2006-04-06
CN1973275A (zh) 2007-05-30
TWI313817B (en) 2009-08-21

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8125 Change of the main classification

Ipc: G06F 13/16 AFI20070215BHDE

R008 Case pending at federal patent court
R009 Remittal by federal patent court to dpma for new decision or registration
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee