DE10325020B4 - Verfahren zum Versiegeln eines Halbleiterbauelements und damit hergestellte Vorrichtung - Google Patents

Verfahren zum Versiegeln eines Halbleiterbauelements und damit hergestellte Vorrichtung Download PDF

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Publication number
DE10325020B4
DE10325020B4 DE10325020A DE10325020A DE10325020B4 DE 10325020 B4 DE10325020 B4 DE 10325020B4 DE 10325020 A DE10325020 A DE 10325020A DE 10325020 A DE10325020 A DE 10325020A DE 10325020 B4 DE10325020 B4 DE 10325020B4
Authority
DE
Germany
Prior art keywords
seal
cover
profile structure
contraption
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10325020A
Other languages
German (de)
English (en)
Other versions
DE10325020A1 (de
Inventor
Frank S. Cupertino Geefay
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies International Sales Pte Ltd
Original Assignee
Avago Technologies Wireless IP Singapore Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Avago Technologies Wireless IP Singapore Pte Ltd filed Critical Avago Technologies Wireless IP Singapore Pte Ltd
Publication of DE10325020A1 publication Critical patent/DE10325020A1/de
Application granted granted Critical
Publication of DE10325020B4 publication Critical patent/DE10325020B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Micromachines (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE10325020A 2002-10-22 2003-06-03 Verfahren zum Versiegeln eines Halbleiterbauelements und damit hergestellte Vorrichtung Expired - Fee Related DE10325020B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/277,479 US6919222B2 (en) 2002-10-22 2002-10-22 Method for sealing a semiconductor device and apparatus embodying the method
US10/277,479 2002-10-22

Publications (2)

Publication Number Publication Date
DE10325020A1 DE10325020A1 (de) 2004-05-13
DE10325020B4 true DE10325020B4 (de) 2007-10-31

Family

ID=29711730

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10325020A Expired - Fee Related DE10325020B4 (de) 2002-10-22 2003-06-03 Verfahren zum Versiegeln eines Halbleiterbauelements und damit hergestellte Vorrichtung

Country Status (4)

Country Link
US (2) US6919222B2 (enExample)
JP (1) JP2004146808A (enExample)
DE (1) DE10325020B4 (enExample)
GB (1) GB2396055B (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7343535B2 (en) 2002-02-06 2008-03-11 Avago Technologies General Ip Dte Ltd Embedded testing capability for integrated serializer/deserializers
US20050063431A1 (en) * 2003-09-19 2005-03-24 Gallup Kendra J. Integrated optics and electronics
US6953990B2 (en) * 2003-09-19 2005-10-11 Agilent Technologies, Inc. Wafer-level packaging of optoelectronic devices
US20050213995A1 (en) * 2004-03-26 2005-09-29 Myunghee Lee Low power and low jitter optical receiver for fiber optic communication link
JP2006344902A (ja) * 2005-06-10 2006-12-21 Fujifilm Holdings Corp 半導体モジュール
US7161283B1 (en) * 2005-06-30 2007-01-09 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Method for placing metal contacts underneath FBAR resonators
US20070004079A1 (en) * 2005-06-30 2007-01-04 Geefay Frank S Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips
US7544542B2 (en) * 2006-08-07 2009-06-09 Advanced Micro Devices, Inc. Reduction of damage to thermal interface material due to asymmetrical load
US7667324B2 (en) * 2006-10-31 2010-02-23 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Systems, devices, components and methods for hermetically sealing electronic modules and packages
US20080231600A1 (en) 2007-03-23 2008-09-25 Smith George E Near-Normal Incidence Optical Mouse Illumination System with Prism
US9520856B2 (en) 2009-06-24 2016-12-13 Avago Technologies General Ip (Singapore) Pte. Ltd. Acoustic resonator structure having an electrode with a cantilevered portion
US9203374B2 (en) 2011-02-28 2015-12-01 Avago Technologies General Ip (Singapore) Pte. Ltd. Film bulk acoustic resonator comprising a bridge
US9425764B2 (en) 2012-10-25 2016-08-23 Avago Technologies General Ip (Singapore) Pte. Ltd. Accoustic resonator having composite electrodes with integrated lateral features
US9099983B2 (en) 2011-02-28 2015-08-04 Avago Technologies General Ip (Singapore) Pte. Ltd. Bulk acoustic wave resonator device comprising a bridge in an acoustic reflector
US9444426B2 (en) 2012-10-25 2016-09-13 Avago Technologies General Ip (Singapore) Pte. Ltd. Accoustic resonator having integrated lateral feature and temperature compensation feature
US8922302B2 (en) 2011-08-24 2014-12-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Acoustic resonator formed on a pedestal
US9667218B2 (en) 2012-01-30 2017-05-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Temperature controlled acoustic resonator comprising feedback circuit
US9154103B2 (en) 2012-01-30 2015-10-06 Avago Technologies General Ip (Singapore) Pte. Ltd. Temperature controlled acoustic resonator
US9667220B2 (en) 2012-01-30 2017-05-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Temperature controlled acoustic resonator comprising heater and sense resistors
US9608592B2 (en) 2014-01-21 2017-03-28 Avago Technologies General Ip (Singapore) Pte. Ltd. Film bulk acoustic wave resonator (FBAR) having stress-relief
US9793874B2 (en) 2014-05-28 2017-10-17 Avago Technologies General Ip Singapore (Singapore) Pte. Ltd. Acoustic resonator with electrical interconnect disposed in underlying dielectric
CN111082768B (zh) * 2018-10-19 2023-10-27 天津大学 封装结构及具有其的半导体器件、具有半导体器件的电子设备
CN111245385B (zh) * 2019-12-04 2025-03-14 天津大学 芯片封装模块及封装方法及具有该模块的电子装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4684763A (en) * 1984-05-28 1987-08-04 Koto Electric Co., Ltd. Hermetically sealable package for electronic component
US5388443A (en) * 1993-06-24 1995-02-14 Manaka; Junji Atmosphere sensor and method for manufacturing the sensor
US5668033A (en) * 1995-05-18 1997-09-16 Nippondenso Co., Ltd. Method for manufacturing a semiconductor acceleration sensor device
EP1199744A1 (en) * 2000-10-19 2002-04-24 Agilent Technologies, Inc. (a Delaware corporation) Microcap wafer-level package
US20020106862A1 (en) * 2001-02-02 2002-08-08 Jordan Larry L. Glass frit wafer bonding process and packages formed thereby

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5821175A (en) * 1988-07-08 1998-10-13 Cauldron Limited Partnership Removal of surface contaminants by irradiation using various methods to achieve desired inert gas flow over treated surface
US5270571A (en) * 1991-10-30 1993-12-14 Amdahl Corporation Three-dimensional package for semiconductor devices
US6168948B1 (en) * 1995-06-29 2001-01-02 Affymetrix, Inc. Miniaturized genetic analysis systems and methods
JPH0969585A (ja) 1995-08-31 1997-03-11 Mitsubishi Electric Corp 電子部品搭載装置およびその気密封止方法
US6281573B1 (en) * 1998-03-31 2001-08-28 International Business Machines Corporation Thermal enhancement approach using solder compositions in the liquid state
US6168947B1 (en) * 1999-02-11 2001-01-02 Food Industry Research And Development Institute Nematophagous fungus Esteya vermicola
AU2002214013A1 (en) 2000-10-11 2002-04-22 Telefonaktiebolager L M Ericsson (Publ) A method of making a gasket on a pcb and a pcb
JP2003086355A (ja) 2001-09-05 2003-03-20 Kiko Kenji Kagi Kofun Yugenkoshi 有機ｅｌ素子の封止構造並びに封止方法及び封止装置
US6933537B2 (en) 2001-09-28 2005-08-23 Osram Opto Semiconductors Gmbh Sealing for OLED devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4684763A (en) * 1984-05-28 1987-08-04 Koto Electric Co., Ltd. Hermetically sealable package for electronic component
US5388443A (en) * 1993-06-24 1995-02-14 Manaka; Junji Atmosphere sensor and method for manufacturing the sensor
US5668033A (en) * 1995-05-18 1997-09-16 Nippondenso Co., Ltd. Method for manufacturing a semiconductor acceleration sensor device
EP1199744A1 (en) * 2000-10-19 2002-04-24 Agilent Technologies, Inc. (a Delaware corporation) Microcap wafer-level package
US20020106862A1 (en) * 2001-02-02 2002-08-08 Jordan Larry L. Glass frit wafer bonding process and packages formed thereby

Also Published As

Publication number Publication date
GB0324538D0 (en) 2003-11-26
JP2004146808A (ja) 2004-05-20
GB2396055B (en) 2006-06-14
US6919222B2 (en) 2005-07-19
US6836013B2 (en) 2004-12-28
GB2396055A (en) 2004-06-09
US20040077126A1 (en) 2004-04-22
US20040077127A1 (en) 2004-04-22
DE10325020A1 (de) 2004-05-13

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LT

8328 Change in the person/name/address of the agent

Representative=s name: DILG HAEUSLER SCHINDELMANN PATENTANWALTSGESELLSCHA

8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: DILG HAEUSLER SCHINDELMANN PATENTANWALTSGESELLSCHA

R081 Change of applicant/patentee

Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE., SG

Free format text: FORMER OWNER: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD., SINGAPORE, SG

Effective date: 20130529

R082 Change of representative

Representative=s name: DILG HAEUSLER SCHINDELMANN PATENTANWALTSGESELL, DE

Effective date: 20130529

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee