DE10323007B4 - Halbleiteranordnung - Google Patents

Halbleiteranordnung Download PDF

Info

Publication number
DE10323007B4
DE10323007B4 DE10323007A DE10323007A DE10323007B4 DE 10323007 B4 DE10323007 B4 DE 10323007B4 DE 10323007 A DE10323007 A DE 10323007A DE 10323007 A DE10323007 A DE 10323007A DE 10323007 B4 DE10323007 B4 DE 10323007B4
Authority
DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10323007A
Other languages
English (en)
Other versions
DE10323007A1 (de
Inventor
Nikolaus Bott
Oliver Haeberlen
Manfred Kotek
Joost Larik
Josef Maerz
Ralf Otremba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE10323007A priority Critical patent/DE10323007B4/de
Priority to US10/850,157 priority patent/US7233059B2/en
Publication of DE10323007A1 publication Critical patent/DE10323007A1/de
Application granted granted Critical
Publication of DE10323007B4 publication Critical patent/DE10323007B4/de
Priority to US11/733,930 priority patent/US7498194B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3192—Multilayer coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE10323007A 2003-05-21 2003-05-21 Halbleiteranordnung Expired - Fee Related DE10323007B4 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10323007A DE10323007B4 (de) 2003-05-21 2003-05-21 Halbleiteranordnung
US10/850,157 US7233059B2 (en) 2003-05-21 2004-05-20 Semiconductor arrangement
US11/733,930 US7498194B2 (en) 2003-05-21 2007-04-11 Semiconductor arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10323007A DE10323007B4 (de) 2003-05-21 2003-05-21 Halbleiteranordnung

Publications (2)

Publication Number Publication Date
DE10323007A1 DE10323007A1 (de) 2004-12-30
DE10323007B4 true DE10323007B4 (de) 2005-10-20

Family

ID=33482075

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10323007A Expired - Fee Related DE10323007B4 (de) 2003-05-21 2003-05-21 Halbleiteranordnung

Country Status (2)

Country Link
US (2) US7233059B2 (de)
DE (1) DE10323007B4 (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4947234A (en) * 1986-09-23 1990-08-07 Siemens Aktiengesellschaft Semiconductor component with power MOSFET and control circuit

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6784023B2 (en) * 1996-05-20 2004-08-31 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US6130116A (en) * 1996-12-13 2000-10-10 Tessera, Inc. Method of encapsulating a microelectronic assembly utilizing a barrier
TW378345B (en) * 1997-01-22 2000-01-01 Hitachi Ltd Resin package type semiconductor device and manufacturing method thereof
US5891753A (en) * 1997-01-24 1999-04-06 Micron Technology, Inc. Method and apparatus for packaging flip chip bare die on printed circuit boards
JP2000022039A (ja) * 1998-07-06 2000-01-21 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
US6569710B1 (en) * 1998-12-03 2003-05-27 International Business Machines Corporation Panel structure with plurality of chip compartments for providing high volume of chip modules
US6630735B1 (en) * 1999-04-09 2003-10-07 Digirad Corporation Insulator/metal bonding island for active-area silver epoxy bonding
US6259155B1 (en) * 1999-04-12 2001-07-10 International Business Machines Corporation Polymer enhanced column grid array
JP2001351929A (ja) * 2000-06-09 2001-12-21 Hitachi Ltd 半導体装置およびその製造方法
SG99939A1 (en) * 2000-08-11 2003-11-27 Casio Computer Co Ltd Semiconductor device
DE10047135B4 (de) * 2000-09-22 2006-08-24 Infineon Technologies Ag Verfahren zum Herstellen eines Kunststoff umhüllten Bauelementes und Kunststoff umhülltes Bauelement
US6518675B2 (en) * 2000-12-29 2003-02-11 Samsung Electronics Co., Ltd. Wafer level package and method for manufacturing the same
US6686664B2 (en) * 2001-04-30 2004-02-03 International Business Machines Corporation Structure to accommodate increase in volume expansion during solder reflow
JP2003197856A (ja) * 2001-12-28 2003-07-11 Oki Electric Ind Co Ltd 半導体装置
JP3775499B2 (ja) * 2002-01-08 2006-05-17 株式会社リコー 半導体装置及びその製造方法、並びにｄｃ−ｄｃコンバータ
US6791168B1 (en) * 2002-07-10 2004-09-14 Micron Technology, Inc. Semiconductor package with circuit side polymer layer and wafer level fabrication method
US20040102022A1 (en) * 2002-11-22 2004-05-27 Tongbi Jiang Methods of fabricating integrated circuitry
US6833628B2 (en) * 2002-12-17 2004-12-21 Delphi Technologies, Inc. Mutli-chip module
TWI269420B (en) * 2005-05-03 2006-12-21 Megica Corp Stacked chip package and process thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4947234A (en) * 1986-09-23 1990-08-07 Siemens Aktiengesellschaft Semiconductor component with power MOSFET and control circuit

Also Published As

Publication number Publication date
DE10323007A1 (de) 2004-12-30
US7233059B2 (en) 2007-06-19
US20050012215A1 (en) 2005-01-20
US7498194B2 (en) 2009-03-03
US20070178624A1 (en) 2007-08-02

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee