DE10222964B4 - Process for forming housings in electronic components and hermetically encapsulated electronic components - Google Patents

Process for forming housings in electronic components and hermetically encapsulated electronic components Download PDF

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Publication number
DE10222964B4
DE10222964B4 DE10222964A DE10222964A DE10222964B4 DE 10222964 B4 DE10222964 B4 DE 10222964B4 DE 10222964 A DE10222964 A DE 10222964A DE 10222964 A DE10222964 A DE 10222964A DE 10222964 B4 DE10222964 B4 DE 10222964B4
Authority
DE
Germany
Prior art keywords
substrate
glass
layer
vapor deposition
plastic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE10222964A
Other languages
German (de)
Other versions
DE10222964A1 (en
Inventor
Jürgen Dr. Leib
Dietrich Dipl.-Phys. Mund
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Schott AG
Original Assignee
Schott Glaswerke AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schott Glaswerke AG filed Critical Schott Glaswerke AG
Priority to DE10222958A priority Critical patent/DE10222958B4/en
Priority to DE10222609A priority patent/DE10222609B4/en
Priority to DE10222964A priority patent/DE10222964B4/en
Priority to IL16429003A priority patent/IL164290A0/en
Priority to CNA038085690A priority patent/CN1647276A/en
Priority to CNB038085836A priority patent/CN100387749C/en
Priority to PCT/EP2003/003873 priority patent/WO2003086958A2/en
Priority to AU2003227626A priority patent/AU2003227626A1/en
Priority to JP2003585174A priority patent/JP2005528782A/en
Priority to CNB038085410A priority patent/CN1329285C/en
Priority to CA002479823A priority patent/CA2479823A1/en
Priority to JP2003583927A priority patent/JP2005527459A/en
Priority to CA002480797A priority patent/CA2480797A1/en
Priority to DE50309735T priority patent/DE50309735D1/en
Priority to AU2003245875A priority patent/AU2003245875A1/en
Priority to US10/511,334 priority patent/US7825029B2/en
Priority to EP03737955A priority patent/EP1495153B1/en
Priority to US10/511,488 priority patent/US20060051584A1/en
Priority to CN038133024A priority patent/CN1659720A/en
Priority to JP2003584357A priority patent/JP2005528780A/en
Priority to CA002485022A priority patent/CA2485022A1/en
Priority to CA002505014A priority patent/CA2505014A1/en
Priority to TW092108722A priority patent/TW200407446A/en
Priority to EP03746297.5A priority patent/EP1495493B1/en
Priority to US10/511,566 priority patent/US7863200B2/en
Priority to KR10-2004-7016634A priority patent/KR20040111528A/en
Priority to PCT/EP2003/003907 priority patent/WO2003088347A2/en
Priority to PCT/EP2003/003884 priority patent/WO2003088340A2/en
Priority to AU2003245876A priority patent/AU2003245876A1/en
Priority to JP2003585179A priority patent/JP2005528783A/en
Priority to PCT/EP2003/003883 priority patent/WO2003088370A2/en
Priority to KR1020047016629A priority patent/KR100679345B1/en
Priority to IL16430403A priority patent/IL164304A0/en
Priority to AU2003233974A priority patent/AU2003233974A1/en
Priority to KR1020047016630A priority patent/KR100616126B1/en
Priority to CA002480854A priority patent/CA2480854A1/en
Priority to KR1020117025576A priority patent/KR101178935B1/en
Priority to US10/511,558 priority patent/US7495348B2/en
Priority to KR1020047016632A priority patent/KR100789977B1/en
Priority to JP2003585192A priority patent/JP2005527076A/en
Priority to PCT/EP2003/003882 priority patent/WO2003087424A1/en
Priority to KR1020047016631A priority patent/KR100636414B1/en
Priority to AU2003232469A priority patent/AU2003232469A1/en
Priority to EP03727305.9A priority patent/EP1494965B1/en
Priority to CNB038085682A priority patent/CN100397593C/en
Priority to US10/511,557 priority patent/US7396741B2/en
Priority to IL16417103A priority patent/IL164171A0/en
Priority to EP03727306A priority patent/EP1495501A2/en
Priority to CA002480691A priority patent/CA2480691A1/en
Priority to CA002480737A priority patent/CA2480737A1/en
Priority to CNB03808564XA priority patent/CN100359653C/en
Priority to CNA038085844A priority patent/CN1646722A/en
Priority to AT03737955T priority patent/ATE411407T1/en
Priority to KR1020047016642A priority patent/KR100942038B1/en
Priority to EP03725032.1A priority patent/EP1495491B1/en
Priority to DE50310646T priority patent/DE50310646D1/en
Priority to PCT/EP2003/003881 priority patent/WO2003088354A2/en
Priority to AT03737956T priority patent/ATE393839T1/en
Priority to AU2003250326A priority patent/AU2003250326A1/en
Priority to AU2003233973A priority patent/AU2003233973A1/en
Priority to JP2003585167A priority patent/JP2005527112A/en
Priority to PCT/EP2003/003872 priority patent/WO2003087423A1/en
Priority to EP03746159.7A priority patent/EP1502293B1/en
Priority to JP2003584356A priority patent/JP2006503976A/en
Priority to EP03737956A priority patent/EP1495154B1/en
Priority to US10/511,315 priority patent/US7326446B2/en
Publication of DE10222964A1 publication Critical patent/DE10222964A1/en
Application granted granted Critical
Publication of DE10222964B4 publication Critical patent/DE10222964B4/en
Priority to IL16430004A priority patent/IL164300A0/en
Priority to IL16430104A priority patent/IL164301A0/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03B—MANUFACTURE, SHAPING, OR SUPPLEMENTARY PROCESSES
    • C03B19/00—Other methods of shaping glass
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C14/00—Glass compositions containing a non-glass component, e.g. compositions containing fibres, filaments, whiskers, platelets, or the like, dispersed in a glass matrix
    • C03C14/006—Glass compositions containing a non-glass component, e.g. compositions containing fibres, filaments, whiskers, platelets, or the like, dispersed in a glass matrix the non-glass component being in the form of microcrystallites, e.g. of optically or electrically active material
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/02—Surface treatment of glass, not in the form of fibres or filaments, by coating with glass
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C4/00—Compositions for glass with special properties
    • C03C4/12—Compositions for glass with special properties for luminescent glass; for fluorescent glass
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/10—Glass or silica
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02145—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02161—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing more than one metal element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2214/00—Nature of the non-vitreous component
    • C03C2214/16—Microcrystallites, e.g. of optically or electrically active material
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2217/00—Coatings on glass
    • C03C2217/20—Materials for coating a single layer on glass
    • C03C2217/21—Oxides
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2217/00—Coatings on glass
    • C03C2217/70—Properties of coatings
    • C03C2217/77—Coatings having a rough surface
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2218/00—Methods for coating glass
    • C03C2218/10—Deposition methods
    • C03C2218/15—Deposition methods from the vapour phase
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2218/00—Methods for coating glass
    • C03C2218/30—Aspects of methods for coating glass not covered above
    • C03C2218/32—After-treatment
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2218/00—Methods for coating glass
    • C03C2218/30—Aspects of methods for coating glass not covered above
    • C03C2218/32—After-treatment
    • C03C2218/328—Partly or completely removing a coating
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2218/00—Methods for coating glass
    • C03C2218/30—Aspects of methods for coating glass not covered above
    • C03C2218/32—After-treatment
    • C03C2218/328—Partly or completely removing a coating
    • C03C2218/33—Partly or completely removing a coating by etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2218/00—Methods for coating glass
    • C03C2218/30—Aspects of methods for coating glass not covered above
    • C03C2218/355—Temporary coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894—Materials of the insulating layers or coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
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Abstract

Verfahren zur Gehäusebildung bei elektronischen Bauteilen, insbesondere Sensoren, integrierte Schaltungen und optoelektronische Bauelemente; mit folgenden Schritten:
Bereitstellen eines Substrats (1), das einen oder mehrere Bereiche zur Bildung von Halbleiterstrukturen (2) sowie von Anschlussstrukturen (3) aufweist, wobei wenigstens eine erste Substratseite (1a) zu verkapseln ist;
Bereitstellen einer Auf dampfglasquelle (20) zur Erzeugung wenigstens eines binären Glassystems;
Anordnen der ersten Substratseite (1a) relativ zur Aufdampfglasquelle derart, dass die erste Substratseite (1a) bedampft werden kann;
Betrieb der Aufdampfglasquelle (20) solange, bis die erste Substratseite (1a) eine Glasschicht (4) trägt, welche eine Dicke im Bereich von 1 bis 1000 μm aufweist.Methods for forming housings in electronic components, in particular sensors, integrated circuits and optoelectronic components; with the following steps:
Providing a substrate (1) which has one or more regions for forming semiconductor structures (2) and connection structures (3), at least one first substrate side (1a) being encapsulated;
Providing an on vapor glass source (20) for generating at least one binary glass system;
Arranging the first substrate side (1a) relative to the vapor deposition glass source such that the first substrate side (1a) can be vapor-deposited;
Operation of the vapor deposition glass source (20) until the first substrate side (1a) carries a glass layer (4) which has a thickness in the range from 1 to 1000 μm.

Figure 00000001
Figure 00000001

Description

Die Erfindung bezieht sich auf ein Verfahren zur Gehäusebildung bei elektronischen Bauteilen sowie auf so hermetisch verkapselte elektronische Bauteile, insbesondere Sensoren, integrierte Schaltungen und optoelektronische Bauelemente.The invention relates to a Enclosure formation process for electronic components as well as hermetically encapsulated electronic components, in particular sensors, integrated circuits and optoelectronic components.

Zur Kapselung von integrierten Schaltungen und optoelektronischen Bauelementen ist es aus „Appl. Phys. Letters", 65, S. 2922 (1994) bekannt, ein dünnes Glasplättchen mittels einer organischen Klebeschicht auf das Bauteil zu kleben und so die empfindlichen Halbleiterstrukturen abzudecken und zu schützen. Diese Bauweise hat den Nachteil, dass mit der Zeit Wasser in die organische Klebeschicht eindiffundieren kann, welches dann bis zu den Halbleiterstrukturen gelangen kann und diese beeinträchtigt. Die Klebeschichten können ferner durch UV-Bestrahlung altern, was vor allem für elektrooptische Bauteile schädlich ist.For encapsulating integrated circuits and optoelectronic components, it is from “Appl. Phys. Letters ", 65, p. 2922 (1994) known a thin glass flakes to be glued to the component using an organic adhesive layer and so cover and close the sensitive semiconductor structures protect. The disadvantage of this design is that, over time, water gets into the can diffuse organic adhesive layer, which then up to can reach the semiconductor structures and impair them. The adhesive layers can also by UV radiation age, what especially for electro-optical components harmful is.

Anstelle organischer Klebemittel ist auch die Verwendung eines niedrig schmelzenden Glaslotes beispielsweise aus DE 3934971 C1 bekannt. Bekannte Verfahren zum Auftragen eines Glaslotes umfassen zum Beispiel das Aufsprühen, das Aufsputtern bzw. die Siebdruck- und Dispensertechnologie.Instead of organic adhesives, the use of a low-melting glass solder, for example, is also out DE 3934971 C1 known. Known methods for applying a glass solder include, for example, spraying, sputtering or screen printing and dispensing technology.

Aus DE 692 14 087 T2 ist bekannt, ein Halbleiterbauelement in einem Sputterverfahren mit SiO2 zu beschichten und auf diese Schicht zum chemisch-mechanischen Polieren eine diamant- oder diamantähnliche Schicht aufzubringen.Out DE 692 14 087 T2 It is known to coat a semiconductor component with SiO 2 in a sputtering process and to apply a diamond or diamond-like layer to this layer for chemical mechanical polishing.

Das Aufbringen lichtdurchlässiger Schichten und Mikrolinsen auf optoelektronische Bauteile ist aus EP 0 875 940 A2 bekannt.The application of translucent layers and microlenses to optoelectronic components is over EP 0 875 940 A2 known.

Aus DE 692 27 086 T2 ist ein Verfahren zur Herstellung einer dielektrischen Borphosphosilikat-Glas-Zwischenschicht einer Halbleitervorrichtung bekannt, bei dem die Aufschmelzung bei einer Temperatur unter 850°C erfolgt und das außerdem eine Oberflächenbehandlung durch Plasmabearbeitung vorsieht.Out DE 692 27 086 T2 A method for producing a dielectric borophosphosilicate-glass intermediate layer of a semiconductor device is known, in which the melting takes place at a temperature below 850 ° C. and which also provides a surface treatment by plasma processing.

Die Prozesstemperatur beim Aufschmelzen einer Glaslotschicht ist jedoch höher als T = 300°C, so dass temperaturempfindliche Halbleiterstrukturen nicht verkapselt werden können.The process temperature when melting a glass solder layer is higher than T = 300 ° C, so that temperature-sensitive semiconductor structures are not encapsulated can.

Der Erfindung liegt deshalb die Aufgabe zugrunde, ein Verfahren zur Kapselung von elektronischen Bauteilen anzugeben, mit dem eine weitgehend wasserdiffusionsfeste Kapselung bei mäßigen Temperaturen unterhalb von 300°C, vorzugsweise unterhalb 150°C erzielt werden kann.The object of the invention is therefore is based on a process for encapsulating electronic components specify with which a largely water-diffusion-resistant encapsulation at moderate temperatures below from 300 ° C, preferably below 150 ° C can be achieved.

Die gestellte Aufgabe wird aufgrund der Maßnahmen des Anspruches 1 gelöst und durch die weiteren Maßnahmen der abhängigen Ansprüche ausgestaltet und weiterentwickelt. Anspruch 14 betrifft ein erfindungsgemäß hergestelltes elektronisches Bauteil.The task is based on of measures of claim 1 solved and through the further measures the dependent Expectations designed and developed. Claim 14 relates to a manufactured according to the invention electronic component.

Das erfindungsgemäße Verfahren der Kapselung mit Aufdampfglas kann bereits angewendet werden, wenn das elektronische Bauteil noch in der Herstellung begriffen ist. Die Verstärkung des Substrats des elektronischen Bauteils durch die aufgedampfte Glasschicht wird ausgenutzt, das Substrat zu stabilisieren, während auf das Substrat von der nicht eingekapselten Seite her eingewirkt wird. Das ansonsten fertig hergestellte elektronische Bauteil kann auch von der Anschlußseite her – unter Freilassung der Anschlüsse – eingekapselt werden.The encapsulation method according to the invention with vapor deposition glass can already be applied if the electronic Component is still in production. The reinforcement of the Substrate of the electronic component through the evaporated glass layer is exploited to stabilize the substrate while on the substrate is acted on from the non-encapsulated side. The otherwise finished electronic component can also from the connection side forth - under Release of the connections - to be encapsulated.

Je nach den Anforderungen kann die Dicke der aufgedampften Glasschicht 1 bis 1000 μm betragen. Wenn es nur auf hermetischen Abschluss des zu schützenden Bauteils ankommt, liegt die bevorzugte Glasschichtdicke im Bereich zwischen 1 und 50 μm. Für stärkere Belastungen wird die Glasschichtdicke entsprechend dicker gewählt, wobei ein bevorzugter Bereich der Glasschichtdicke zwischen 50 und 200 μm liegt. Ein Aufbau von Mehrfachschichten auch in Kombination mit anderen Materialien ist ebenso möglich. Es ist auch möglich, die Glasschicht mit einer aufgebrachten Kunststoffschicht zu kombinieren, um zu einer strukturellen Verstärkung des elektronischen Bauteils zu gelangen.Depending on the requirements, the The thickness of the vapor-deposited glass layer is 1 to 1000 μm. If only it was on hermetic seal of the component to be protected arrives the preferred glass layer thickness in the range between 1 and 50 μm. For higher loads the glass layer thickness is chosen correspondingly thicker, whereby a preferred range of the glass layer thickness is between 50 and 200 μm. A structure of multiple layers in combination with others Materials are also possible. It is also possible, to combine the glass layer with an applied plastic layer, to structural reinforcement of the electronic component.

Es gibt verschiedene Möglichkeiten, Glas aufzudampfen. Bevorzugt wird die Erzeugung des Glasdampfes mittels Elektronenstrahl aus einem Glasvorrats-Target. Es können Aufdampfraten von mehr als 4μm/min. erzeugt werden und das hergestellte Glas scheidet sich mit festem Verbund auf der Oberfläche des Substrats ab, ohne dass es eines erhöhten H2O-Gehalt zwecks Bindungswirkung bedarf wie bei niedrig schmelzendem Glaslot. Als Aufdampfglas wird ein Borosilikatglas mit Anteilen von Aluminiumoxid und Alkalioxid bevorzugt. Dieses Glas hat außerdem einen Wärmeausdehnungskoeffizienten, der dem des Substrats von üblichen Halbleiterstrukturen nahekommt, bzw. durch entsprechende Abwandlung in den Komponenten an den Wärmeausdehnungskoeffizienten des Substrats angepasst werden kann. Es kann Aufdampfglas anderer Zusammensetzung verwendet werden, insbesondere in mehreren Schichten übereinander, wobei die Gläser unterschiedliche Eigenschaften hinsichtlich Brechungsindex, Dichte, Härte usw. besitzen können.There are various ways of vapor deposition on glass. The generation of the glass vapor by means of an electron beam from a glass stock target is preferred. Evaporation rates of more than 4 μm / min. are produced and the glass produced is deposited with a firm bond on the surface of the substrate without requiring an increased H 2 O content for the binding effect, as in the case of low-melting glass solder. A borosilicate glass with proportions of aluminum oxide and alkali oxide is preferred as the vapor deposition glass. This glass also has a coefficient of thermal expansion that approximates that of the substrate of conventional semiconductor structures, or can be adapted to the coefficient of thermal expansion of the substrate by appropriate modification in the components. Evaporating glass of a different composition can be used, in particular in several layers one above the other, the glasses having different properties in terms of refractive index, density, hardness, etc.

Weiterhin kann durch geeignete Materialkombination das Aufbringen einer Mischschicht aus anorganischen und organischen Bestandteilen realisiert werden. Diese Mischschicht ist durch eine Verringerung der Sprödigkeit gekennzeichnet.Furthermore, the application of a mixed layer of anorga can be achieved by a suitable material combination niche and organic components can be realized. This mixed layer is characterized by a reduction in brittleness.

Wenn die Glasschicht auf einer ersten Seite des Substrats des elektronischen Bauteils aufgebracht wird, während dieses elektronische Bauteil noch nicht fertig hergestellt ist, kann es zur Handhabung bei dieser Fertigherstellung zweckmäßig sein, eine das Bauteil verstärkende Kunststoffschicht über der Glasschicht anzubringen. In diesem Fall wird die Glasschicht in einer Dicke erzeugt, die für die Abkapselung bzw. den hermetischen Abschluss gegenüber eindringenden diffundierenden Stoffen genügt, während die Kunststoffschicht in einer Dicke erzeugt wird, wie sie für die Stabilisierung bei der Weiterverarbeitung des Bauteils benötigt wird.If the layer of glass on a first Side of the substrate of the electronic component is applied, while this electronic component is not yet finished, it may be expedient to handle this finished product, a reinforcing component Plastic layer over to attach the glass layer. In this case the glass layer produced in a thickness that for the encapsulation or the hermetic seal against penetrating diffusing substances are sufficient, while the plastic layer is created in a thickness as used for stabilization is required for further processing of the component.

In einem solchen Fall kann Material von der zweiten nicht gekapselten Substratseite abgetragen werden, so dass Anschlüsse an das Bauteil hergestellt werden können, die von der Unterseite in das Bauteil hineinreichen und somit durch das Bauteil selbst geschützt sind, wenn dieses endgültig an seinem Einsatzort eingebaut wird. Dies ist vor allem im Falle von Sensoren bedeutsam.In such a case, material are removed from the second unencapsulated substrate side, so connections to the component can be made from the bottom reach into the component and thus through the component itself protected are when this is final is installed at its location. This is especially the case of sensors significant.

Die Erfindung wird anhand der Zeichnungen beschrieben.The invention is based on the drawings described.

Dabei zeigt:It shows:

1 einen Abschnitt eines Wafers mit einer aufgedampften Glasschicht, 1 a section of a wafer with an evaporated glass layer,

2 einen Waferabschnitt mit Glas und Kunststoffschicht, 2 a wafer section with glass and plastic layer,

3 die Herstellung von Anschlüssen an den Wafer, 3 the production of connections to the wafer,

4 die zusätzliche Kunststoff-Passivierung der Waferunterseite, 4 the additional plastic passivation of the underside of the wafer,

5 die Beschichtung der Waferunterseite mit Aufdampfglas, 5 coating the underside of the wafer with vapor deposition glass,

6 das Anbringen eines Ball Grid Arrays an den Wafer gemäß 5, 6 the attachment of a ball grid array to the wafer in accordance with 5 .

7 eine weitere Anbringungsart des Ball Grid Arrays, 7 another way of attaching the ball grid array,

8 die Kapselung der Unterseite eines Wafers, 8th encapsulating the bottom of a wafer,

9 das Anbringen der Ball Grid Arrays am Wafer der 8, sowie 9 attaching the ball grid arrays to the wafer 8th , such as

10 ein Schema einer Verdampfungsanordnung. 10 a schematic of an evaporation arrangement.

10 zeigt die Anordnung eines Substrats 1 zu einer Aufdampfglasquelle 20. Diese besteht aus einem Elektronenstrahlerzeuger 21, einer Strahlumlenkeinrichtung 22 und einem Glastarget 23, das von einem Elektronenstrahl 24 getroffen wird. An der Auftreffstelle des Elektronenstrahls verdampft das Glas und schlägt sich an der ersten Seite 1a des Substrats 1 nieder. Um das Glas des Targets 23 möglichst gleichmäßig verdampfen zu lassen, wird das Target gedreht und der Strahl 24 gewobbelt. 10 shows the arrangement of a substrate 1 to a vapor deposition glass source 20 , This consists of an electron beam generator 21 , a beam deflector 22 and a glass target 23 by an electron beam 24 is hit. At the point of impact of the electron beam, the glass evaporates and hits the first side 1a of the substrate 1 low. Around the glass of the target 23 To evaporate as evenly as possible, the target is rotated and the jet 24 wobbled.

Wegen näherer Einzelheiten des möglichen Substrats 1 wird Bezug auf 1 genommen. Ein Siliziumwafer als das Substrat 1 weist Bereiche 2 mit Halbleiterstrukturen sowie Bereiche 3 mit Anschlußstrukturen auf, die hier als Bond Pad, beispielsweise aus Aluminium, ausgebildet sind. Der Siliziumwafer stellt ein Substrat mit einer Oberflächenrauhigkeit < 5μm dar. Die Oberseite 1a des Substrats liegt der Unterseite 1b gegenüber. Auf die Oberseite 1a ist eine Glasschicht 4 niedergeschlagen worden. Dieser Glastyp kann durch Einwirkung des Elektronenstrahls 24 weitgehend verdampft werden, wobei man in evakuierter Umgebung mit 10–5 mbar Restdruck und einer BIAS Temperatur während der Verdampfung von 100°C arbeitet. Unter diesen Bedingungen wird eine dichte geschlossene Glasschicht 4 erzeugt, die weitgehend gegenüber Gasen und Flüssigkeiten, auch Wasser, dicht ist, jedoch Licht durchlässt, was im Falle von elektrooptischen Bauteilen wichtig ist.For more details on the possible substrate 1 will refer to 1 taken. A silicon wafer as the substrate 1 assigns areas 2 with semiconductor structures as well as areas 3 with connection structures, which are formed here as a bond pad, for example made of aluminum. The silicon wafer represents a substrate with a surface roughness of <5 μm. The top side 1a the bottom of the substrate 1b across from. On top 1a is a layer of glass 4 been put down. This type of glass can be affected by the electron beam 24 largely evaporated, working in an evacuated environment with 10 -5 mbar residual pressure and a BIAS temperature during the evaporation of 100 ° C. Under these conditions, a dense closed glass layer 4 generated, which is largely sealed against gases and liquids, including water, but lets light through, which is important in the case of electro-optical components.

Die Unterseite 1b des Wafers steht für weitere Bearbeitungsschritte zur Verfügung, welche das Nass-, Trocken- und Plasmaätzen bzw. -reinigen umfassen.The bottom 1b The wafer is available for further processing steps, which include wet, dry and plasma etching or cleaning.

2 zeigt eine Deckschicht des Substrats 1, die aus einer Glasschicht 4 und einer Kunststoffschicht 5 besteht. Die Glasschicht 4 hat eine Dicke im Bereich von 1 bis 50 μm, was für die Abkapselung bzw. den hermetischen Abschluss genügt, während die Kunststoffschicht 5 dicker ist, um dem Wafer als Werkstück größere Stabilität für nachfolgende Bearbeitungsschritte zu verleihen. 2 shows a cover layer of the substrate 1 made from a layer of glass 4 and a plastic layer 5 consists. The layer of glass 4 has a thickness in the range of 1 to 50 μm, which is sufficient for the encapsulation or the hermetic seal, while the plastic layer 5 is thicker in order to give the wafer as a workpiece greater stability for subsequent processing steps.

In 3 ist die weitere Bearbeitung eines Wafers angedeutet. Der Wafer wird an der Unterseite gedünnt und es werden Ätzgruben 6 erzeugt, die bis zu den Bond Pads 3 reichen, welche als Ätzstop wirken. Die Waferunterseite 1b wird mit einer Kunststofflithographie versehen, wobei die Bereiche mit den Bond Pads 3 offen bleiben. Es werden nunmehr Leitungskontakte 7 auf der Unterseite erzeugt, was beispielsweise durch Besprühen oder Besputtern geschieht, wodurch leitfähige Schichten 7 im Bereich der Ätzgruben 6 erzeugt werden. Nunmehr wird der bei der Lithographie verwendete Kunststoff von der Waferunterseite 1b entfernt. Alsdann wird ein Ball Grid Array 8 an den leitfähigen Schichten 7 angebracht und der Wafer wird entlang von Ebenen 9 aufgetrennt. Es entstehen eine Mehrzahl von elektronischen Bauteilen, deren Halbleiterstrukturen 2 sicher zwischen der Deckschicht 4 und dem Substrat 1 eingebettet und hermetisch verschlossen sind.In 3 further processing of a wafer is indicated. The bottom of the wafer is thinned and there are etching pits 6 generated that up to the bond pads 3 range, which act as an etch stop. The bottom of the wafer 1b is provided with a plastic lithography, the areas with the bond pads 3 stay open. There are now line contacts 7 generated on the underside, which is done for example by spraying or sputtering, as a result of which conductive layers 7 in the area of the etching pits 6 be generated. Now the plastic used in lithography is removed from the underside of the wafer 1b away. Then a ball grid array 8th on the conductive layers 7 attached and the wafer is along levels 9 separated. A large number of electronic components, their semiconductor structures, are created 2 securely between the top layer 4 and the substrate 1 are embedded and hermetically sealed.

4 zeigt eine Abwandlung der Ausführungsform der 3. Es werden die gleichen Verfahrensschritte wie zuvor ausgeführt, jedoch wird der Kunststoff an der Waferunterseite 1b nicht entfernt und bedeckt die Unterseite als Passivierungs- und Schutzschicht 10. 4 shows a modification of the embodiment of FIG 3 , The same process steps are carried out as before, but the plastic is on the underside of the wafer 1b does not remove and covers the underside as a passivation and protective layer 10 ,

5 zeigt eine Ausführungsform, bei der anstelle der Kunststoffschicht 10 eine aufgedampfte Glasschicht 11 auf der Unterseite 1b des Substrats aufgebracht werden soll. Wie bei der Ausführungsform der 3 wird der zur Lithographie verwendete Kunststoff an der Waferunterseite 1b entfernt und die gesamte Waferunterseite 1b wird mit dem Glas bedampft, so dass eine 1 bis 50μm starke Glasschicht 11 entsteht. 5 shows an embodiment in which instead of the plastic layer 10 an evaporated layer of glass 11 on the bottom 1b of the substrate is to be applied. As with the embodiment of the 3 the plastic used for lithography on the underside of the wafer 1b removed and the entire underside of the wafer 1b is steamed with the glass, so that a 1 to 50μm thick glass layer 11 arises.

Wie bei 11b dargestellt, bedeckt diese Glasschicht auch die nach außen ragenden Teile der Leitungskontakte 7. Zum Anbringen eines Ball Grid Arrays 8 werden diese Bereiche 11b durch Wegschleifen und/oder Wegätzen freigelegt. Danach werden die Ball Grid Arrays angebracht, wie 6 zeigt, und es erfolgt eine Auftrennung des Wafers zur Bildung einzelner Bauteile, wie bei 9 angedeutet. Die empfindlichen Halbleiterstrukturen 2 sind nach oben und nach unten jeweils durch eine Glasschicht 4 bzw. 11 geschützt.As in 11b shown, this glass layer also covers the outwardly protruding parts of the line contacts 7 , For attaching a ball grid array 8th become these areas 11b exposed by grinding and / or etching away. Then the Ball Grid Arrays are attached, like 6 shows, and there is a separation of the wafer to form individual components, as in 9 indicated. The sensitive semiconductor structures 2 are up and down through a layer of glass 4 respectively. 11 protected.

Bei einer weiteren Ausführungsform der Erfindung wird der Wafer an Trennebenen 9, die nicht durch die Bond Pads verlaufen, aufgetrennt. Dies hat den Vorteil, dass auch ein seitlicher Passivierungsschutz für die Bauteile gewährleistet werden kann. 7 zeigt ein Beispiel der Auftrennung, bei welchem nur Material der Deckschicht 4 und des Substrats 1 betroffen ist. Es wird zunächst wie bei den zuvor beschriebenen Ausführungsbeispielen vorgegangen, d.h. der Wafer wird von der Unterseite gedünnt und es werden Ätzgruben 6 erzeugt, die bis zur Unterseite der Bond Pads 3 reichen. Die Waferunterseite 1b wird lithographiert, wobei die Bond Pad-Bereiche offen bleiben. Die Leitungskontakte 7 werden im Bereich der Ätzgruben 6 erzeugt, wobei die Ätzgruben außerdem mit leitfähigem Material 12 gefüllt werden. Hier kommt die galvanische Verstärkung durch Ni(P) in Betracht. Nachdem der Kunststoff an der Waferunterseite wenigstens im Bereich der Kontakte 7 entfernt worden ist, werden die Ball Grid Arrays 8 angebracht. Danach erfolgt die Auftrennung des Wafers entlang von Ebenen 9. Man erhält elektronische Bauteile mit hermetisch eingeschlossenen Halbleiterstrukturen 2, wobei je nach Vorgehensweise eine analoge Kunststoffschicht 10 vorhanden ist oder fehlt.In a further embodiment of the invention, the wafer is at separation levels 9 that do not run through the bond pads. This has the advantage that lateral passivation protection for the components can also be guaranteed. 7 shows an example of the separation, in which only material of the cover layer 4 and the substrate 1 is affected. The procedure is initially the same as in the exemplary embodiments described above, ie the wafer is thinned from the underside and etching pits become 6 generates that to the bottom of the bond pads 3 pass. The bottom of the wafer 1b is lithographed, leaving the bond pad areas open. The line contacts 7 are in the area of the etching pits 6 generated, the etching pits also with conductive material 12 be filled. Here galvanic amplification by Ni (P) comes into consideration. After the plastic on the underside of the wafer, at least in the area of the contacts 7 has been removed, the Ball Grid Arrays 8th appropriate. The wafer is then cut along planes 9 , Electronic components with hermetically enclosed semiconductor structures are obtained 2 , depending on the procedure, an analog plastic layer 10 is present or missing.

8 und 9 zeigen ein Ausführungsbeispiel mit der Erzeugung einer unterseitigen Glasschicht 11. Es wird analog zur Ausführungsform der 5 in Verbindung mit 7 vorgegangen, d.h. es werden gefüllte Bond Pads erzeugt und die gesamte Unterseite 1b des Wafers wird mit der Glasschicht 11 beschichtet, die anschließend im Bereich der Ätzgruben 6 entfernt wird, um darauf die Ball Grid Arrays anzubringen, wie in 9 dargestellt. Nach Auftrennung entlang der Ebenen 9 werden Bauteile mit gekapselten Halbleiterstrukturen 2 erzielt. 8th and 9 show an embodiment with the production of an underside glass layer 11 , It is analogous to the embodiment of the 5 combined with 7 procedure, ie filled bond pads are created and the entire underside 1b of the wafer is covered with the glass layer 11 coated, which then in the area of the etching pits 6 is removed to attach the ball grid arrays, as in 9 shown. After splitting along the levels 9 become components with encapsulated semiconductor structures 2 achieved.

Das Glassystem der Schicht 4 bzw. 11 sollte wenigstens ein binäres System darstellen. Bevorzugt werden Mehrkomponentensysteme.The glass system of the layer 4 or 11 should represent at least one binary system. Multi-component systems are preferred.

Als besonders geeignet hat sich das Aufdampfglas erwiesen, welches folgende Zusammensetzung in Gewichtsprozent aufweist:
SiO2 84, 1
B2O3 11, 0

Figure 00090001
Al2O3 (in der Schicht ⇒ 0,5 %)The vapor deposition glass, which has the following composition in percent by weight, has proven to be particularly suitable:
SiO 2 84, 1st
B 2 O 3 11.0
Figure 00090001
Al 2 O 3 (in the layer ⇒ 0.5%)

Der elektrische Widerstand beträgt ungefähr 1010 Ω/cm (bei 100°C) ,
der Brechungsindex etwa 1,470,
die Dielektrizitätskonstante ε etwa 4,8 (bei 25°C, 1MHz) tgδ etwa 80 × 10–4 (bei 25°C, 1 MHz).The electrical resistance is approximately 10 10 Ω / cm (at 100 ° C),
the refractive index is about 1.470,
the dielectric constant ε about 4.8 (at 25 ° C, 1MHz) tgδ about 80 × 10 -4 (at 25 ° C, 1 MHz).

Zur Erzielung besonderer Eigenschaften der Bauteile kann es zweckmäßig sein, Gläser unterschiedlicher Glaszusammensetzungen für die Glasschichten der Oberseite und der Unterseite zu verwenden. Es ist auch möglich, mehrere Gläser mit unterschiedlichen Eigenschaften, z.B. hinsichtlich Brechungsindex, Dichte, Knoophärte, Dielektrizitätskonstante, tanδ nacheinander auf das Substrat aufzudampfen.To achieve special properties of the components it may be appropriate glasses different glass compositions for the glass layers of the top and the bottom to use. It is also possible to have several glasses different properties, e.g. in terms of refractive index, Density, knoop hardness, dielectric constant, tanδ in succession evaporate on the substrate.

Anstelle der Elektronenstrahlverdampfung können auch andere Mittel zur Überführung von Materialien, die sich als Glas niederschlagen, angewendet werden. Das Verdampfungsmaterial kann sich beispielsweise in einem Tiegel befinden, der durch eine Elektronenstoßheizung aufgeheizt wird. Eine solche Elektronenstoßheizung beruht auf der Emission von Glühelektronen, die auf den Tiegel hin beschleunigt werden, um mit vorbestimmter kinetischer Energie auf das zu verdampfende Material aufzutreffen. Auch mit diesen Verfahren lassen sich Glasschichten erzeugen, ohne das Substrat, auf dem sich das Glas niederschlägt, allzu stark thermisch zu belasten.Instead of electron beam evaporation can other means of transferring Materials that are reflected as glass are used. The evaporation material can, for example, be in a crucible located, which is heated by an electron pulse heater. A such electron impulse heating is based on the emission of glow electrons, which are accelerated towards the crucible to with predetermined kinetic energy to hit the material to be evaporated. With these processes, too, glass layers can be produced without the substrate on which the glass is deposited closes too much thermally strain.

Claims (15)

Verfahren zur Gehäusebildung bei elektronischen Bauteilen, insbesondere Sensoren, integrierte Schaltungen und optoelektronische Bauelemente; mit folgenden Schritten: Bereitstellen eines Substrats (1), das einen oder mehrere Bereiche zur Bildung von Halbleiterstrukturen (2) sowie von Anschlussstrukturen (3) aufweist, wobei wenigstens eine erste Substratseite (1a) zu verkapseln ist; Bereitstellen einer Auf dampfglasquelle (20) zur Erzeugung wenigstens eines binären Glassystems; Anordnen der ersten Substratseite (1a) relativ zur Aufdampfglasquelle derart, dass die erste Substratseite (1a) bedampft werden kann; Betrieb der Aufdampfglasquelle (20) solange, bis die erste Substratseite (1a) eine Glasschicht (4) trägt, welche eine Dicke im Bereich von 1 bis 1000 μm aufweist.Methods for forming housings in electronic components, in particular sensors, integrated circuits and optoelectronic components; with the following steps: provision of a substrate ( 1 ), which has one or more areas for the formation of semiconductor structures ( 2 ) as well as connecting structures ( 3 ), at least one first substrate side ( 1a ) is to be encapsulated; Providing a source of vapor glass ( 20 ) to generate at least one binary glass system; Arranging the first substrate side ( 1a ) relative to the vapor deposition glass source in such a way that the first substrate side ( 1a ) can be steamed; Operation of the vapor deposition glass source ( 20 ) until the first side of the substrate ( 1a ) a layer of glass ( 4 ), which has a thickness in the range of 1 to 1000 microns. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß beim Bereitstellen der Aufdampfglasquelle (20), ein Reservoir mit organischen Bestandteilen bereitgestellt wird, die durch Anlegen eines Vakuums oder durch Erwärmung in den gasförmigen Zustand übergehen, so dass während der Bedampfung Mischschichten aus anorganischen und organischen Bestandteilen auf der Substratseite gebildet werden können.Method according to Claim 1, characterized in that when the vapor-deposition glass source ( 20 ), a reservoir is provided with organic constituents which change into the gaseous state by applying a vacuum or by heating, so that mixed layers of inorganic and organic constituents can be formed on the substrate side during the vapor deposition. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Glasschichtdicke im Bereich zwischen 1 bis 50 μm liegt.A method according to claim 1 or 2, characterized in that that the glass layer thickness is in the range between 1 to 50 μm. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Glasschichtdicke im Bereich zwischen 50 bis 200 μm liegt.A method according to claim 1 or 2, characterized in that that the glass layer thickness is in the range between 50 to 200 μm. Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, dass das Aufdampfglas der Quelle (20) mittels Elektronenstrahl (24) aus einem Glastarget (23) erzeugt wird.Method according to one of claims 1 to 4, characterized in that the vapor deposition glass of the source ( 20 ) using an electron beam ( 24 ) from a glass target ( 23 ) is produced. Verfahren nach Anspruch 5, dadurch gekennzeichnet, dass als Aufdampfglas ein Borosilikatglas mit Anteilen von Aluminiumoxid und Alkalioxid verwendet wird.A method according to claim 5, characterized in that as a vapor deposition glass, a borosilicate glass with portions of aluminum oxide and alkali oxide is used. Verfahren nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, dass das Aufdampfglas einen wärmeausdehnungskoeffizienten nahezu gleich dem des Substrates aufweist.Method according to one of claims 1 to 6, characterized in that that the vapor deposition glass has a coefficient of thermal expansion has almost the same as that of the substrate. Verfahren nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass die Glasschicht (4) in einer Dicke erzeugt wird, wie sie zum hermetischen Abschluss erforderlich ist, und dass eine Kunststoffschicht (5) über der Glasschicht (4) aufgetragen wird, um die weitere Verarbeitung des Substrates (1) zu erleichtern.Method according to one of claims 1 to 7, characterized in that the glass layer ( 4 ) is produced in a thickness as required for hermetic sealing, and that a plastic layer ( 5 ) over the glass layer ( 4 ) is applied to the further processing of the substrate ( 1 ) to facilitate. Verfahren nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, dass mehrere Schichten Glas auf das Substrat (1) aufgedampft werden, wobei die Glasschichten aus unterschiedlichen Glaszusammensetzungen bestehen können.Method according to one of claims 1 to 8, characterized in that several layers of glass on the substrate ( 1 ) are evaporated, whereby the glass layers can consist of different glass compositions. Verfahren nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, dass die weitere Verarbeitung des Substrates (1) den Abtrag von Material an einer zweiten Substratseite (1b) umfasst, die der ersten Substratseite (1a) gegenüberliegt.Method according to one of claims 1 to 9, characterized in that the further processing of the substrate ( 1 ) the removal of material on a second side of the substrate ( 1b ) comprises that of the first substrate side ( 1a ) is opposite. Verfahren nach einem der Ansprüche 1 bis 10, dadurch gekennzeichnet, dass das Substrat (1) einen Wafer mit mehreren Halbleiterstrukturen (2) und Bond Pad-Strukturen (3) aufweist, wobei die zweite, der ersten Substratseite (1a) gegenüberliegende Substratseite (1b) gedünnt wird, an der zweiten Substratseite (1b) im Bereich der herzustellenden Anschlussstrukturen Gruben (6) geätzt werden, die Bereiche zur Bildung der Halbleiterstrukturen (2) unter Verwendung von Kunststoffschichten lithographiert werden, auf der zweiten Substratseite (1b) in den Bereichen mit Bond Pad-Strukturen (3) Leitungskontakte (7) hergestellt werden, der Kunststoff von der zweiten Substratseite (1b) entfernt wird, ein Ball Grid Array (8) an den Leitungskontakten (7) aufgebracht wird, und der Wafer zur Bildung mehrerer elektronischer Bauteile aufgetrennt wird, die jeweils erste, verkapselte Seiten (1a) aufweisen.Method according to one of claims 1 to 10, characterized in that the substrate ( 1 ) a wafer with several semiconductor structures ( 2 ) and bond pad structures ( 3 ), the second, the first substrate side ( 1a ) opposite side of the substrate ( 1b ) is thinned on the second side of the substrate ( 1b ) in the area of the connecting structures pits to be produced ( 6 ) are etched, the areas for forming the semiconductor structures ( 2 ) lithographed using plastic layers on the second side of the substrate ( 1b ) in areas with bond pad structures ( 3 ) Line contacts ( 7 ) are produced, the plastic from the second substrate side ( 1b ) a Ball Grid Array ( 8th ) on the line contacts ( 7 ) is applied, and the wafer is separated to form a plurality of electronic components, the first, encapsulated sides ( 1a ) exhibit. Verfahren nach Anspruch 11, dadurch gekennzeichnet, dass die zweite Substratseite (1b) mit einem Kunststoffüberzug (10) unter Aussparung der Ball Grid Bereiche (8) versehen wird.A method according to claim 11, characterized in that the second substrate side ( 1b ) with a plastic cover ( 10 ) with the exception of the ball grid areas ( 8th ) is provided. Verfahren nach Anspruch 11 dadurch gekennzeichnet, dass nach Entfernung des Kunststoffes von der zweiten Substratseite (1b) die zweite Substratseite insgesamt mit einer Glasschicht (11) im Bereich von 1 bis 50 μm Dicke bedampft wird, und dass die Leitungskontakte (7) durch örtliche Beseitigung der Glasschicht (11) freigelegt werden, wonach die Schritte des Aufbringens des Ball Grid Arrays (8) und des Auftrennens erfolgen, um beidseitig verkapselte elektronische Bauteile zu erhalten.A method according to claim 11, characterized in that after removal of the plastic from the second substrate side ( 1b ) the second side of the substrate overall with a glass layer ( 11 ) is steamed in the range of 1 to 50 μm thickness, and that the line contacts ( 7 ) by local removal of the glass layer ( 11 ) are exposed, after which the steps of applying the ball grid array ( 8th ) and of the separation in order to encapsulate elec to obtain tronic components. Verfahren nach einem der Ansprüche 11 bis 13, dadurch gekennzeichnet, dass die Ätzgruben (6), die bis zu den Bond Pad Strukturen (3) führen, mit leitfähigem Material (12) gefüllt werden, wonach mit oder ohne Entfernung des Kunststoffes (10) an der zweiten Substratseite (1b) sowie mit oder ohne Glasschicht (11) auf der zweiten Substratseite (1b) unter Freilassung der Leitungskontakte (7) das Ball Grid Array (8) an den Leitungskontakten (7) oder an dem Füllmaterial (12) aufgebracht wird.Method according to one of claims 11 to 13, characterized in that the etching pits ( 6 ) up to the bond pad structures ( 3 ) with conductive material ( 12 ) are filled, after which with or without removing the plastic ( 10 ) on the second side of the substrate ( 1b ) as well as with or without a glass layer ( 11 ) on the second side of the substrate ( 1b ) leaving the line contacts free ( 7 ) the Ball Grid Array ( 8th ) on the line contacts ( 7 ) or on the filling material ( 12 ) is applied. Elektronisches Bauteil, insbesondere ein Sensor, eine integrierte Schaltung oder ein optoelektronisches Bauelement, mit einem Gehäuse, insbesondere herstellbar nach einem der Ansprüche 1 bis 14, welches gebildet ist durch ein Substrat und eine aufgedampfte Glasschicht (4), welche eine Dicke im Bereich von 1 bis 1000 μm aufweist.Electronic component, in particular a sensor, an integrated circuit or an optoelectronic component, with a housing, in particular producible according to one of Claims 1 to 14, which is formed by a substrate and a vapor-deposited glass layer ( 4 ), which has a thickness in the range of 1 to 1000 microns.
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DE10222958A DE10222958B4 (en) 2002-04-15 2002-05-23 Process for producing an organic electro-optical element and organic electro-optical element
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DE10222964A DE10222964B4 (en) 2002-04-15 2002-05-23 Process for forming housings in electronic components and hermetically encapsulated electronic components
IL16429003A IL164290A0 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
CNA038085690A CN1647276A (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface as protection for copying process and elements concerned
CNB038085836A CN100387749C (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
PCT/EP2003/003873 WO2003086958A2 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
AU2003227626A AU2003227626A1 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
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CA002479823A CA2479823A1 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
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DE50309735T DE50309735D1 (en) 2002-04-15 2003-04-15 METHOD FOR HOUSING FOR ELECTRONIC COMPONENTS SO AS HERMETICALLY CAPTURED ELECTRONIC COMPONENTS
AU2003245875A AU2003245875A1 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
US10/511,334 US7825029B2 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
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US10/511,488 US20060051584A1 (en) 2002-04-15 2003-04-15 Process for producing a product having a structured surface
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JP2003584357A JP2005528780A (en) 2002-04-15 2003-04-15 Method of forming a housing for an electronic component and electronic component sealed thereby
CA002485022A CA2485022A1 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
CA002505014A CA2505014A1 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
TW092108722A TW200407446A (en) 2002-04-15 2003-04-15 Method for producing patterned layers on substrates
EP03746297.5A EP1495493B1 (en) 2002-04-15 2003-04-15 Use of a borosilicateglass layer
US10/511,566 US7863200B2 (en) 2002-04-15 2003-04-15 Process of vapor depositing glass layers for wafer-level hermetic encapsulation of electronic modules
KR10-2004-7016634A KR20040111528A (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
PCT/EP2003/003907 WO2003088347A2 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
PCT/EP2003/003884 WO2003088340A2 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
AU2003245876A AU2003245876A1 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
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AU2003233974A AU2003233974A1 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
KR1020047016630A KR100616126B1 (en) 2002-04-15 2003-04-15 Method for forming housing for electronic components and electronic components that are hermetically encapsulated thereby
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KR1020117025576A KR101178935B1 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
US10/511,558 US7495348B2 (en) 2002-04-15 2003-04-15 Process for producing copy protection for an electronic circuit
KR1020047016632A KR100789977B1 (en) 2002-04-15 2003-04-15 A process for producing copy protection, an electronic component with the copy protection, a decryption device comprising the component
JP2003585192A JP2005527076A (en) 2002-04-15 2003-04-15 Hermetic sealing of organic electro-optic elements
PCT/EP2003/003882 WO2003087424A1 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
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CNB038085682A CN100397593C (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
US10/511,557 US7396741B2 (en) 2002-04-15 2003-04-15 Method for connecting substrate and composite element
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EP03727306A EP1495501A2 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
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KR1020047016642A KR100942038B1 (en) 2002-04-15 2003-04-15 Organic electro-optical elements and process for producing organic electro-optical elements
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DE50310646T DE50310646D1 (en) 2002-04-15 2003-04-15 METHOD OF COATING METAL SURFACES
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DE102009008951A1 (en) 2009-02-13 2010-10-07 Schott Ag X-ray opaque barium-free glass and its use
DE102018010246A1 (en) 2018-02-01 2019-08-01 Schott Ag X-ray opaque glass and its use
DE102018102301A1 (en) 2018-02-01 2019-08-01 Schott Ag X-ray opaque glass and its use
DE102018102301B4 (en) 2018-02-01 2019-08-14 Schott Ag X-ray opaque glass and its use
DE102018010246B4 (en) 2018-02-01 2024-05-16 Schott Ag X-ray opaque glass and its use

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