DE10222964A1 - Organic electro-optical element production method for e.g. LED, has layer with vitreous structure deposited over layer structure comprising organic electro-optical material layer formed between pair of conductive layers - Google Patents

Organic electro-optical element production method for e.g. LED, has layer with vitreous structure deposited over layer structure comprising organic electro-optical material layer formed between pair of conductive layers

Info

Publication number
DE10222964A1
DE10222964A1 DE10222964A DE10222964A DE10222964A1 DE 10222964 A1 DE10222964 A1 DE 10222964A1 DE 10222964 A DE10222964 A DE 10222964A DE 10222964 A DE10222964 A DE 10222964A DE 10222964 A1 DE10222964 A1 DE 10222964A1
Authority
DE
Germany
Prior art keywords
glass
substrate side
substrate
layer
glass layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10222964A
Other languages
German (de)
Other versions
DE10222964B4 (en
Inventor
Juergen Leib
Dietrich Mund
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Schott AG
Original Assignee
Schott Glaswerke AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schott Glaswerke AG filed Critical Schott Glaswerke AG
Priority to DE10222609A priority Critical patent/DE10222609B4/en
Priority to DE10222964A priority patent/DE10222964B4/en
Priority to DE10222958A priority patent/DE10222958B4/en
Priority to AU2003227626A priority patent/AU2003227626A1/en
Priority to CN038133024A priority patent/CN1659720A/en
Priority to PCT/EP2003/003907 priority patent/WO2003088347A2/en
Priority to KR1020047016631A priority patent/KR100636414B1/en
Priority to KR10-2004-7016634A priority patent/KR20040111528A/en
Priority to CA002480691A priority patent/CA2480691A1/en
Priority to AT03737955T priority patent/ATE411407T1/en
Priority to PCT/EP2003/003872 priority patent/WO2003087423A1/en
Priority to EP03746297.5A priority patent/EP1495493B1/en
Priority to US10/511,315 priority patent/US7326446B2/en
Priority to CA002480854A priority patent/CA2480854A1/en
Priority to IL16430403A priority patent/IL164304A0/en
Priority to AU2003233973A priority patent/AU2003233973A1/en
Priority to US10/511,334 priority patent/US7825029B2/en
Priority to CNA038085690A priority patent/CN1647276A/en
Priority to CA002480737A priority patent/CA2480737A1/en
Priority to US10/511,557 priority patent/US7396741B2/en
Priority to EP03725032.1A priority patent/EP1495491B1/en
Priority to JP2003585174A priority patent/JP2005528782A/en
Priority to JP2003584357A priority patent/JP2005528780A/en
Priority to KR1020047016629A priority patent/KR100679345B1/en
Priority to JP2003585192A priority patent/JP2005527076A/en
Priority to KR1020117025576A priority patent/KR101178935B1/en
Priority to AU2003233974A priority patent/AU2003233974A1/en
Priority to CNA038085844A priority patent/CN1646722A/en
Priority to JP2003583927A priority patent/JP2005527459A/en
Priority to AU2003232469A priority patent/AU2003232469A1/en
Priority to US10/511,488 priority patent/US20060051584A1/en
Priority to AT03737956T priority patent/ATE393839T1/en
Priority to AU2003250326A priority patent/AU2003250326A1/en
Priority to CNB03808564XA priority patent/CN100359653C/en
Priority to EP03737955A priority patent/EP1495153B1/en
Priority to US10/511,566 priority patent/US7863200B2/en
Priority to JP2003584356A priority patent/JP2006503976A/en
Priority to CNB038085682A priority patent/CN100397593C/en
Priority to US10/511,558 priority patent/US7495348B2/en
Priority to JP2003585179A priority patent/JP2005528783A/en
Priority to PCT/EP2003/003883 priority patent/WO2003088370A2/en
Priority to EP03737956A priority patent/EP1495154B1/en
Priority to EP03727305.9A priority patent/EP1494965B1/en
Priority to PCT/EP2003/003884 priority patent/WO2003088340A2/en
Priority to DE50309735T priority patent/DE50309735D1/en
Priority to CA002479823A priority patent/CA2479823A1/en
Priority to IL16429003A priority patent/IL164290A0/en
Priority to JP2003585167A priority patent/JP2005527112A/en
Priority to CA002480797A priority patent/CA2480797A1/en
Priority to CNB038085836A priority patent/CN100387749C/en
Priority to IL16417103A priority patent/IL164171A0/en
Priority to CA002485022A priority patent/CA2485022A1/en
Priority to PCT/EP2003/003882 priority patent/WO2003087424A1/en
Priority to EP03746159.7A priority patent/EP1502293B1/en
Priority to TW092108722A priority patent/TW200407446A/en
Priority to CNB038085410A priority patent/CN1329285C/en
Priority to PCT/EP2003/003881 priority patent/WO2003088354A2/en
Priority to DE50310646T priority patent/DE50310646D1/en
Priority to KR1020047016632A priority patent/KR100789977B1/en
Priority to AU2003245876A priority patent/AU2003245876A1/en
Priority to KR1020047016642A priority patent/KR100942038B1/en
Priority to AU2003245875A priority patent/AU2003245875A1/en
Priority to CA002505014A priority patent/CA2505014A1/en
Priority to EP03727306A priority patent/EP1495501A2/en
Priority to KR1020047016630A priority patent/KR100616126B1/en
Priority to PCT/EP2003/003873 priority patent/WO2003086958A2/en
Publication of DE10222964A1 publication Critical patent/DE10222964A1/en
Application granted granted Critical
Publication of DE10222964B4 publication Critical patent/DE10222964B4/en
Priority to IL16430004A priority patent/IL164300A0/en
Priority to IL16430104A priority patent/IL164301A0/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03B—MANUFACTURE, SHAPING, OR SUPPLEMENTARY PROCESSES
    • C03B19/00—Other methods of shaping glass
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C14/00—Glass compositions containing a non-glass component, e.g. compositions containing fibres, filaments, whiskers, platelets, or the like, dispersed in a glass matrix
    • C03C14/006—Glass compositions containing a non-glass component, e.g. compositions containing fibres, filaments, whiskers, platelets, or the like, dispersed in a glass matrix the non-glass component being in the form of microcrystallites, e.g. of optically or electrically active material
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/02—Surface treatment of glass, not in the form of fibres or filaments, by coating with glass
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34—Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C4/00—Compositions for glass with special properties
    • C03C4/12—Compositions for glass with special properties for luminescent glass; for fluorescent glass
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/10—Glass or silica
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02145—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02161—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing more than one metal element
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
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    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • C—CHEMISTRY; METALLURGY
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    • C03C2214/00—Nature of the non-vitreous component
    • C03C2214/16—Microcrystallites, e.g. of optically or electrically active material
    • C—CHEMISTRY; METALLURGY
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    • C03C2217/00—Coatings on glass
    • C03C2217/20—Materials for coating a single layer on glass
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    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C2217/00—Coatings on glass
    • C03C2217/70—Properties of coatings
    • C03C2217/77—Coatings having a rough surface
    • C—CHEMISTRY; METALLURGY
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    • C03C2218/00—Methods for coating glass
    • C03C2218/10—Deposition methods
    • C03C2218/15—Deposition methods from the vapour phase
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    • C03C2218/00—Methods for coating glass
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    • C03C2218/00—Methods for coating glass
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    • C03C2218/00—Methods for coating glass
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Abstract

A conductive layer (13) is formed on a substrate (3). Another conductive layer (17) is formed over an organic electro-optical material layer (15) provided on the conductive layer (13). The layer structure (5) comprising the conductive layers (13,17) and organic electro-optical material layer, is covered with a layer of vitreous structure. Independent claims are also included for the following: (1) organic electro-optical element; and (2) device for producing organic electro-optical element.

Description

Die Erfindung bezieht sich auf ein Verfahren zur Gehäusebildung bei elektronischen Bauteilen sowie auf so hermetisch verkapselte elektronische Bauteile, insbesondere Sensoren, integrierte Schaltungen und optoelektronische Bauelemente. The invention relates to a method for Housing formation in electronic components and on so hermetically encapsulated electronic components, in particular Sensors, integrated circuits and optoelectronic Components.

Zur Kapselung von integrierten Schaltungen und optoelektronischen Bauelementen ist es bekannt, ein dünnes Glasplättchen mittels einer organischen Klebeschicht auf das Bauteil zu kleben und so die empfindlichen Halbleiterstrukturen abzudecken und zu schützen. Diese Bauweise hat den Nachteil, dass mit der Zeit Wasser in die organische Klebeschicht eindiffundieren kann, welches dann bis zu den Halbleiterstrukturen gelangen kann und diese beeinträchtigt. Die Klebeschichten können ferner durch UV- Bestrahlung altern, was vor allem für elektrooptische Bauteile schädlich ist. For encapsulating integrated circuits and optoelectronic components, it is known to be a thin Glass plate by means of an organic adhesive layer on the Glue component and so the sensitive Cover and protect semiconductor structures. This Construction has the disadvantage that over time, water gets into the can diffuse organic adhesive layer, which then can get to the semiconductor structures and this impaired. The adhesive layers can also by UV Irradiation ages, especially for electro-optical Components is harmful.

Anstelle organischer Klebemittel ist auch schon niedrig schmelzendes Glaslot als Zwischenschicht verwendet worden, welches aufgesprüht, aufgesputtert bzw. mittels Siebdruck- und Dispensertechnologie aufgetragen worden ist. Die Prozesstemperatur beim Aufschmelzen der Glaslotschicht ist jedoch höher als T = 300°C, so dass temperaturempfindliche Halbleiterstrukturen nicht verkapselt werden können. Instead of organic glue it is already low melting glass solder has been used as an intermediate layer, which is sprayed on, sputtered on or by means of screen printing and dispenser technology has been applied. The Process temperature when melting the glass solder layer is however, higher than T = 300 ° C, making it temperature sensitive Semiconductor structures cannot be encapsulated.

Der Erfindung liegt deshalb die Aufgabe zugrunde, ein Verfahren zur Kapselung von elektronischen Bauteilen anzugeben, mit dem eine weitgehend wasserdiffusionsfeste Kapselung bei mäßigen Temperaturen unterhalb von 300°C, vorzugsweise unterhalb 150°C erzielt werden kann. The invention is therefore based on the object Process for encapsulating electronic components specify with which a largely water diffusion resistant Encapsulation at moderate temperatures below 300 ° C, can preferably be achieved below 150 ° C.

Die gestellte Aufgabe wird aufgrund der Maßnahmen des Anspruches 1 gelöst und durch die weiteren Maßnahmen der abhängigen Ansprüche ausgestaltet und weiterentwickelt. Anspruch 14 betrifft ein erfindungsgemäß hergestelltes elektronisches Bauteil. The task is due to the measures of the Claim 1 solved and by the further measures of dependent claims designed and developed. Claim 14 relates to a manufactured according to the invention electronic component.

Das erfindungsgemäße Verfahren der Kapselung mit Aufdampfglas kann bereits angewendet werden, wenn das elektronische Bauteil noch in der Herstellung begriffen ist. Die Verstärkung des Substrats des elektronischen Bauteils durch die aufgedampfte Glasschicht wird ausgenutzt, das Substrat zu stabilisieren, während auf das Substrat von der nicht eingekapselten Seite her eingewirkt wird. Das ansonsten fertig hergestellte elektronische Bauteil kann auch von der Anschlußseite her - unter Freilassung der Anschlüsse - eingekapselt werden. The encapsulation method with vapor deposition glass according to the invention can already be applied if the electronic Component is still in production. The Reinforcement of the substrate of the electronic component the evaporated glass layer is used, the substrate too stabilize while on the substrate from the not encapsulated side is acted on. Otherwise Finished electronic component can also be made by the Connection side - leaving the connections free - be encapsulated.

Je nach den Anforderungen kann die Dicke der aufgedampften Glasschicht 1 bis 1000 µm betragen. Wenn es nur auf hermetischen Abschluss des zu schützenden Bauteils ankommt, liegt die bevorzugte Glasschichtdicke im Bereich zwischen 1 und 50 µm. Für stärkere Belastungen wird die Glasschichtdicke entsprechend dicker gewählt, wobei ein bevorzugter Bereich der Glasschichtdicke zwischen 50 und 200 µm liegt. Ein Aufbau von Mehrfachschichten auch in Kombination mit anderen Materialien ist ebenso möglich. Es ist auch möglich, die Glasschicht mit einer aufgebrachten Kunststoffschicht zu kombinieren, um zu einer strukturellen Verstärkung des elektronischen Bauteils zu gelangen. Depending on the requirements, the thickness of the evaporated Glass layer be 1 to 1000 microns. If only it was on the hermetic seal of the component to be protected arrives, the preferred glass layer thickness lies in the range between 1 and 50 µm. For higher loads, the Glass layer thickness chosen accordingly thicker, with a preferred range of the glass layer thickness between 50 and 200 microns. A structure of multiple layers also in Combination with other materials is also possible. It it is also possible to apply the glass layer with an applied Combine plastic layer to create a structural To gain reinforcement of the electronic component.

Es gibt verschiedene Möglichkeiten, Glas aufzudampfen. Bevorzugt wird die Erzeugung des Glasdampfes mittels Elektronenstrahl aus einem Glasvorrats-Target. Es können Aufdampfraten von mehr als 4 µm/min. erzeugt werden und das hergestellte Glas scheidet sich mit festem Verbund auf der Oberfläche des Substrats ab, ohne dass es eines erhöhten H2O- Gehalt zwecks Bindungswirkung bedarf wie bei niedrig schmelzendem Glaslot. Als Aufdampfglas wird ein Borosilikatglas mit Anteilen von Aluminiumoxid und Alkalioxid bevorzugt, wie es das Aufdampfglas vom Typ 8329 der Firma Schott Glas darstellt. Dieses Glas hat außerdem einen Wärmeausdehnungskoeffizienten, der dem des Substrats von üblichen Halbleiterstrukturen nahekommt, bzw. durch entsprechende Abwandlung in den Komponenten an den Wärmeausdehnungskoeffizienten des Substrats angepasst werden kann. Es kann Aufdampfglas anderer Zusammensetzung verwendet werden, insbesondere in mehreren Schichten übereinander, wobei die Gläser unterschiedliche Eigenschaften hinsichtlich Brechungsindex, Dichte, Härte usw. besitzen können. There are various ways of vapor deposition on glass. The generation of the glass vapor by means of an electron beam from a glass stock target is preferred. Evaporation rates of more than 4 µm / min. are produced and the glass produced is deposited with a firm bond on the surface of the substrate without requiring an increased H 2 O content for the binding effect, as in the case of low-melting glass solder. A borosilicate glass with proportions of aluminum oxide and alkali oxide is preferred as the vapor deposition glass, as is represented by the type 8329 vapor deposition glass from Schott Glas. This glass also has a coefficient of thermal expansion that approximates that of the substrate of conventional semiconductor structures, or can be adapted to the coefficient of thermal expansion of the substrate by appropriate modification in the components. Evaporating glass of a different composition can be used, in particular in several layers one above the other, the glasses having different properties in terms of refractive index, density, hardness, etc.

Weiterhin kann durch geeignete Materialkombination das Aufbringen einer Mischschicht aus anorganischen und organischen Bestandteilen realisiert werden. Diese Mischschicht ist durch eine Verringerung der Sprödigkeit gekennzeichnet. Furthermore, by using a suitable combination of materials Application of a mixed layer of inorganic and organic components can be realized. This Mixed layer is due to a reduction in brittleness characterized.

Wenn die Glasschicht auf einer ersten Seite des Substrats des elektronischen Bauteils aufgebracht wird, während dieses elektronische Bauteil noch nicht fertig hergestellt ist, kann es zur Handhabung bei dieser Fertigherstellung zweckmäßig sein, eine das Bauteil verstärkende Kunststoffschicht über der Glasschicht anzubringen. In diesem Fall wird die Glasschicht in einer Dicke erzeugt, die für die Abkapselung bzw. den hermetischen Abschluss gegenüber eindringenden diffundierenden Stoffen genügt, während die Kunststoffschicht in einer Dicke erzeugt wird, wie sie für die Stabilisierung bei der Weiterverarbeitung des Bauteils benötigt wird. If the glass layer on a first side of the substrate of the electronic component is applied during this electronic component is not yet finished, can it is useful for handling this finished production be a plastic layer reinforcing the component to attach the glass layer. In this case the Glass layer in a thickness created for the encapsulation or the hermetic seal against penetrating Diffusing substances suffice while the plastic layer is produced in a thickness as used for stabilization is required for further processing of the component.

In einem solchen Fall kann Material von der zweiten nicht gekapselten Substratseite abgetragen werden, so dass Anschlüsse an das Bauteil hergestellt werden können, die von der Unterseite in das Bauteil hineinreichen und somit durch das Bauteil selbst geschützt sind, wenn dieses endgültig von seinem Einsatzort eingebaut wird. Dies ist vor allem im Falle von Sensoren bedeutsam. In such a case, material from the second cannot encapsulated substrate side are removed so that Connections to the component can be made by reach the bottom into the component and thus through the component itself is protected if it is finally protected by where it is installed. This is especially the case of sensors significant.

Die Erfindung wird anhand der Zeichnung beschrieben. The invention is described with reference to the drawing.

Dabei zeigt: It shows:

Fig. 1 einen Abschnitt eines Wafers mit einer aufgedampften Glasschicht, Fig. 1 shows a portion of a wafer having a vapor-deposited glass layer,

Fig. 2 einen Waferabschnitt mit Glas und Kunststoffschicht, Fig. 2 shows a wafer section with glass and plastic layer,

Fig. 3 die Herstellung von Anschlüssen an den Wafer, Fig. 3 shows the manufacture of terminals on the wafer,

Fig. 4 die zusätzliche Kunststoff-Passivierung der Waferunterseite, Fig. 4, the additional plastic passivation of the wafer underside,

Fig. 5 die Beschichtung der Waferunterseite mit Aufdampfglas, Fig. 5 the coating of the wafer underside with evaporation-coating,

Fig. 6 das Anbringen eines Ball Grid Arrays an den Wafer gemäß Fig. 5, Fig. 6 shows the attachment of a ball grid arrays on the wafer of FIG. 5,

Fig. 7 eine weitere Anbringungsart des Ball Grid Arrays, Fig. 7 shows another method of attachment of the ball grid arrays,

Fig. 8 die Kapselung der Unterseite eines Wafers, Fig. 8, the encapsulation of the underside of a wafer,

Fig. 9 das Anbringen der Ball Grid Arrays am Wafer der Fig. 8, sowie Fig. 9, the mounting of the ball grid arrays on the wafer of FIG. 8, and

Fig. 10 ein Schema einer Verdampfungsanordnung. Fig. 10 is a schematic of an evaporation arrangement.

Fig. 10 zeigt die Anordnung eines Substrats 1 zu einer Aufdampfglasquelle 20. Diese besteht aus einem Elektronenstrahlerzeuger 21, einer Strahlumlenkeinrichtung 22 und einem Glastarget 23, das von einem Elektronenstrahl 24 getroffen wird. An der Auftreffstelle des Elektronenstrahls verdampft das Glas und schlägt sich an der ersten Seite 1a des Substrats 1 nieder. Um das Glas des Targets 23 möglichst gleichmäßig verdampfen zu lassen, wird das Target gedreht und der Strahl 24 gewobbelt. Fig. 10 shows the arrangement of a substrate 1 to a Aufdampfglasquelle 20th This consists of an electron beam generator 21 , a beam deflection device 22 and a glass target 23 which is hit by an electron beam 24 . The glass evaporates at the point of impact of the electron beam and is deposited on the first side 1 a of the substrate 1 . In order to allow the glass of the target 23 to evaporate as evenly as possible, the target is rotated and the beam 24 is wobbled.

Wegen näherer Einzelheiten des möglichen Substrats 1 wird Bezug auf Fig. 1 genommen. Ein Siliziumwafer als das Substrat 1 weist Bereiche 2 mit Halbleiterstrukturen sowie Bereiche 3 mit Anschlußstrukturen auf, die hier als Bond Pad, beispielsweise aus Aluminium, ausgebildet sind. Der Siliziumwafer stellt ein Substrat mit einer Oberflächenrauhigkeit < 5 µm dar. Die Oberseite 1a des Substrats liegt der Unterseite 1b gegenüber. Auf die Oberseite 1a ist eine Glasschicht 4 niedergeschlagen worden, die vorzugsweise aus dem Aufdampfglas des Typs 8329 der Firma Schott gewonnen wurde. Dieser Glastyp kann durch Einwirkung des Elektronenstrahls 24 weitgehend verdampft werden, wobei man in evakuierter Umgebung mit 10-5 mbar Restdruck und einer BIAS Temperatur während der Verdampfung von 100°C arbeitet. Unter diesen Bedingungen wird eine dichte geschlossene Glasschicht 4 erzeugt, die weitgehend gegenüber Gasen und Flüssigkeiten, auch Wasser, dicht ist, jedoch Licht durchlässt, was im Falle von elektrooptischen Bauteilen wichtig ist. For further details of the possible substrate 1 , reference is made to FIG. 1. A silicon wafer as the substrate 1 has regions 2 with semiconductor structures and regions 3 with connection structures, which here are designed as a bond pad, for example made of aluminum. The silicon wafer represents a substrate with a surface roughness <5 microns. The top 1 a of the substrate is opposite the bottom 1 b. A glass layer 4 has been deposited on the top 1 a, which was preferably obtained from the type 8329 vapor-deposition glass from Schott. This type of glass can be largely evaporated by the action of the electron beam 24 , the work being carried out in an evacuated environment with a residual pressure of 10 -5 mbar and a BIAS temperature during the evaporation of 100 ° C. Under these conditions, a dense, closed glass layer 4 is produced, which is largely sealed against gases and liquids, including water, but allows light to pass through, which is important in the case of electro-optical components.

Die Unterseite 1b des Wafers steht für weitere Bearbeitungsschritte zur Verfügung, welche das Nass-, Trocken- und Plasmaätzen bzw. -reinigen umfassen. The underside 1 b of the wafer is available for further processing steps, which include wet, dry and plasma etching or cleaning.

Fig. 2 zeigt eine Deckschicht des Substrats 1, die aus einer Glasschicht 4 und einer Kunststoffschicht 5 besteht. Die Glasschicht 4 hat eine Dicke im Bereich von 1 bis 50 µm, was für die Abkapselung bzw. den hermetischen Abschluss genügt, während die Kunststoffschicht 5 dicker ist, um dem Wafer als Werkstück größere Stabilität für nachfolgende Bearbeitungsschritte zu verleihen. Fig. 2 shows a top layer of the substrate 1 consisting of a glass layer 4 and a plastic layer 5. The glass layer 4 has a thickness in the range from 1 to 50 μm, which is sufficient for the encapsulation or the hermetic seal, while the plastic layer 5 is thicker in order to give the wafer as a workpiece greater stability for subsequent processing steps.

In Fig. 3 ist die weitere Bearbeitung eines Wafers angedeutet. Der Wafer wird an der Unterseite gedünnt und es werden Ätzgruben 6 erzeugt, die bis zu den Bond Pads 3 reichen, welche als Ätzstopp wirken. Die Waferunterseite 1b wird mit einer Kunststofflithographie versehen, wobei die Bereiche mit den Bond Pads 3 offen bleiben. Es werden nunmehr Leitungskontakte 7 auf der Unterseite erzeugt, was beispielsweise durch Besprühen oder Besputtern geschieht, wodurch leitfähige Schichten 7 im Bereich der Ätzgruben 6 erzeugt werden. Nunmehr wird der bei der Lithographie verwendete Kunststoff von der Waferunterseite 1b entfernt. Alsdann wird ein Ball Grid Array 8 an den leitfähigen Schichten 7 angebracht und der Wafer wird entlang von Ebenen 9 aufgetrennt. Es entstehen eine Mehrzahl von elektronischen Bauteilen, deren Halbleiterstrukturen 2 sicher zwischen der Deckschicht 4 und dem Substrat 1 eingebettet und hermetisch verschlossen ist. The further processing of a wafer is indicated in FIG. 3. The underside of the wafer is thinned and etching pits 6 are produced which extend as far as the bond pads 3 , which act as an etching stop. The underside of the wafer 1 b is provided with plastic lithography, the areas with the bond pads 3 remaining open. Line contacts 7 are now produced on the underside, which is done for example by spraying or sputtering, as a result of which conductive layers 7 are produced in the area of the etching pits 6 . Now the plastic used in the lithography is removed from the underside 1 b of the wafer. A ball grid array 8 is then attached to the conductive layers 7 and the wafer is cut along levels 9 . A plurality of electronic components are produced, the semiconductor structures 2 of which are securely embedded between the cover layer 4 and the substrate 1 and hermetically sealed.

Fig. 4 zeigt eine Abwandlung der Ausführungsform der Fig. 3. Es werden die gleichen Verfahrensschritte wie zuvor ausgeführt, jedoch wird der Kunststoff an der Waferunterseite 1b nicht entfernt und bedeckt die Unterseite als Passivierungs- und Schutzschicht 10. FIG. 4 shows a modification of the embodiment in FIG. 3. The same method steps are carried out as before, but the plastic on the underside 1 b of the wafer is not removed and covers the underside as a passivation and protective layer 10 .

Fig. 5 zeigt eine Ausführungsform, bei der anstelle der Kunststoffschicht 10 eine aufgedampfte Glasschicht 11 auf der Unterseite 1b des Substrats aufgebracht werden soll. Wie bei der Ausführungsform der Fig. 3 wird der zur Lithographie verwendete Kunststoff an der Waferunterseite 1b entfernt und die gesamte Waferunterseite 1b wird mit dem Glas bedampft, so dass eine 1 bis 50 µm starke Glasschicht 11 entsteht. Fig. 5 shows an embodiment in which, instead of the plastic layer 10 a vapor-deposited glass layer 11 on the bottom 1 b of the substrate is to be applied. As the plastics on the wafer base 1 used for lithography B is removed in the embodiment of Fig. 3 and the entire wafer bottom side 1 b is vapor-deposited to the glass, so that a 1 is created to 50 microns thick glass layer 11.

Wie bei 11b dargestellt, bedeckt diese Glasschicht auch die nach außen ragenden Teile der Leitungskontakte 7. Zum Anbringen eines Ball Grid Arrays 8 werden diese Bereiche 11b durch Wegschleifen und/oder Wegätzen freigelegt. Danach werden die Ball Grid Arrays angebracht, wie Fig. 6 zeigt, und es erfolgt eine Auftrennung des Wafers zur Bildung einzelner Bauteile, wie bei 9 angedeutet. Die empfindlichen Halbleiterstrukturen 2 sind nach oben und nach unten jeweils durch eine Glasschicht 4 bzw. 11 geschützt. As shown at 11b, this glass layer also covers the outwardly projecting parts of the line contacts 7 . To attach a ball grid array 8 , these areas 11 b are exposed by grinding and / or etching away. The ball grid arrays are then attached, as shown in FIG. 6, and the wafer is separated to form individual components, as indicated at 9. The sensitive semiconductor structures 2 are protected upwards and downwards by a glass layer 4 and 11, respectively.

Bei einer weiteren Ausführungsform der Erfindung wird der Wafer an Trennebenen 9, die nicht durch die Bond Pads verlaufen, aufgetrennt. Dies hat den Vorteil, dass auch ein seitlicher Passivierungsschutz für die Bauteile gewährleistet werden kann. Fig. 7 zeigt ein Beispiel der Auftrennung, bei welchem nur Material der Deckschicht 4 und des Substrats 1 betroffen ist. Es wird zunächst wie bei den zuvor beschriebenen Ausführungsbeispielen vorgegangen, d. h. der Wafer wird von der Unterseite gedünnt und es werden Ätzgruben 6 erzeugt, die bis zur Unterseite der Bond Pads 3 reichen. Die Waferunterseite 1b wird lithographiert, wobei die Bond Pad-Bereiche offen bleiben. Die Leitungskontakte 7 werden im Bereich der Ätzgruben 6 erzeugt, wobei die Ätzgruben außerdem mit leitfähigem Material 12 gefüllt werden. Hier kommt die galvanische Verstärkung durch Ni(P) in Betracht. Nachdem der Kunststoff an der Waferunterseite wenigstens im Bereich der Kontakte 7 entfernt worden ist, werden die Ball Grid Arrays 8 angebracht. Danach erfolgt die Auftrennung des Wafers entlang von Ebenen 9. Man erhält elektronische Bauteile mit hermetische eingeschlossenen Halbleiterstrukturen 2, wobei je nach Vorgehensweise eine analoge Kunststoffschicht 10 vorhanden ist oder fehlt. In a further embodiment of the invention, the wafer is cut at separation planes 9 that do not run through the bond pads. This has the advantage that lateral passivation protection for the components can also be guaranteed. Fig. 7 shows an example of the separation, in which only the material of the cover layer 4 and the substrate 1 is concerned. The procedure is initially the same as in the previously described exemplary embodiments, ie the wafer is thinned from the underside and etching pits 6 are produced which extend to the underside of the bond pads 3 . The underside of the wafer 1 b is lithographed, the bond pad regions remaining open. The line contacts 7 are produced in the area of the etching pits 6 , the etching pits also being filled with conductive material 12 . Here galvanic amplification by Ni (P) comes into consideration. After the plastic on the underside of the wafer has been removed at least in the area of the contacts 7 , the ball grid arrays 8 are attached. The wafer is then separated along levels 9 . Electronic components with hermetically enclosed semiconductor structures 2 are obtained , an analog plastic layer 10 being present or missing, depending on the procedure.

Fig. 8 und 9 zeigen ein Ausführungsbeispiel mit der Erzeugung einer unterseitigen Glasschicht 11. Es wird analog zur Ausführungsform der Fig. 5 in Verbindung mit Fig. 7 vorgegangen, d. h. es werden gefüllte Bond Pads erzeugt und die gesamte Unterseite 1b des Wafers wird mit der Glasschicht 11 beschichtet, die anschließend im Bereich der Ätzgruben 6 entfernt wird, um darauf die Ball Grid Arrays anzubringen, wie in Fig. 9 dargestellt. Nach Auftrennung entlang der Ebenen 9 werden Bauteile mit gekapselten Halbleiterstrukturen 2 erzielt. FIGS. 8 and 9 show an embodiment with the generation of a bottom side glass layer 11. The procedure is analogous to the embodiment of FIG. 5 in connection with FIG. 7, that it filled Bond pads are generated and the entire lower surface 1 b of the wafer is coated with the glass layer 11, which is subsequently removed in the etch pits 6 to then attach the ball grid arrays as shown in Fig. 9. After separation along the levels 9 , components with encapsulated semiconductor structures 2 are achieved.

Das Glassystem der Schicht 4 bzw. 11 sollte wenigstens ein binäres System darstellen. Bevorzugt werden Mehrkomponentensysteme. The glass system of layers 4 and 11 should represent at least one binary system. Multi-component systems are preferred.

Als besonders geeignet hat sich das Aufdampfglas Typ 8329 der Firma Schott erwiesen, welches folgende Zusammensetzung in Gewichtsprozent aufweist:


The type 8329 vapor-deposition glass from Schott, which has the following composition in percent by weight, has proven particularly suitable:


Der elektrische Widerstand beträgt ungefähr 1010 Ω/cm (bei 100°C),
der Brechungsindex etwa 1,470,
die Dielektrizitätskonstante ε etwa 4,8 (bei 25°C, 1 MHz) tgδ etwa 80 × 10-4 (bei 25°C, 1 MHz). The electrical resistance is approximately 10 10 Ω / cm (at 100 ° C),
the refractive index is about 1.470,
the dielectric constant ε about 4.8 (at 25 ° C, 1 MHz) tgδ about 80 × 10 -4 (at 25 ° C, 1 MHz).

Zur Erzielung besonderer Eigenschaften der Bauteile kann es zweckmäßig sein, Gläser unterschiedlicher Glaszusammensetzungen für die Glasschichten der Oberseite und der Unterseite zu verwenden. Es ist auch möglich, mehrere Gläser mit unterschiedlichen Eigenschaften, z. B. hinsichtlich Brechungsindex, Dichte, Knoophärte, Dielektrizitätskonstante, tanδ nacheinander auf das Substrat aufzudampfen. It can be used to achieve special properties of the components be appropriate, glasses different Glass compositions for the glass layers of the top and the bottom to use. It is also possible to have several Glasses with different properties, e.g. B. regarding Refractive index, density, Knoop hardness, dielectric constant, evaporate tanδ one after the other onto the substrate.

Anstelle der Elektronenstrahlverdampfung können auch andere Mittel zur Überführung von Materialien, die sich als Glas niederschlagen, angewendet werden. Das Verdampfungsmaterial kann sich beispielsweise in einem Tiegel befinden, der durch eine Elektronenstoßheizung aufgeheizt wird. Eine solche Elektronenstoßheizung beruht auf der Emission von Glühelektronen, die auf den Tiegel hin beschleunigt werden, um mit vorbestimmter kinetischer Energie auf das zu verdampfende Material aufzutreffen. Auch mit diesen Verfahren lassen sich Glasschichten erzeugen, ohne das Substrat, auf dem sich das Glas niederschlägt, allzu stark thermisch zu belasten. Instead of electron beam evaporation, others can Means for transferring materials that are called glass knock down, be applied. The evaporation material can be in a crucible, for example an electron pulse heater is heated. Such Electron impulse heating is based on the emission of Glow electrons that are accelerated towards the crucible, to move towards it with predetermined kinetic energy evaporating material. Even with these procedures layers of glass can be created without the substrate to which the glass condenses, too strongly thermally strain.

Claims (15)

1. Verfahren zur Gehäusebildung bei elektronischen Bauteilen, insbesondere Sensoren, integrierte Schaltungen und optoelektronische Bauelemente; mit folgenden Schritten:
Bereitstellen eines Substrats (1), das einen oder mehrere Bereiche zur Bildung von Halbleiterstrukturen (2) sowie von Anschlussstrukturen (3) aufweist, wobei wenigstens eine erste Substratseite (1a) zu verkapseln ist;
Bereitstellen einer Aufdampfglasquelle (20), die wenigstens ein binäres Glassystem erzeugt;
Anordnen der ersten Substratseite (1a) relativ zur Aufdampfglasquelle derart, dass die erste Substratseite (1a) bedampft werden kann;
Betrieb der Aufdampfglasquelle (20) solange, bis die erste Substratseite (1a) eine Glasschicht (4) trägt, welche eine Dicke im Bereich von 1 bis 1000 µm aufweist. 1. Method for forming housings in electronic components, in particular sensors, integrated circuits and optoelectronic components; with the following steps:
Providing a substrate ( 1 ) which has one or more regions for forming semiconductor structures ( 2 ) and connection structures ( 3 ), at least one first substrate side ( 1 a) being encapsulated;
Providing a vapor deposition glass source ( 20 ) that generates at least one binary glass system;
Arranging the first substrate side ( 1 a) relative to the vapor deposition glass source in such a way that the first substrate side ( 1 a) can be vapor-deposited;
Operation of the vapor deposition glass source ( 20 ) until the first substrate side ( 1 a) carries a glass layer ( 4 ) which has a thickness in the range from 1 to 1000 μm. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß beim Bereitstellen einer Aufdampfglasquelle (20), ein Reservoir mit organischen Bestandteilen bereitgestellt wird, die durch Anlegen eines Vakuums oder durch Erwärmung in den gasförmigen Zustand übergehen, so dass während der Bedampfung Mischschichten aus anorganischen und organischen Bestandteilen auf der Substratseite gebildet werden können. 2. The method according to claim 1, characterized in that when a vapor deposition glass source ( 20 ) is provided, a reservoir is provided with organic constituents which change into the gaseous state by applying a vacuum or by heating, so that mixed layers of inorganic and organic constituents can be formed on the substrate side. 3. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Glasschichtdicke im Bereich zwischen 1 bis 50 µm liegt. 3. The method according to claim 1 or 2, characterized in that the glass layer thickness in Range is between 1 to 50 microns. 4. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass die Glasschichtdicke im Bereich zwischen 50 bis 200 µm liegt. 4. The method according to claim 1 or 2, characterized in that the glass layer thickness in Range is between 50 to 200 microns. 5. Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, dass das Aufdampfglas der Quelle (20) mittels Elektronenstrahl (24) aus einem Glastarget (23) erzeugt wird. 5. The method according to any one of claims 1 to 4, characterized in that the vapor deposition glass of the source ( 20 ) is generated by means of an electron beam ( 24 ) from a glass target ( 23 ). 6. Verfahren nach Anspruch 5, dadurch gekennzeichnet, dass als Aufdampfglas ein Borosilikatglas mit Anteilen von Aluminiumoxid und Alkalioxid verwendet wird. 6. The method according to claim 5, characterized in that as an evaporation glass Borosilicate glass with proportions of aluminum oxide and Alkaline oxide is used. 7. Verfahren nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, dass das Aufdampfglas einen Wärmeausdehnungskoeffizienten nahezu gleich dem des Substrates aufweist. 7. The method according to any one of claims 1 to 6, characterized in that the evaporation glass one Thermal expansion coefficient almost equal to that of Has substrate. 8. Verfahren nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass die Glasschicht (4) in einer Dicke erzeugt wird, wie sie zum hermetischen Abschluss erforderlich ist, und dass eine Kunststoffschicht (5) über der Glasschicht (4) aufgetragen wird, um die weitere Verarbeitung des Substrates (1) zu erleichtern. 8. The method according to any one of claims 1 to 7, characterized in that the glass layer ( 4 ) is produced in a thickness as required for the hermetic seal, and that a plastic layer ( 5 ) is applied over the glass layer ( 4 ), to facilitate further processing of the substrate ( 1 ). 9. Verfahren nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, dass mehrere Schichten Glas auf das Substrat (1) aufgedampft werden, wobei die Glasschichten aus unterschiedlichen Glaszusammensetzungen bestehen können. 9. The method according to any one of claims 1 to 8, characterized in that several layers of glass are evaporated onto the substrate ( 1 ), wherein the glass layers can consist of different glass compositions. 10. Verfahren nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, dass die weitere Verarbeitung des Substrates (1) den Abtrag von Material an einer zweiten Substratseite (1b) umfasst, die der ersten Substratseite (1a) gegenüberliegt. 10. The method according to any one of claims 1 to 9, characterized in that the further processing of the substrate ( 1 ) comprises the removal of material on a second substrate side ( 1 b), which is opposite the first substrate side ( 1 a). 11. Verfahren nach einem der Ansprüche 1 bis 10, dadurch gekennzeichnet, dass das Substrat (1) einen Wafer mit mehreren Halbleiterstrukturen (2) und Bond Pad-Strukturen (3) aufweist, wobei
die zweite, der ersten Substratseite (1a) gegenüberliegende Substratseite (1b) gedünnt wird,
an der zweiten Substratseite (1b) im Bereich der herzustellenden Anschlussstrukturen Gruben (6) geätzt werden,
die Bereiche zur Bildung der Halbleiterstrukturen (2) unter Verwendung von Kunststoffschichten lithographiert werden,
auf der zweiten Substratseite (1b) in den Bereichen mit Bond Pad-Strukturen (3) Leitungskontakte (7) hergestellt werden,
der Kunststoff von der zweiten Substratseite (1b) entfernt wird,
ein Ball Grid Array (8) an den Leitungskontakten (7) aufgebracht wird, und
der Wafer zur Bildung mehrerer elektronischer Bauteile aufgetrennt wird, die jeweils erste, verkapselte Seiten (1a) aufweisen. 11. The method according to any one of claims 1 to 10, characterized in that the substrate ( 1 ) has a wafer with a plurality of semiconductor structures ( 2 ) and bond pad structures ( 3 ), wherein
the second substrate side ( 1 b) opposite the first substrate side ( 1 a) is thinned,
pits ( 6 ) are etched on the second substrate side ( 1 b) in the region of the connection structures to be produced,
the areas for forming the semiconductor structures ( 2 ) are lithographed using plastic layers,
line contacts ( 7 ) are produced on the second substrate side ( 1 b) in the areas with bond pad structures ( 3 ),
the plastic is removed from the second substrate side ( 1 b),
a ball grid array ( 8 ) is applied to the line contacts ( 7 ), and
the wafer is separated to form a plurality of electronic components, each of which has first, encapsulated sides (1a). 12. Verfahren nach Anspruch 11, dadurch gekennzeichnet, dass die zweite Substratseite (1b) mit einem Kunststoffüberzug (10) unter Aussparung der Ball Grid Bereiche (8) versehen wird. 12. The method according to claim 11, characterized in that the second substrate side ( 1 b) is provided with a plastic coating ( 10 ) with the exception of the ball grid areas ( 8 ). 13. Verfahren nach Anspruch 11, dadurch gekennzeichnet,
dass nach Entfernung des Kunststoffes von der zweiten Substratseite (1b) die zweite Substratseite insgesamt mit einer Glasschicht (11) im Bereich von 1 bis 50 µm Dicke bedampft wird, und
dass die Leitungskontakte (7) durch örtliche Beseitigung der Glasschicht (11) freigelegt werden, wonach die Schritte des Aufbringens des Ball Grid Arrays (8) und des Auftrennens erfolgen, um beidseitig verkapselte elektronische Bauteile zu erhalten. 13. The method according to claim 11, characterized in
that after removal of the plastic from the second substrate side ( 1 b), the second substrate side as a whole is vapor-coated with a glass layer ( 11 ) in the range from 1 to 50 μm thick, and
that the line contacts (7) are exposed by local removal of the glass layer (11), which carried out the steps of applying the ball grid array (8) and of separating to obtain both sides of encapsulated electronic components. 14. Verfahren nach einem der Ansprüche 11 bis 13, dadurch gekennzeichnet, dass die Ätzgruben (6), die bis zu den Bond Pad Strukturen (3) führen, mit leitfähigem Material (12) gefüllt werden, wonach mit oder ohne Entfernung des Kunststoffes (10) an der zweiten Substratseite (1b) sowie mit oder ohne Glasschicht (11) auf der zweiten Substratseite (1b) unter Freilassung der Leitungskontakte (7) das Ball Grid Array (8) an den Leitungskontakten (7) bzw. an dem Füllmaterial aufgebracht wird. 14. The method according to any one of claims 11 to 13, characterized in that the etching pits ( 6 ) which lead to the bond pad structures ( 3 ) are filled with conductive material ( 12 ), after which with or without removal of the plastic ( 10 ) on the second substrate side ( 1 b) and with or without a glass layer ( 11 ) on the second substrate side ( 1 b) leaving the line contacts ( 7 ) free, the ball grid array ( 8 ) on the line contacts ( 7 ) or on the Filling material is applied. 15. Elektronisches Bauteil, insbesondere als Sensor oder als integrierte Schaltung oder als optoelektronisches Bauelement, hergestellt nach einem der Ansprüche 1 bis 14. 15. Electronic component, in particular as a sensor or as integrated circuit or as optoelectronic Component manufactured according to one of the claims 1 to 14.
DE10222964A 2002-04-15 2002-05-23 Process for forming housings in electronic components and hermetically encapsulated electronic components Expired - Lifetime DE10222964B4 (en)

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DE10222609A DE10222609B4 (en) 2002-04-15 2002-05-23 Process for producing structured layers on substrates and methodically coated substrate
DE10222964A DE10222964B4 (en) 2002-04-15 2002-05-23 Process for forming housings in electronic components and hermetically encapsulated electronic components
DE10222958A DE10222958B4 (en) 2002-04-15 2002-05-23 Process for producing an organic electro-optical element and organic electro-optical element
AU2003227626A AU2003227626A1 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
CN038133024A CN1659720A (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
PCT/EP2003/003907 WO2003088347A2 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
KR1020047016631A KR100636414B1 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
KR10-2004-7016634A KR20040111528A (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
CA002480691A CA2480691A1 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
AT03737955T ATE411407T1 (en) 2002-04-15 2003-04-15 METHOD FOR COATING METAL SURFACES
PCT/EP2003/003872 WO2003087423A1 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
EP03746297.5A EP1495493B1 (en) 2002-04-15 2003-04-15 Use of a borosilicateglass layer
US10/511,315 US7326446B2 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
CA002480854A CA2480854A1 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
IL16430403A IL164304A0 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
AU2003233973A AU2003233973A1 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
US10/511,334 US7825029B2 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
CNA038085690A CN1647276A (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface as protection for copying process and elements concerned
CA002480737A CA2480737A1 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
US10/511,557 US7396741B2 (en) 2002-04-15 2003-04-15 Method for connecting substrate and composite element
EP03725032.1A EP1495491B1 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
JP2003585174A JP2005528782A (en) 2002-04-15 2003-04-15 Method of connecting board and composite elements
JP2003584357A JP2005528780A (en) 2002-04-15 2003-04-15 Method of forming a housing for an electronic component and electronic component sealed thereby
KR1020047016629A KR100679345B1 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
JP2003585192A JP2005527076A (en) 2002-04-15 2003-04-15 Hermetic sealing of organic electro-optic elements
KR1020117025576A KR101178935B1 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
AU2003233974A AU2003233974A1 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
CNA038085844A CN1646722A (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
JP2003583927A JP2005527459A (en) 2002-04-15 2003-04-15 Method for making a product having a structured surface
AU2003232469A AU2003232469A1 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
US10/511,488 US20060051584A1 (en) 2002-04-15 2003-04-15 Process for producing a product having a structured surface
AT03737956T ATE393839T1 (en) 2002-04-15 2003-04-15 METHOD FOR HOUSING FORMATION FOR ELECTRONIC COMPONENTS AS WELL AS HERMETICALLY ENCAPSULATED ELECTRONIC COMPONENTS
AU2003250326A AU2003250326A1 (en) 2002-04-15 2003-04-15 Method for producing a copy protection for an electronic circuit and corresponding component
CNB03808564XA CN100359653C (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
EP03737955A EP1495153B1 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces
US10/511,566 US7863200B2 (en) 2002-04-15 2003-04-15 Process of vapor depositing glass layers for wafer-level hermetic encapsulation of electronic modules
JP2003584356A JP2006503976A (en) 2002-04-15 2003-04-15 Method for coating a metal surface and substrate having a coated metal surface
CNB038085682A CN100397593C (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
US10/511,558 US7495348B2 (en) 2002-04-15 2003-04-15 Process for producing copy protection for an electronic circuit
JP2003585179A JP2005528783A (en) 2002-04-15 2003-04-15 How to create copy protection for electronic circuits
PCT/EP2003/003883 WO2003088370A2 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
EP03737956A EP1495154B1 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
EP03727305.9A EP1494965B1 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
PCT/EP2003/003884 WO2003088340A2 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
DE50309735T DE50309735D1 (en) 2002-04-15 2003-04-15 METHOD FOR HOUSING FOR ELECTRONIC COMPONENTS SO AS HERMETICALLY CAPTURED ELECTRONIC COMPONENTS
CA002479823A CA2479823A1 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
IL16429003A IL164290A0 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
JP2003585167A JP2005527112A (en) 2002-04-15 2003-04-15 Method for producing pattern layer on substrate
CA002480797A CA2480797A1 (en) 2002-04-15 2003-04-15 Method for producing a copy protection for an electronic circuit and corresponding component
CNB038085836A CN100387749C (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
IL16417103A IL164171A0 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
CA002485022A CA2485022A1 (en) 2002-04-15 2003-04-15 Method for connecting substrates and composite element
PCT/EP2003/003882 WO2003087424A1 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
EP03746159.7A EP1502293B1 (en) 2002-04-15 2003-04-15 Method for the production of structured layers on substrates
TW092108722A TW200407446A (en) 2002-04-15 2003-04-15 Method for producing patterned layers on substrates
CNB038085410A CN1329285C (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
PCT/EP2003/003881 WO2003088354A2 (en) 2002-04-15 2003-04-15 Method for producing a copy protection for an electronic circuit and corresponding component
DE50310646T DE50310646D1 (en) 2002-04-15 2003-04-15 METHOD OF COATING METAL SURFACES
KR1020047016632A KR100789977B1 (en) 2002-04-15 2003-04-15 A process for producing copy protection, an electronic component with the copy protection, a decryption device comprising the component
AU2003245876A AU2003245876A1 (en) 2002-04-15 2003-04-15 Method for forming housings for electronic components and electronic components that are hermetically encapsulated thereby
KR1020047016642A KR100942038B1 (en) 2002-04-15 2003-04-15 Organic electro-optical elements and process for producing organic electro-optical elements
AU2003245875A AU2003245875A1 (en) 2002-04-15 2003-04-15 Method for coating metal surfaces and substrate having a coated metal surface
CA002505014A CA2505014A1 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
EP03727306A EP1495501A2 (en) 2002-04-15 2003-04-15 Hermetic encapsulation of organic electro-optical elements
KR1020047016630A KR100616126B1 (en) 2002-04-15 2003-04-15 Method for forming housing for electronic components and electronic components that are hermetically encapsulated thereby
PCT/EP2003/003873 WO2003086958A2 (en) 2002-04-15 2003-04-15 Method for producing a product having a structured surface
IL16430004A IL164300A0 (en) 2002-04-15 2004-09-27 Method for coating metal surfaces and substrate having a coated metal surface
IL16430104A IL164301A0 (en) 2002-04-15 2004-09-27 Method for connecting substrates and composite element

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