KR100616126B1 - Method for forming housing for electronic components and electronic components that are hermetically encapsulated thereby - Google Patents

Abstract

In order to encapsulate the electronic modules in a manner that is substantially resistant to water diffusion at a suitable temperature below 300 ° C., preferably below 150 ° C., the present invention provides a housing for electronic modules, in particular sensors, integrated circuits and optoelectronic components. Provided is a method for forming, the method comprising the steps of: providing a substrate (a first face 1a of which is at least encapsulated); Providing a vapor deposition glass source 20; Disposing a first side (1a) relative to the vapor deposition glass source such that the first side (1a) of the substrate can be vapor-coated; And vapor-coating the first side of the substrate with the glass layer 4.

Description

METHOD FOR FORMING HOUSING FOR ELECTRONIC COMPONENTS AND ELECTRONIC COMPONENTS THAT ARE HERMETICALLY ENCAPSULATED THEREBY}

The present invention relates to a method of forming a housing of an electronic module and to an electronic module encapsulated encapsulated in this way, in particular sensors, integrated circuits and optoelectronic components.

In order to encapsulate integrated circuits and optoelectronic components, techniques are known for bonding thin glass plates to electronic modules using organic adhesive layers, thus protecting sensitive semiconductor structures. This method has a problem that, over time, moisture diffuses into the organic adhesive layer, reaches the semiconductor structure, and eventually becomes damaged. In addition, the adhesive layer is deteriorated aging characteristics when the UV irradiation, in particular damage the photoelectric components.

As an alternative to the organic adhesive layer, a method of using low melting glass solder as the intermediate layer has already been used, which has been formed by spraying, sputtering, screen printing and dispensing techniques and the like. However, the melting temperature of the glass solder layer is 300 ° C. or higher, which means that a temperature sensitive semiconductor structure cannot be encapsulated.

It is therefore an object of the present invention to provide an encapsulation method of an electronic module which is capable of encapsulation and substantially resistant to water diffusion at a suitable temperature below 300 ° C, preferably below 150 ° C.

This object is achieved on the basis of claim 1 and is constituted by another additional dependent claim. Claim 23 relates to an electronic module that can be manufactured according to the invention, the advantageous improvements and arrangements of which are disclosed in the dependent claims.

One advantage of coating with vapor deposited glass is that by applying an insulating glass layer at room temperature up to about 150 ° C., there is no possibility of surface damage or oxidation, even for metal substrates, regardless of substrate type. In the name of the applicant, there are the following patent applications, the contents of which are incorporated herein by reference.

DE 202 05 830.1, filed April 15, 2002;

DE 102 22 964.3, filed May 23, 2002;

DE 102 22 609.1, filed May 23, 2002;

DE 102 22 958.9, filed May 23, 2002;

DE 102 52 787.3, filed November 13, 2002;

Filed DE 103 01 559.0, 16 January 2003.

Experiments on the barrier properties of vapor-deposited glass layers have shown that using vapor-deposited glass with a thickness of 8 μm to 18 μm, reliable below 10 ⁻⁷ mbar 1 s ⁻¹ or below 10 ⁻⁸ mbar 1 s ⁻¹ Helium leak rate is obtained. Experimental results using 8 μm and 18 μm thicknesses show that the helium leak rate is 0 to 2 × 10 ⁻⁹ mbar 1 s ^−1, which is due to experimental error.

The encapsulation method of vapor deposition glass according to the present invention can be used even when the electronic module is influenced from the outside during the manufacturing process.

Thickening the substrate of the electronic module produced by the vapor deposited glass layer is used to stabilize the substrate while processes are performed on the substrate from the unencapsulated side. Other completed electronic modules can also be encapsulated from the connection side, leaving only the connection itself. To this end, for example, a substrate may be provided with a passivation layer on the opposite side of the first side with the semiconductor structure. For example, a plastic layer is suitable for this purpose. The passivation layer may comprise a glass layer which is preferably vapor deposited on its side.

The method is particularly suitable for packaging (wafer level packaging) components forming part of a wafer, in which case the substrate comprises a wafer having substrates of the components, the components being separated from the wafer after being packaged. have.

Depending on the specific requirements, the thickness of the vapor deposited glass layer can be from 0.01 to 1000 μm. If only the hermetic sealing of the module to be protected is a problem, the thickness of the glass layer is preferably 0.1 to 50 mu m. As the added loads increase, the thickness of the glass layer also increases accordingly, and the preferred glass layer has a thickness of 50 to 200 μm. It is also possible to form a plurality of layers in cooperation with other materials. In addition, it is possible to structurally strengthen the electronic module by combining the glass layer with the plastic layer.

There are various methods for vapor deposition of glass. It is desirable to generate glass vapor from a stock glass target by an electron beam. The vapor deposition rate can be 4 μm / min or more, and as in the case for low melting glass solder, the generated glass is deposited on the surface of the substrate and firmly formed without the need to increase the H ₂ O content for the bonding operation. Combined. Preferred vapor deposition glass is borosilicate glass comprising aluminum oxide and alkali metal oxide components, for example vapor deposition glass of type 8329 manufactured by Schott Glas. In addition, the coefficient of thermal expansion of such glass may be close to the coefficient of thermal expansion of a standard semiconductor substrate, or may be equal to the coefficient of thermal expansion of a substrate by appropriately changing components. In particular in the form of a plurality of layers formed on top of each other, vapor deposition glass of different compositions can be used, in which case the glasses of these layers can have different properties with respect to refractive index, density, hardness and the like.

Vapor phase coating of the substrate with the glass layer includes plasma ion assisted deposition (PDA). In this case, an ion beam is additionally applied to the substrate to be coated. The ion beam can be produced by a plasma source, for example by ionization of a suitable gas. The plasma further increases the density of the layer and removes loosely attached particles from the substrate surface. This results in a higher density of the deposited layers and fewer defects.

In addition, by selecting the appropriate combination of materials, it is possible to implement the application of a mixed layer of inorganic and organic components. This mixed layer is characterized by a reduction in brittleness, ie brittleness.

If a glass layer is applied to the first side of the substrate of the electronic module before the electronic module is fully manufactured, it is convenient to apply the plastic layer over the glass layer to reinforce the module for handling purposes during the completion of the product. . In this case, the glass layer is provided with a thickness sufficient to encapsulate or seal seal against penetration of the diffusion material, and the plastic layer is formed to the thickness required for stabilization during further processing of the module.

In this case, material can be removed from the second unencapsulated substrate side, thereby creating a connection to the module extending from the lower surface into the module, whereby the module is finally installed in its location of use. When protected by the module itself. This feature is especially important for sensors.

The invention is explained with reference to the drawings.

1 is a cross-sectional view of a wafer having a vapor deposited glass layer.

2 is a cross-sectional view of a wafer having a glass layer and a plastic layer.

3 is a cross-sectional view illustrating formation of a connection to the wafer.

4 is a cross-sectional view in which additional plastic passivation is formed on the bottom surface of the wafer;

Fig. 5 is a cross-sectional view showing the coating of the lower surface of the wafer with vapor deposited glass.

FIG. 6 is a cross-sectional view to which a ball grid array is applied to the wafer shown in FIG. 5; FIG.

7 is a cross-sectional view illustrating another method of applying a ball grid array.

8 is a cross-sectional view illustrating encapsulation of the lower surface of the wafer.

FIG. 9 is a sectional view of a ball grid array applied to the wafer shown in FIG. 8; FIG.

10 is a schematic diagram showing a vapor deposition arrangement.

11 is a graph showing the results of TOF-SIMS measurements.

12 is an electron microscope transmission cross-sectional image.

10 shows a vapor-deposition glass source 20 comprising an electron beam generator 21, a beam diverter device 22 and a glass target 23 with which the electron beam 24 impinges. The arrangement of the substrate 1 with respect to FIG. At the location where the electron beam impinges, the glass is vaporized and then deposited on the first side 1a of the substrate 1. The target is rotated and the beam 24 is swept back and forth so that the glass from the target 23 can be vaporized as uniformly as possible. The arrangement also includes a plasma source that generates an ion beam applied to the first side 1a to be coated during operation such that the substrate is transferred to the glass layer by plasma ion assisted deposition (PIAD). It can be coated.

With reference to FIG. 1, the possible board | substrate 1 is demonstrated in more detail. The silicon wafer as the substrate 1 comprises a region 2 with a semiconductor structure and a region 3 with a connection structure, for example made of aluminum. The connecting structure may comprise, for example, bond pads or other connecting surfaces. The silicon wafer constitutes a substrate having a surface roughness of less than 5 μm. The upper surface 1a of the substrate is on the side opposite to the lower surface 1b. Preferably, a glass layer 4 obtained from a vapor deposition glass of type 8329 manufactured by Schott is deposited on the upper surface 1a. This type of glass can be substantially vaporized by the operation of the electron beam 24, which operation is carried out in a vacuum environment with a residual pressure of 10 ⁻⁴ mbar and a bias temperature of 100 ° C. during vaporization. Under these conditions, a dense, continuous glass layer 4 is produced, which is substantially impermeable to liquids and gases, including water, but transmits light, which is important for photoelectric modules. .

The glass layer 4 may also comprise a plurality of individual layers made of glasses having different compositions. The glass layer may also include a mixed layer formed from an inorganic component and an organic component, for example to increase layer flexibility.

For the bottom face 1b of the wafer, additional processing steps may be performed including wet etching, dry etching and plasma etching or cleaning.

1 and also as in FIGS. 2 to 9, when the substrate used is a wafer, the method according to the invention can be usefully used to package components forming part of the wafer. However, the method of the present invention can be applied in the same way to a chip that has already been separated from the wafer and includes semiconductor structures and connection structures.

2 shows a cover layer for the substrate 1, which comprises a glass layer 4 and a plastic layer 5. The glass layer 4 has a thickness of 1 to 50 μm, sufficient for encapsulation or sealing sealing, and the plastic layer 5 is formed thicker, thus providing more flexibility for the wafer as a workpiece for subsequent processing steps. Gives great stability.

3 shows further processing of the wafer. The wafer is thinned on the lower surface, so that the components which can be produced according to the invention have a thin substrate, and etching pit 6 extending to the connecting structure 3 which serves as an etch stop. Is generated. Plastic lithography is performed on the wafer lower surface 1b to open the regions of the connecting structure 3. Thereafter, a line contact 7 is formed on the lower surface, for example, by spraying or sputtering, so that a line contact, that is, a conductive layer 7 is formed in the region of the etch pit 6. Then, the plastic used for lithography is removed from the wafer lower surface 1b. Next, a ball grid array 8 is applied to the conductive layer 7 and the wafer is divided along the face 9. As a result, the semiconductor structure is securely sandwiched between the cover layer 4 and the substrate 1 to obtain a plurality of electronic modules that are hermetically sealed.

4 shows a variant of the embodiment of FIG. 3. The same process steps as described above are performed, but the plastic material on the wafer bottom surface 1b is not removed and the bottom surface is covered with the passivation and protective layer 10.

FIG. 5 shows an embodiment in which the vapor-deposited glass layer 11 is applied to the lower surface 1b of the substrate instead of the plastic layer 10. As in the embodiment of FIG. 3, the plastic used for lithography is removed from the wafer bottom surface 1b and the entire wafer bottom surface 1b is vapor-coated with glass to form a glass layer 11 having a thickness of 1 to 50 μm. do.

Like the plastic layer 10 shown in FIG. 4, the glass layer 11 shown in FIG. 5 serves as a passivation or protective layer.

As indicated by 11b, this glass layer also covers the outer protrusions of the line contacts 7. In order to apply the ball grid array 8 these areas 11b are uncovered by grinding and / or etching. Thereafter, after the ball grid array is applied as shown in FIG. 6, the wafer is divided along face 9 to form individual modules. The sensitive semiconductor structure 2 is protected by glass layers 4, 11 at the top and the bottom, respectively.

In another embodiment of the present invention, the wafer is divided at a split surface 9 that does not pass through the connecting structure. Thereby, an advantage can be obtained that can guarantee side passivation protection for the modules. 7 shows an example of wafer splitting that only affects the material of the cover layer 1 and the substrate 1. The original process is the same as for the exemplary embodiments described above. That is, the wafer is thinned from the lower surface and an etch pit 6 is created which extends to the bottom of the connecting structure. Lithography is performed on the wafer lower surface 1b to open the connection structure region. A line contact 7 is created in the region of the etch pit 6, which is filled with the conductive material 12. At this time, thickening may be considered by electroplating using Ni (P). Thus, components that can be manufactured according to this embodiment of the present invention have through-contack through the substrate.

After at least the plastic material is removed from the wafer bottom surface of the contact 7 region, the ball grid array 8 is applied. Thereafter, the wafer is divided along the dividing surface 9. As a result, the semiconductor structure 2 is sealed sealed, and depending on the process used, an electronic module with or without a similar plastic layer 10 is obtained.

 8 and 9 show an exemplary embodiment of forming the glass layer 11 on the bottom surface. This process is similar to that of the embodiment shown in FIG. 5 with respect to FIG. 7. That is, a filled region is formed directly under the connecting structure, and the entire lower surface 1b of the wafer is coated with the glass layer 11, and as shown in FIG. 9, the glass layer is filled with etched pit. It is removed from the area (6), and a ball grid array is formed there. After the wafer is divided along the dividing surface 9, the semiconductor structures 2 get encapsulated modules.

The glass system of the glass layer 4 or 11 must form at least a two component system. Multi-component systems are preferred.

In weight percent vapor deposition glass having the following composition has been found to be particularly suitable.

Component weight%

SiO ₂ 75-85

B ₂ O ₃ 10-15

Na ₂ O 1-5

Li ₂ O 0.1-1

K ₂ O 0.1-1

Al ₂ O ₃ 1-5

Preferred vapor deposition glass of this type is glass 8329, manufactured by Schott, having the following composition:

SiO ₂ 84.1%

B ₂ O ₃ 11.0%

2.0% ]Na ₂ O

2.0%]

0.3% } 2.3% (층 내에서 ⇒ 3.3%)K ₂ O

0.3%} 2.3% (in layers ⇒ 3.3%)

0.3% ]Li ₂ O

0.3%]

2.6% (층 내에서 < 0.5%) Al ₂ O ₃

2.6% (<0.5% in layer)

The values given in parentheses represent the weight percent of each component in the vapor deposition layer.

The electrical resistance is about 10 ¹⁰ mA / cm (at 100 ° C.), the refractive index is about 1.470, the dielectric constant (ε) is about 4.7 (at 25 ° C., 1 MHz) and tgδ is (at 25 ° C., 1 MHz) About 45 × 10 ⁻⁴ .

Another group of suitable vapor deposition glasses has the following composition in weight percent:

Component weight%

SiO ₂ 65-75

B ₂ O ₃ 20-30

Na ₂ O 0.1-1

Li ₂ O 0.1-1

K ₂ O 0.5-5

Al ₂ O ₃ 0.5-5

Preferred vapor deposition glass from this group is glass G018-189 manufactured by Schott, having the following composition:

Component weight%

SiO ₂ 71

B ₂ O ₃ 26

Na ₂ O 0.5

Li ₂ O 0.5

K ₂ O 1.0

Al ₂ O ₃ 1.0

Glasses 8329 and G018-189 which are preferably used have in particular the properties listed in the table below:

characteristic 8329 G018-189 α _20-300 [10 ^-6 K ^-1 ] 2.75 3.2 Density (g / cm ³ ) 2.201 2.12 Strain point [℃] 562 742 Refractive index nd 1.469 1.465 Hydrolysis resistance class according to ISO 719 One 2 Acid resistance class according to DIN 12 116 One 2 Alkali resistance class according to DIN 52322 2 3 Dielectric Constant ε (25 ℃) 4.7 (1 MHz) 3.9 (40 GHz) tanδ (25 ℃) 45 * 10 ^-4 (1 MHz) 26 * 10 ^-4 (40 GHz)

In order to obtain specific properties in the modules, it is desirable to use glass of different composition for the glass layers on the top and bottom surfaces. In addition, a plurality of glasses having different properties in relation to, for example, refractive index, density, E modulus, Knoop hardness, dielectric constant, tan δ may be sequentially deposited on the substrate.

In addition, as an alternative to electron beam deposition, other means of delivering the material deposited in the form of glass may be used. For example, the vapor coating material may be in a crucible, which is heated by electron impact heat treatment. This type of electron impact heat treatment is based on a thermoionic discharge that is accelerated on the crucible with a predetermined kinetic energy so that it can be vaporized by impacting the material. This method can also form glass layers without causing excessive heat load on the substrate on which the glass is deposited.

In the following, the results of various tests performed on the vapor deposition glass layer formed from glass 8329 are shown.

FIG. 11 shows the result of the TOF-SIMS measurement, which shows the count rate as a function of the sputtering time. These measurements show the characteristic of the profile of urea concentration in the direction perpendicular to the substrate surface. Thickness uniformity of the glass frame of less than 1% of the layer thickness was measured.

12 shows an electron microscope transmission cross-sectional image of a silicon substrate coated with vapor deposition glass 8329. The vapor deposited glass and silicon substrate surfaces are tightly bonded to each other and are not separated by the transmissive cross-sectional motion required to prepare the specimen.

In addition, according to DIN / ISO, resistance and stability measurements were made on the vapor deposition glass layer formed from vapor deposition glass 8329. The results are given in Table 1.
Sample designation: 8329 Water DIN ISO719 Rating HCl consumption [ml / g] Na ₂ O equivalent [μg / g] comment HGB 1 0.011 3 none Acid DIN 12116 Rating Substance removal [mg / dm ² ] Total surface area [cm ² ] Comment / visible change 1 W as a substance 0.4 2 × 40 Unchanged Alkali DIN ISO 695 Grade Substance removal [mg / dm ² ] Total surface area [cm ² ] Comment / visible change A2 as a substance 122 2 × 14 Unchanged

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Claims (33)

A method of forming a housing of an electronic module, Providing a substrate (1), wherein the substrate (1) comprises a semiconductor structure (2) and a connecting structure (3) or one for forming such a semiconductor structure (2) and a connecting structure (3). Having the above regions, at least the first face 1a of the substrate 1 being encapsulated; Providing a vapor-deposition glass source 20; Placing the first side (1a) relative to the vapor deposition glass source such that the first side (1a) of the substrate is vapor coated; Vapor-coating the first side of the substrate with a glass layer (4); Thinning the lower surface 1b of the substrate 1; Creating an etching pit 6; And Forming a line contact (7) on said bottom surface (1b). The method of claim 1, At least one region having said semiconductor structure (2) is arranged on a first side (1a) of said substrate. The method of claim 2, A passivation layer (10, 11) is provided on a second side (1b) opposite the first side (1a) of the substrate. The method of claim 1, The substrate (1) comprises a wafer and the method comprises the packaging of components forming part of the wafer. The method of claim 1, The substrate (1) is a method of forming a housing of an electronic module, characterized in that it is vapor-coated with a glass layer (4, 10, 11) on both sides (1a, 1b). The method of claim 1, A vapor deposition glass source (20) is provided that produces at least a two-component glass system. The method of claim 1, The vapor deposition glass source (20) is operated until the glass layer (4) has a thickness of 0.01 to 1000 μm on the first side of the substrate. The method of claim 1, As part of providing the vapor deposited glass source 20, a reservoir comprising organic components is provided, which organic components are converted to a vapor state through the application of a vacuum or by heat treatment, so that during the vapor phase coating, inorganic and organic Mixed layers comprising components can be formed on the substrate side. The method of claim 1, The thickness of the glass layer is a method for forming a housing of the electronic module, characterized in that 0.1 to 50 ㎛. The method of claim 1, The thickness of the glass layer is a method for forming a housing of the electronic module, characterized in that 50 to 200 ㎛. The method of claim 1, The vapor deposition glass of the source (20) is generated from the glass target (23) by the electron beam (24). The method of claim 11, The vapor deposition glass used is a borosilicate glass comprising aluminum oxide and alkali metal oxide components. The method of claim 1, And the coefficient of thermal expansion of the vapor deposition glass is equal to the coefficient of thermal expansion of the substrate. The method of claim 1, The glass layer 4 is formed to a thickness required for sealing sealing, and a plastic layer 5 is formed on the glass layer 4 to facilitate further processing of the substrate 1. A method of forming a housing of an electronic module. The method of claim 1, A plurality of glass layers are vapor deposited on the substrate (1), the glass layers having a different glass composition. The method of claim 14, A further process of the substrate (1) comprises removing material from the second surface (1b) on the opposite side of the first surface (1a) of the substrate (1). . The method of claim 1, The substrate 1 comprises a wafer having a plurality of semiconductor structures 2 and a connecting structure 3, wherein the second surface 1b on the opposite side of the first surface 1a of the substrate is thinned, The pit 6 is etched in the region where the connection structure is formed on the second surface 1b, and the region for forming the semiconductor structure 2 is lithography using a plastic layer, Line contacts 7 are formed in the areas with the connecting structure 3 on the second side 1b of the substrate, the plastic is removed from the second side 1b of the substrate, and the line To the contacts 7 is applied a ball grid array 8, and Dividing the wafer to form a plurality of electronic modules each having an encapsulated first surface (1a). The method of claim 17, A method of forming a housing of an electronic module, characterized in that a plastic cover layer (10) is provided on the second side (1b) of the substrate, leaving the ball grid area (8). The method of claim 17, After the plastic is removed from the second surface 1b of the substrate, the entire second surface of the substrate is vapor-coated with the glass layer 11, and the glass layer 11 is locally removed to form the line contact ( 7) exposing, followed by applying a ball grid array (8) and dividing the wafer to obtain electronic modules encapsulated on both sides. The method of claim 19, Wherein the entire second side of the substrate is vapor-coated with a glass layer (11) having a thickness of 1 to 50 μm. The method according to any one of claims 17 to 20, The etch pit 6 leading to the connecting structure 3 is filled with a conductive material 12, with or without the plastic 10 removed from the second side 1b of the substrate, and With or without the glass layer 11 on the second side 1b of the substrate, the line contact 7 is exposed and a ball grid array 8 is applied to the line contact 7 or fill. Forming a housing of the electronic module. The method of claim 1, Vapor-coating the first side (1a) of the substrate with a glass layer (4) comprises plasma ion assisted deposition (PIAD). An electronic module manufactured by the method according to any one of claims 1 to 16. The method of claim 23, wherein The first side 1a of the substrate has at least one region with a semiconductor structure 2 and a connecting structure 3, said substrate being coated with a vapor deposition glass layer 4 on at least one side. Electronic module. The method of claim 24, Electronic module, characterized in that a plastic layer (5) is applied to the glass layer (4) to strengthen the module. The method of claim 24 or 25, And the substrate is thinner. The method of claim 24, An electronic module, characterized in that a passivation layer (10, 11) is provided on a second side (1b) opposite the first side (1a) of the substrate having the semiconductor structure and the connection structure. The method of claim 24, The glass layer (4) is characterized in that it comprises a mixed layer of inorganic and organic components. The method of claim 24, An electronic module comprising a glass layer (4) in multiple layers. The method of claim 29, And wherein the individual layers of the glass layer have different compositions. The method of claim 24, The substrate (1) is characterized in that it has a line contact on the second side (1b), which is connected to the connection structure on the first side (1b). The method of claim 31, wherein And a ball grid array (8) formed in said line contacts. ㅇ delete

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