CN220895512U - Gallium nitride power device - Google Patents
Gallium nitride power device Download PDFInfo
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- CN220895512U CN220895512U CN202322261030.5U CN202322261030U CN220895512U CN 220895512 U CN220895512 U CN 220895512U CN 202322261030 U CN202322261030 U CN 202322261030U CN 220895512 U CN220895512 U CN 220895512U
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 51
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 48
- 229910052751 metal Inorganic materials 0.000 claims abstract description 100
- 239000002184 metal Substances 0.000 claims abstract description 100
- 238000002161 passivation Methods 0.000 claims abstract description 63
- 230000004888 barrier function Effects 0.000 claims abstract description 61
- 239000000758 substrate Substances 0.000 claims abstract description 30
- 230000005684 electric field Effects 0.000 abstract description 26
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 11
- 230000000694 effects Effects 0.000 description 7
- 230000001939 inductive effect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The embodiment of the application provides a gallium nitride power device, and relates to the technical field of semiconductor device structures. The gallium nitride power device comprises a substrate, a buffer layer and a barrier layer which are arranged layer by layer. A P-type gallium nitride layer and drain electrode metal are arranged on one surface of the barrier layer, which is far away from the substrate, at intervals, and a grid electrode metal is arranged on one surface of the P-type gallium nitride layer, which is far away from the substrate; a passivation layer is arranged on one surface of the barrier layer, which is far away from the substrate, and between the gate metal and the drain metal; a high-K dielectric layer is provided in a partial region between the passivation layer and the barrier layer, or in a partial region of a side of the passivation layer remote from the barrier layer. The high-K dielectric layer can play a role in reducing the electric field peak value at the edge of the electrode or the edge of the field plate, so that more uniform electric field distribution is obtained, and the withstand voltage of the device is improved.
Description
Technical Field
The application relates to the technical field of semiconductor device structures, in particular to a gallium nitride power device.
Background
For gallium nitride power devices, when the drain is biased in the off state, a very high electric field peak occurs at the edge of the gate drain, mainly due to the gate electric field concentration effect. When the intensity of this electric field spike is large enough, the carriers get large enough energy to impact ionization, and the leakage current increases dramatically, causing device breakdown.
In an unclamped inductive load switch (Unclamped Inductive Switching, UIS), a system inductive element causes a voltage overshoot condition of a gallium nitride high electron mobility transistor to occur frequently in the switching process, the avalanche capability of the gallium nitride high electron mobility transistor is weak, the UIS leaks and presses to overshoot to a larger value under a stress condition, a high electric field is generated near the drain electrode of the device, and the drain electrode region is burnt. The peak electric field is typically dispersed to the edges of the field plate using field plate structures, but new electric field peaks are also created at the field plate edges.
Therefore, how to obtain more uniform electric field distribution and improve the withstand voltage of the device is a technical problem to be solved.
Disclosure of utility model
The application aims to provide a gallium nitride power device, which aims to solve the technical problems of obtaining more uniform electric field distribution and improving the withstand voltage of the device in the prior art.
In order to achieve the above purpose, the following technical scheme is adopted in the embodiment of the application.
In a first aspect, an embodiment of the present application provides a gallium nitride power device, including a substrate, a buffer layer, and a barrier layer disposed layer by layer.
A P-type layer P-type gallium nitride layer, source metal and drain metal are arranged on one surface of the barrier layer, which is far away from the substrate, at intervals, the source metal and the drain metal are positioned on two sides of the P-type gallium nitride layer, and a gate metal is arranged on one surface of the P-type layer P-type gallium nitride layer, which is far away from the substrate;
A passivation layer is arranged on one surface of the barrier layer, which is far away from the substrate, and between the gate metal and the drain metal;
A second passivation layer is arranged on one surface of the barrier layer, which is far away from the substrate, and between the gate metal and the source metal;
A high K dielectric layer is disposed in a partial region between the passivation layer and the barrier layer, or in a partial region of a side of the passivation layer remote from the barrier layer.
Optionally, the positions of the high-K dielectric layers are: between the passivation layer and the barrier layer and in contact with the gate metal.
Optionally, the positions of the high-K dielectric layers are: between the passivation layer and the barrier layer and in contact with the drain metal.
Optionally, the gallium nitride power device further comprises a field plate;
A portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
The positions of the high-K dielectric layers are as follows: between the passivation layer and the barrier layer, and between the portion of the field plate and the barrier layer, and not in contact with both the drain metal and the gate metal.
Optionally, the positions of the high-K dielectric layers are: and one surface of the passivation layer, which is far away from the barrier layer, is contacted with the gate metal.
Optionally, the positions of the high-K dielectric layers are: and one surface of the passivation layer, which is far away from the barrier layer, is contacted with the drain metal.
Optionally, the gallium nitride power device further comprises a field plate;
A portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
The positions of the high-K dielectric layers are as follows: on a side of the passivation layer remote from the barrier layer and between the portion of the field plate and the barrier layer and not in contact with both the drain metal and the gate metal.
Optionally, the high-K dielectric layer is between the passivation layer and the barrier layer, and the high-K dielectric layer includes a first high-K dielectric layer, a second high-K dielectric layer, and a third high-K dielectric layer; the gallium nitride power device further comprises a field plate; a portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
the first high-K dielectric layer is in contact with the gate metal;
The second high-K dielectric layer is in contact with the drain metal;
The third high-K dielectric layer is between the portion of the field plate and the barrier layer and is not in contact with both the drain metal and the gate metal.
Optionally, the high-K dielectric layer is on a surface of the passivation layer away from the barrier layer, and the high-K dielectric layer includes a first high-K dielectric layer, a second high-K dielectric layer, and a third high-K dielectric layer; the gallium nitride power device further comprises a field plate; a portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
the first high-K dielectric layer is in contact with the gate metal;
The second high-K dielectric layer is in contact with the drain metal;
The third high-K dielectric layer is between the portion of the field plate and the barrier layer and is not in contact with both the drain metal and the gate metal.
Optionally, the gallium nitride power device further comprises an oxide layer; the oxide layer is positioned on one surface of the passivation layer, which is far away from the substrate.
Compared with the prior art, the application has the following beneficial effects:
According to the gallium nitride power device provided by the embodiment of the application, the high-K dielectric layer is arranged in the partial area above or below the passivation layer between the P-type gallium nitride layer and the drain metal, so that the effect of reducing the electric field peak value at the edge of the electrode or the edge of the field plate can be achieved, more uniform electric field distribution is obtained, and the withstand voltage of the device is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a cross-section of a GaN power device with a gate field plate;
FIG. 2 is a schematic diagram of a cross-section of a GaN power device with a source field plate;
fig. 3 is a schematic diagram of another cross-section of the gallium nitride power device of fig. 2;
FIG. 4 is a schematic diagram of six locations for adding a high-K dielectric layer according to an embodiment of the present application;
Fig. 5 is a schematic diagram of a gallium nitride power device with a source field plate according to an embodiment of the present application, in which 3 high-K dielectric layers are added between a passivation layer and a barrier layer;
FIG. 6 is a graph showing the comparison of the lateral electric field distribution effect of the deposited high-K dielectric layer and the non-deposited high-K dielectric layer of FIG. 5;
FIG. 7 is a schematic diagram of a high-K dielectric layer between a passivation layer and a barrier layer and added at the edge of a gate electrode according to an embodiment of the present application;
FIG. 8 is a schematic diagram of a high-K dielectric layer between a passivation layer and a barrier layer and between a gate and a drain and under a field plate according to an embodiment of the present application;
FIG. 9 is a schematic diagram of a high-K dielectric layer between a passivation layer and a barrier layer and at the edge of a drain electrode according to an embodiment of the present application;
FIG. 10 is a schematic diagram of adding 3 high-K dielectric layers over a passivation layer according to an embodiment of the present application;
FIG. 11 is a schematic diagram of a high-K dielectric layer provided above a passivation layer and at the edge of a gate electrode according to an embodiment of the present application;
FIG. 12 is a schematic illustration of an embodiment of the present application with a high-K dielectric layer added between the gate and the drain and under the field plate;
Fig. 13 is a schematic diagram of adding a high K dielectric layer on the edge of the drain electrode over the passivation layer according to an embodiment of the present application.
Reference numerals illustrate:
101-substrate
102-Buffer layer
103-Barrier layer
104-P type gallium nitride layer
105-Drain metal
106-Gate metal
107 Passivation layer
108-Part of field plate
109-High-K dielectric layer
1091-First high-K dielectric layer
1092-Second high-K dielectric layer
1093-Third high-K dielectric layer
110-Source Metal
111-Oxide layer
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and the described embodiments are some embodiments of the present application, but not all embodiments of the present application. The components of the embodiments of the present application generally described in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application. The following embodiments and features of the embodiments may be combined with each other without conflict.
In the description of the present application, it should be noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The term "coupled" is to be interpreted broadly, as being a fixed connection, a removable connection, or an integral connection, for example; can be directly connected or indirectly connected through an intermediate medium.
When the drain electrode of the gallium nitride power device is biased in the off state, an extremely high electric field peak value appears at the edge of the gate electrode drain electrode, and in order to reduce the electric field peak value, one measure is to disperse the peak electric field to the edge of a metal field plate by adopting a field plate structure, wherein the field plate can be a gate electrode field plate or a source electrode field plate, and fig. 1 is a schematic cross-sectional view of the gate electrode field plate, and the gate electrode is connected with the field plate; fig. 2 is a schematic cross-sectional view of a source field plate with a source connected to the field plate. To allow the gate of fig. 2 to be connected, another cross-section of the device corresponding to fig. 2 is shown in fig. 3.
After the field plate is added, new electric field peaks are generated at the edges of the field plate.
In order to obtain uniform electric field distribution and improve the withstand voltage of the device, referring to fig. 4, the embodiment of the application provides a gallium nitride power device, which is added with a high-K dielectric layer (such as HfO 2), specifically:
the gallium nitride power device comprises a substrate 101, a buffer layer 102 and a barrier layer 103 which are arranged layer by layer;
A P-type gallium nitride layer 104 and drain metal 105 are arranged on one surface of the barrier layer 103 away from the substrate 101 at intervals, and a gate metal 106 is arranged on one surface of the P-type gallium nitride layer 104 away from the substrate 101;
A passivation layer 107 is provided on a surface of the barrier layer 103 remote from the substrate 101 and between the gate metal 106 and the drain metal 105;
A high K dielectric layer is provided in a partial region between the passivation layer 107 and the barrier layer 103, or in a partial region of a side of the passivation layer 107 remote from the barrier layer 103, i.e. in one or several of the positions identified 1, 2, 3, 4, 5, 6 in the figure.
According to the above structure, the beneficial effects can be explained from the principle: since high-K dielectric layers are provided in the partial region above or below the passivation layer 107 between the P-type gallium nitride layer 104 and the drain metal 105, these high-K dielectric layers can function to reduce the peak value of the electric field at the edge of the electrode or the edge of the field plate, so that a more uniform electric field distribution can be obtained for the entire gallium nitride power device, and the withstand voltage of the device can be improved.
In fig. 4, a source metal 110 is disposed on the left side of the gate metal 106, and a passivation structure, which may be referred to as a second passivation layer, is disposed over the barrier layer 103 between the source metal 110 and the gate metal 106. An oxide layer may be further added on the structure shown in fig. 4, so that the passivation layer and the high K dielectric layer are not exposed.
Typical materials for the layers of fig. 4 are for example:
substrate-silicon;
Buffer layer-GaN;
Barrier layer-AlGaN;
Passivation layer-silicon nitride;
The above are typical material choices and other alternative materials may be used instead.
Positions 1-6 in fig. 4 can be described as follows:
Position 1: between the passivation layer 107 and the barrier layer 103 and in contact with the gate metal 106.
Position 2: between the passivation layer 107 and the barrier layer 103 and not in contact with the gate metal 106 and the drain metal 105.
Position 3: between the passivation layer 107 and the barrier layer 103 and in contact with the drain metal 105.
Position 4: on the side of the passivation layer 107 remote from the barrier layer 103 and in contact with the gate metal 106.
Position 5: the passivation layer 107 is not in contact with the gate metal 106 and the drain metal 105 on a surface away from the barrier layer 103.
Position 6: on the side of the passivation layer 107 remote from the barrier layer 103 and in contact with the drain metal 105.
The high-K dielectric layers are arranged at the different positions, so that the effects are slightly different, and the following effects are achieved in general: the electric field peaks at the gate edges are reduced or, if present, at the field plate edges may also be reduced.
Fig. 5 shows the gallium nitride power device with the addition of a source field plate and oxide layer, the field plate metal 108 being connected to the source metal, a portion 108 of the field plate being between the gate metal 106 and the drain metal 105 and on the side of the passivation layer 107 remote from the substrate 101; a high K dielectric layer may be disposed under this portion 108 of the field plate to reduce the electric field at the edge of the field plate.
In fig. 5, a high-K dielectric layer is between the passivation layer and the barrier layer, and the high-K dielectric layer includes a first high-K dielectric layer 1091, a second high-K dielectric layer 1092, and a third high-K dielectric layer 1093:
the first high-K dielectric layer 1091 is in contact with the gate metal 106;
A second high-K dielectric layer 1092 is in contact with the drain metal 105;
A third high K dielectric layer 1093 is between the portion 108 of the field plate and the barrier layer 103 and is not in contact with both the drain metal 105 and the gate metal 106.
In fig. 5, the oxide layer 111 between this portion 108 of the field plate and the drain is thicker than the oxide layer between this portion 108 of the field plate and the source because of the following process:
1) Firstly, generating an oxide layer at a position between the 108 and the drain electrode;
2) Regenerating 108 the field plate;
3) Generating an oxide layer from the source electrode to the drain electrode; from the above 3 steps, it can be seen that the oxide layer from the source to 108 is a single oxide layer and is therefore relatively thin, while the oxide layer from 108 to the drain is a double oxide layer and is therefore relatively thick.
Fig. 6 shows the lateral electric field distribution effect of the deposited high-K dielectric layer in three places of fig. 5 compared with that of the non-deposited high-K dielectric layer, and it can be seen that the electric field at the gate electrode, the field plate and the drain electrode is significantly reduced and the electric field distribution is more uniform after the high-K dielectric layer is added.
Fig. 7 to 9 show embodiments in positions 1, 2 and 3, respectively.
Fig. 10 illustrates an embodiment in which a first high-K dielectric layer is disposed on a side of passivation layer 107 remote from barrier layer 103, similar to fig. 5, the high-K dielectric layer including a first high-K dielectric layer 1091, a second high-K dielectric layer 1092, and a third high-K dielectric layer 1093, but in a different location than that of fig. 5, to provide a similar effect.
Fig. 11-13 show embodiments that are only at positions 4, 5, and 6, respectively, and can all function to reduce local electric field peaks.
The above-described embodiments of the apparatus and system are merely illustrative, and some or all of the modules may be selected according to actual needs to achieve the objectives of the present embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
The foregoing is only a preferred embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the technical scope of the present application should be covered by the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims (10)
1. The gallium nitride power device is characterized by comprising a substrate, a buffer layer and a barrier layer which are arranged layer by layer;
A P-type gallium nitride layer, source metal and drain metal are arranged on one surface of the barrier layer, which is far away from the substrate, at intervals, the source metal and the drain metal are positioned on two sides of the P-type gallium nitride layer, and a gate metal is arranged on one surface of the P-type gallium nitride layer, which is far away from the substrate;
A passivation layer is arranged on one surface of the barrier layer, which is far away from the substrate, and between the gate metal and the drain metal;
A second passivation layer is arranged on one surface of the barrier layer, which is far away from the substrate, and between the gate metal and the source metal;
A high K dielectric layer is disposed in a partial region between the passivation layer and the barrier layer, or in a partial region of a side of the passivation layer remote from the barrier layer.
2. The gallium nitride power device of claim 1, wherein the high-K dielectric layer is located at: between the passivation layer and the barrier layer and in contact with the gate metal.
3. The gallium nitride power device of claim 1, wherein the high-K dielectric layer is located at: between the passivation layer and the barrier layer and in contact with the drain metal.
4. The gallium nitride power device of claim 1, further comprising a field plate;
A portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
The positions of the high-K dielectric layers are as follows: between the passivation layer and the barrier layer, and between the portion of the field plate and the barrier layer, and not in contact with both the drain metal and the gate metal.
5. The gallium nitride power device of claim 1, wherein the high-K dielectric layer is located at: and one surface of the passivation layer, which is far away from the barrier layer, is contacted with the gate metal.
6. The gallium nitride power device of claim 1, wherein the high-K dielectric layer is located at: and one surface of the passivation layer, which is far away from the barrier layer, is contacted with the drain metal.
7. The gallium nitride power device of claim 1, further comprising a field plate;
A portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
The positions of the high-K dielectric layers are as follows: on a side of the passivation layer remote from the barrier layer and between the portion of the field plate and the barrier layer and not in contact with both the drain metal and the gate metal.
8. The gallium nitride power device of claim 1, wherein the high-K dielectric layer is between the passivation layer and the barrier layer, the high-K dielectric layer comprising a first high-K dielectric layer, a second high-K dielectric layer, and a third high-K dielectric layer;
The gallium nitride power device further comprises a field plate; a portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
the first high-K dielectric layer is in contact with the gate metal;
The second high-K dielectric layer is in contact with the drain metal;
The third high-K dielectric layer is between the portion of the field plate and the barrier layer and is not in contact with both the drain metal and the gate metal.
9. The gallium nitride power device of claim 1, wherein the high-K dielectric layer is on a side of the passivation layer away from the barrier layer, the high-K dielectric layer comprising a first high-K dielectric layer, a second high-K dielectric layer, and a third high-K dielectric layer;
The gallium nitride power device further comprises a field plate; a portion of the field plate is between the gate metal and the drain metal and on a side of the passivation layer remote from the substrate;
the first high-K dielectric layer is in contact with the gate metal;
The second high-K dielectric layer is in contact with the drain metal;
The third high-K dielectric layer is between the portion of the field plate and the barrier layer and is not in contact with both the drain metal and the gate metal.
10. The gallium nitride power device of claim 1, further comprising an oxide layer; the oxide layer is positioned on one surface of the passivation layer, which is far away from the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322261030.5U CN220895512U (en) | 2023-08-21 | 2023-08-21 | Gallium nitride power device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322261030.5U CN220895512U (en) | 2023-08-21 | 2023-08-21 | Gallium nitride power device |
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| Publication Number | Publication Date |
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| CN220895512U true CN220895512U (en) | 2024-05-03 |
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| CN202322261030.5U Active CN220895512U (en) | 2023-08-21 | 2023-08-21 | Gallium nitride power device |
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