CN113394284B - High-voltage MIS-HEMT device with composite layer structure - Google Patents
High-voltage MIS-HEMT device with composite layer structure Download PDFInfo
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- 239000002131 composite material Substances 0.000 title claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000012535 impurity Substances 0.000 claims abstract description 6
- 230000005533 two-dimensional electron gas Effects 0.000 claims description 26
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 24
- 239000004047 hole gas Substances 0.000 claims description 20
- 229910052757 nitrogen Inorganic materials 0.000 claims description 12
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- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- 238000004891 communication Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
Abstract
The invention provides a high-voltage MIS-HEMT device with a composite layer structure, which comprises: substrate, al intentionally doped with P-type impurity and provided on the substrate x Ga 1‑x N layer, 0<x<1, provided at Al x Ga 1‑x An unintentionally doped GaN layer on the N layer, a drain electrode disposed on the surface of the GaN layer, and unintentionally doped striped Al y Ga 1‑y N layers, x<y is less than or equal to 1, striped Al y Ga 1‑y The N layer is parallel strip-shaped regions extending from the drain region to the source region, the strip-shaped regions are not in direct contact with the drain region, and the strip-shaped Al layer y Ga 1‑y A source electrode and a grid electrode are arranged on the surface of the N layer; the MIS-HEMT device provided by the invention realizes smaller parasitic capacitance while ensuring high breakdown voltage, and is suitable for the application field with higher requirements on output power and working frequency.
Description
Technical Field
The invention belongs to the technical field of semiconductors, relates to a High Electron Mobility Transistor (HEMT), and particularly relates to a high-voltage MIS-HEMT device with an AlGaN/GaN/AlGaN composite layer structure.
Background
In the field of radio frequency and power integrated circuits, the frequency, voltage resistance, on-resistance and other characteristics of devices are important indexes for determining circuit characteristics, and at present, along with the continuous improvement of the integration level of power integrated circuits, the requirements of the power integrated circuits on various characteristics of circuits and devices are higher and higher. In a radio frequency power device, because a HEMT (high electron mobility transistor) device has the characteristics of large current, high temperature resistance, ultra high speed, low power consumption and low noise compared with other power devices, the HEMT device greatly meets the special requirements of ultra high speed computers and signal processing, satellite communication and other applications, and is widely concerned by the people in the industry.
For a conventional HEMT device, the structure thereof includes a substrate, a buffer layer, a barrier layer, a gate, a source and a drain. When the HEMT device works, the two-dimensional electron gas of the heterojunction interface serves as a conductive channel, and the on and off of the channel are controlled by the depletion effect of the grid voltage on the two-dimensional electron gas. However, in the operating state of the device, the breakdown voltage of the device is reduced by the electric field peak formed at the edge of the gate and the drain, and the maximum output power of the HEMT device is limited. At present, the main voltage-resistant technologies include a Field plate technology, a Reduced Surface Field (RESURF) technology, a superlattice buffer layer technology, a buffer layer carbon-doped technology and the like. Some of these techniques introduce large parasitic capacitance, and some techniques have difficulty in implementation. Therefore, in view of the above technical problems, it is necessary to design a novel voltage withstanding structure suitable for GaN-based devices.
Disclosure of Invention
The invention provides a high-voltage MIS-HEMT device with an AlGaN/GaN/AlGaN composite layer structure, aiming at the problems that the realization of a voltage-resistant structure of an HEMT device in the prior art is difficult in process, limited in promotion of breakdown voltage, large in introduced parasitic capacitance and the like.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a high-voltage MIS-HEMT device having a composite layer structure, comprising: substrate 1, al intentionally doped with P-type impurity provided on substrate 1 x Ga 1-x N layer 2,0<x<1, provided at Al x Ga 1-x An unintentionally doped GaN layer 3 on the N layer 2, a drain electrode 6 provided on the surface of the GaN layer 3, and unintentionally doped striped Al y Ga 1-y N layer 4,x<y is less than or equal to 1, striped Al y Ga 1-y The N layer 4 is a parallel strip-shaped area extending from the drain area to the source area, the strip-shaped areas are not in direct contact with the drain area, and the strip-shaped Al y Ga 1- y A source electrode 5 and a grid electrode 7 are arranged on the surface of the N layer 4;
the Al is x Ga 1-x N2, gaN layer 3, and striped Al y Ga 1-y The N layer 4 grows on the nitrogen surface, and the Al grows under the combined action of spontaneous polarization and piezoelectric polarization effect x Ga 1-x The N layer 2 and the GaN layer 3 form a fixed positive charge at the interface where they contact; al (Al) x Ga 1-x Positive charges are fixed at the interface between the N layer 2 and the GaN layer 3 without being coated with striped Al y Ga 1-y The lower surface of the GaN layer 8 region covered by the N layer induces two-dimensional electron gas 9 to be used as a conducting channel of the MIS-HEMT device; in the form of streaky Al y Ga 1-y N layer 4 covering the area, the striped Al y Ga 1-y The N layer 4 and the GaN layer 3 form negative fixed charges at their contact interface, the surface density of the negative fixed charges is high enough that the positive fixed charges at the lower surface of the GaN layer 3 are compensated so as not to induce two-dimensional electron gas, and at the same time the negative fixed charges induce two-dimensional hole gas 10 at the upper surface of the GaN layer 3 that it covers;
the source electrode 5 and the drain electrode 6 are respectively arranged on the striped Al y Ga 1-y Both ends of the N layer 4 form ohmic contact with the two-dimensional electron gas 9 conducting channel; the gate 7 is arranged between the source 5 and the drain 6 and is made of striped Al y Ga 1-y On the N layer 4, the grid 7 and the striped Al y Ga 1-y The N layer 4 forms a metal-insulator-semiconductor structure; striped Al y Ga 1-y The two-dimensional hole gas 10 in the region covered by the N layer 4 is electrically connected with the source electrode 5, and the two-dimensional hole gas 10 is not connected with the strip-shaped Al y Ga 1- y The two-dimensional electron gas 9 on the lower surface of the N-layer covered GaN layer 8 forms a super junction.
Preferably, the device surface is covered with an insulating medium 11, and the insulating medium 11 and the insulating medium 12 under the gate 7 are the same material or different materials.
Preferably, a field plate 13 extending from the drain region in the direction of the source region is provided above the insulating medium 11 on the right side of the gate 7.
The working principle of the device provided by the invention is as follows:
when the device is in an off state and the drain voltage is increased, the device is not coated with the striped Al y Ga 1-y Two-dimensional electron gas 9 and striped Al in N-layer covered GaN layer 8 y Ga 1-y The two-dimensional hole gas 10 in the region covered by the N layer 4 is gradually depleted at the same time. If striped Al y Ga 1-y The Al component y in the N layer 4 is proper, so that the two-dimensional electron gas 9 and the two-dimensional hole gas 10 can compensate charges of opposite sides, and the two-dimensional electron gas 9 and the two-dimensional hole can be realizedThe gas 10 is at the same time completely depleted at a sufficiently high leak pressure. Thus, a larger depletion region is formed in the drift region between the source and the drain of the HEMT device, and the depletion region can bear higher voltage, and the direct result is that the withstand voltage of the device is obviously improved. Because the planar areas occupied by the two-dimensional electron gas 9 and the two-dimensional hole gas 10 are not overlapped with each other, a typical plate capacitor structure cannot be formed, so that the introduced parasitic capacitance is small, and the device obtains better high-frequency characteristics.
The beneficial effects of the invention are as follows:
the HEMT device provided by the invention realizes smaller parasitic capacitance while ensuring high breakdown voltage, and is suitable for the application field with higher requirements on output power and working frequency.
Drawings
Fig. 1 is a schematic structural diagram of a high-voltage MIS-HEMT device having a composite layer structure according to embodiment 1 of the present invention.
Fig. 2 is a schematic structural diagram of a high-voltage MIS-HEMT device having a composite layer structure according to embodiment 2 of the present invention.
Fig. 3 is a top view of fig. 1.
Fig. 4 is a top view of fig. 2.
FIG. 5 shows the striped Al in the composite layer MIS-HEMT device of the present invention y Ga 1-y The depletion region under the N-layer expands to its surrounding gap and eventually forms a planar schematic of the structure of a large sheet of depletion region that is approximately rectangular.
FIG. 6 shows the growth of Al on the nitrogen surface of the upper surface of the substrate according to the present invention x Ga 1-x And the three-dimensional structure of the N layer is schematic.
FIG. 7 shows Al in the present invention x Ga 1-x And the three-dimensional structure schematic diagram of the GaN layer is grown on the nitrogen surface of the upper surface of the N layer.
FIG. 8 shows the present invention providing Al growth on the nitrogen surface of the upper surface of the GaN layer y Ga 1-y And the three-dimensional structure of the N layer is schematic.
FIG. 9 shows the formation of striped Al on the surface of GaN thin layer by etching according to the present invention y Ga 1-y And the three-dimensional structure of the N layer is schematic.
FIG. 10 shows the striped Al according to the present invention y Ga 1-y And manufacturing a three-dimensional structure diagram of a source electrode and a drain electrode which form ohmic contact with the two-dimensional conductive channel on the upper surface of the N layer.
FIG. 11 shows striped Al between drain and source regions according to the present invention y Ga 1-y And the upper surface of the N layer is covered with a layer of insulating medium.
FIG. 12 shows the striped Al of the present invention y Ga 1-y Upper surface of N layer and Al y Ga 1-y The N layer forms a three-dimensional structure diagram of a grid electrode of the MIS structure.
Fig. 13 is a schematic perspective view of a device surface covered with an insulating medium and contacting with a drain electrode according to embodiment 2 of the present invention.
Fig. 14 is a schematic perspective view of a device surface covered with an insulating medium and in contact with a drain electrode according to embodiment 3 of the present invention.
Fig. 15 is a schematic perspective view of embodiment 3 of the present invention, which is located between the source and the drain, and is formed with a metal-insulator-semiconductor MIS structure by depositing an insulating dielectric and forming a gate on the surface thereof.
FIG. 16 is a cross-sectional view of the device of example 1 of the present invention taken along section AA in FIG. 1, wherein the positive direction of the X-axis is the device covered with striped Al y Ga 1-y The position 16 of the N layer points in the direction of the position 17 of the stripe gap in the device, the positive direction of the Y axis is from the stripe Al y Ga 1-y N layers 4 to the substrate 1.
FIG. 17 shows the device covered with striped Al y Ga 1-y The device band diagram in the Y direction at location 16 of the N layer.
Figure 18 is a band diagram of the device in the Y direction at location 17 where the stripe gaps in the device coverage are.
In the figure: 1 is a substrate and 2 is Al x Ga 1-x N layer, 3 GaN layer, 4 striped Al y Ga 1-y N layer, 5 as source, 6 as drain, 7 as gate, 8 as non-striped Al y Ga 1-y A GaN layer covered by N layers, 9 two-dimensional electron gas, 10 two-dimensional hole gas, 11 insulating medium and 12 insulating mediumInsulating medium under the grid, 13 is a field plate, 14 is a p-type depletion part in a drift region, 15 is an n-type depletion part in the drift region, and 16 is a device covered with striped Al in the device in the figure 16 y Ga 1-y The position of the N layer, 17, is the position at the stripe gap in the device of fig. 16.
Detailed Description
The following embodiments of the present invention are provided by way of specific examples, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Example 1
As shown in fig. 1 and 3, the present embodiment provides a high-voltage MIS-HEMT device having a multiple layer structure, including: substrate 1, and Al intentionally doped with P-type impurity and having a thickness of 1.5um provided on substrate 1 x Ga 1-x N layer 2,0<x<1, provided in Al x Ga 1-x An unintentionally doped GaN layer 3 having a thickness of 20nm on the N layer 2, a drain electrode 6 provided on the surface of the GaN layer 3, and unintentionally doped striped Al having a thickness of 20nm y Ga 1-y N layer 4,x<y is less than or equal to 1, striped Al y Ga 1-y The N layer 4 is a parallel strip-shaped area extending from the drain area to the source area, the strip-shaped areas are not in direct contact with the drain area, and the strip-shaped Al y Ga 1-y A source electrode 5 and a grid electrode 7 are arranged on the surface of the N layer 4;
the Al is x Ga 1-x N2, gaN layer 3, and striped Al y Ga 1-y The N layer 4 grows on the nitrogen surface, and the Al grows under the combined action of spontaneous polarization and piezoelectric polarization effect x Ga 1-x The N layer 2 and the GaN layer 3 form a fixed positive charge at the interface where they contact; al (aluminum) x Ga 1-x Positive charges are fixed at the interface between the N layer 2 and the GaN layer 3 without being coated with striped Al y Ga 1-y The lower surface of the GaN layer 8 region covered by the N layer induces two-dimensional electron gas 9 to be used as a conductive channel of the MIS-HEMT device; in the form of streaky Al y Ga 1-y N layer 4 covering the area, the striped Al y Ga 1-y The N layer 4 and the GaN layer 3 form negative fixed charges at the contact interface, the surface density of the negative fixed charges is high enough to compensate the positive fixed charges at the lower surface of the GaN layer 3, so that two-dimensional electron gas cannot be induced, and meanwhile, the negative fixed charges induce two-dimensional hole gas 10 on the upper surface of the GaN layer 3 covered by the negative fixed charges;
the source electrode 5 and the drain electrode 6 are respectively arranged on the strip-shaped Al y Ga 1-y Both ends of the N layer 4 form ohmic contact with the two-dimensional electron gas 9 conducting channel; the gate 7 is arranged between the source 5 and the drain 6 and is made of striped Al y Ga 1-y On the N layer 4, the gate 7 and the striped Al y Ga 1-y The N layer 4 forms a metal-insulator-semiconductor structure; striped Al y Ga 1-y The two-dimensional hole gas 10 in the region covered by the N layer 4 is electrically connected with the source electrode 5, and the two-dimensional hole gas 10 is not connected with the strip-shaped Al y Ga 1- y The two-dimensional electron gas 9 on the lower surface of the N-layer covered GaN layer 8 forms a super junction.
The working process of the embodiment is described in detail below with reference to fig. 5:
for a conventional HEMT device, when a large voltage is applied to the drain, the voltage drops mainly near the edge of the gate near the drain due to the difficulty in fully depleting the drift region between the gate and the drain, which results in a large electric field peak that causes the device to break down prematurely.
In the present invention, striped Al is present between the source electrode 5 and the drain electrode 6 y Ga 1-y Two-dimensional hole gas 10 in the region covered by the N layer 4 is electrically connected with the source electrode 5 and is located in the striped Al y Ga 1-y Non-striped Al in the gaps of the N layer 4 y Ga 1-y The two-dimensional electron gas 9 on the lower surface of the N-layer covered GaN layer 8 forms a super junction. When the device is turned off, the striped Al is generated along with the increase of the drain voltage y Ga 1-y Two-dimensional hole gas 10 and striped Al in the N layer 4 covering region y Ga 1-y The two-dimensional electron gas 9 in the gap between the N layers 4 connected to the drain 6 is gradually depleted at the same time. If the Al composition y in the striped AlyGa1-yN layer 4 is appropriate, so thatThe two-dimensional electron gas 9 and the two-dimensional hole gas 10 can compensate charges of each other, and the two-dimensional electron gas 9 and the two-dimensional hole gas 10 can be completely exhausted under a certain high-enough leakage voltage condition. When the drain voltage is large enough, the depletion region expands around as shown in fig. 5, and gradually expands until it connects to form a large depletion region with an approximate rectangular shape. The depletion region of the drift region can play a role in resisting voltage, so that the voltage distribution region originally concentrated on the edge of the grid 7 is greatly expanded, the electric field peak of the drift region between grid and drain is effectively inhibited, the breakdown voltage of the device is improved, and the voltage resistance of the device is greatly improved. In addition, the two-dimensional electron gas 9 and the two-dimensional hole gas 10 do not form a typical plate capacitor structure when the device is operated, thereby achieving a high breakdown voltage while providing the device with excellent high-frequency characteristics.
As shown in fig. 6 to 12, the method for manufacturing the high-voltage MIS-HEMT device with the composite layer structure of the present invention comprises the following steps:
step 1, growing Al doped with P-type impurities with the thickness of 1.5um on the nitrogen surface of a substrate 1 x Ga 1-x N buffer layer 2,0<x<1; as shown in fig. 6.
Step 2, in Al x Ga 1-x A GaN layer 3 with a thickness of 20nm is grown on the nitrogen face of the N layer 2 x Ga 1-x A two-dimensional conductive channel is formed at the interface of the N layer 2 and the GaN layer 3, and two-dimensional electron gas 9 exists in the two-dimensional conductive channel; as shown in fig. 7.
Step 3, growing Al with the thickness of 20nm on the nitrogen surface of the GaN layer 3 y Ga 1-y N layer of Al y Ga 1-y Two-dimensional hole gas 10 is formed at the interface of the N layer and the GaN layer 3; as shown in fig. 8.
Step 4, etching Al on the surface of the GaN layer 3 in a patterning way y Ga 1-y N layer so that striped Al extending in the drain-source direction is formed over the GaN layer 3 y Ga 1-y The N layer 4, its coverage area is the parallel strip region extending from drain region to source region, these strip regions do not contact with drain region directly; as shown in fig. 9.
Step 5, performing mesa etching to manufacture an active region, and thenPreparing a source electrode 5 and a drain electrode 6 on the mesa surface, and making the source electrode 5 and the drain electrode 6 contact with the GaN layer 3 and the striped Al, respectively y Ga 1-y The two-dimensional conductive channel at the interface of the N layer 4 forms ohmic contact; as shown in fig. 10.
Step 6, locating between the source electrode 5 and the drain electrode 6 and forming striped Al y Ga 1-y A layer of insulating medium is deposited above the N layer 4; as shown in fig. 11.
Step 7, manufacturing and stripy Al on the insulating medium y Ga 1-y The N layer 4 forms the gate 7 of the MIS structure. As shown in fig. 12.
Example 2
As shown in fig. 2 and 4.
This example differs from example 1 in that: the device surface is covered with an insulating medium 11, and the insulating medium 11 and an insulating medium 12 under the gate 7 are the same material or different materials.
The preparation method comprises the following steps: comprises steps 1 to 7 of the embodiment 1, and a step 8 is added after the step 7: between the drain electrode 6 and the gate electrode 7, an insulating dielectric 11 is deposited and in contact with the drain electrode 6. As shown in fig. 13.
Example 3
As shown in fig. 15, the present embodiment is different from embodiment 2 in that: a field plate 13 extending from the drain region to the source region is provided above the insulating medium 11 on the right side of the gate electrode 7.
The manufacturing method of the MIS-HEMT device used by combining the super junction and the field plate structure in the embodiment is further explained with reference to fig. 14 and fig. 15:
step 1, growing Al doped with P-type impurities with the thickness of 1.5um on the nitrogen surface of a substrate 1 x Ga 1-x N buffer layer 2,0<x<1; as shown in fig. 6.
Step 2, in Al x Ga 1-x A GaN layer 3 with a thickness of 20nm is grown on the nitrogen face of the N layer 2 x Ga 1-x A two-dimensional conductive channel is formed at the interface of the N layer 2 and the GaN layer 3, and two-dimensional electron gas 9 exists in the two-dimensional conductive channel; as shown in fig. 7.
Step 3, growing Al with the thickness of 20nm on the nitrogen surface of the GaN layer 3 y Ga 1-y N layer of Al y Ga 1-y A two-dimensional hole gas 10 is formed at the interface of the N layer and the GaN layer 3; as shown in fig. 8.
Step 4, etching Al on the surface of the GaN layer 3 in a patterned manner y Ga 1-y N layer so that striped Al extending in the drain-source direction is formed over GaN layer 3 y Ga 1-y The N layer 4, its coverage area is the parallel strip region extending from drain region to source region, these strip regions do not contact with drain region directly; as shown in fig. 9.
Step 5, carrying out mesa etching to manufacture an active region, then preparing a source electrode 5 and a drain electrode 6 on the surface of the mesa, and enabling the source electrode 5 and the drain electrode 6 to be respectively connected with the GaN layer 3 and the striped Al y Ga 1-y Ohmic contact is formed on the two-dimensional conductive channel at the interface of the N layer 4; as shown in fig. 10.
Step 6, locating between the source electrode 5 and the drain electrode 6 and forming striped Al y Ga 1-y A layer of insulating medium 12 below the grid electrode is deposited above the N layer 4; as shown in fig. 11.
Step 7, manufacturing and stripe-shaped Al on the insulating medium y Ga 1-y The N layer 4 forms a grid 7 of the MIS structure; as shown in fig. 12.
Step 8, close to one end of the gate 7, covers a layer of insulating dielectric 11 and deposits a metal field plate 13 over it and makes electrical connection with the gate 7, as shown in fig. 14.
Step 9, between the drain electrode 6 and the gate electrode 7, an insulating dielectric 11 is deposited and in contact with the drain electrode 6, as shown in fig. 15.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and scope of the present invention as defined in the appended claims.
Claims (3)
1. A high-voltage MIS-HEMT device having a composite layer structure, comprising: substrate (1), and substrate (1) provided thereonAl intentionally doped with P-type impurity x Ga 1-x N layer (2), 0<x<1, provided at Al x Ga 1-x An unintentionally doped GaN layer (3) on the N layer (2), a drain electrode (6) provided on the surface of the GaN layer (3), and unintentionally doped striped Al provided on the surface of the GaN layer (3) y Ga 1-y N layer (4), x<y is less than or equal to 1, striped Al y Ga 1-y The N layer (4) is a parallel strip-shaped area extending from the drain area to the source area, the strip-shaped areas are not in direct contact with the drain area, and the strip-shaped Al y Ga 1-y A source electrode (5) and a grid electrode (7) are arranged on the surface of the N layer (4);
the Al is x Ga 1-x N (2), gaN layer (3), and striped Al y Ga 1-y The N layer (4) grows on a nitrogen surface, and the Al grows under the combined action of spontaneous polarization and piezoelectric polarization effect x Ga 1-x The N layer (2) and the GaN layer (3) form a fixed positive charge at the interface where they contact; al (Al) x Ga 1-x Positive charges are fixed at the interface between the N layer (2) and the GaN layer (3) without being coated with striped Al y Ga 1-y The lower surface of the GaN layer (8) region covered by the N layer induces two-dimensional electron gas (9) to be used as a conductive channel of the MIS-HEMT device; in the form of streaky Al y Ga 1-y N layer (4) covering the area, the striped Al y Ga 1-y The N layer (4) and the GaN layer (3) form negative fixed charges at the contact interface, the surface density of the negative fixed charges is high enough to compensate the positive fixed charges at the lower surface of the GaN layer (3) so that two-dimensional electron gas cannot be induced, and meanwhile the negative fixed charges induce two-dimensional hole gas (10) on the upper surface of the GaN layer (3) covered by the negative fixed charges;
the source electrode (5) and the drain electrode (6) are respectively arranged on the strip-shaped Al y Ga 1-y Both ends of the N layer (4) form ohmic contact with the two-dimensional electron gas (9) conducting channel; the grid electrode (7) is arranged on the strip-shaped Al between the source electrode (5) and the drain electrode (6) y Ga 1-y On the N layer (4), the grid (7) and the striped Al y Ga 1-y The N layer (4) forms a metal-insulator-semiconductor structure; striped Al y Ga 1-y The two-dimensional hole gas (10) in the region covered by the N layer (4) is electrically connected with the source electrode (5), and the two-dimensional hole gas (10) is not electrically connected with the source electrode (5)Is striped Al y Ga 1-y The two-dimensional electron gas (9) on the lower surface of the GaN layer (8) covered by the N layer forms a super junction.
2. The high-voltage MIS-HEMT device having a composite layer structure of claim 1, wherein: the surface of the device is covered with an insulating medium (11), and the insulating medium (11) and an insulating medium (12) below the grid (7) are made of the same material or different materials.
3. The high-voltage MIS-HEMT device having a composite layer structure of claim 1, wherein: a field plate (13) extending from the drain region to the source region is provided above the insulating medium (11) on the right side of the gate (7).
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