CN219513113U

CN219513113U - Longitudinal SCR device for ESD protection

Info

Publication number: CN219513113U
Application number: CN202320014896.3U
Authority: CN
Inventors: 贺健民; 张彪; 王康; 焦彬
Original assignee: Xi'an Maichi Semiconductor Technology Co ltd
Current assignee: Xi'an Maichi Semiconductor Technology Co ltd
Priority date: 2023-01-04
Filing date: 2023-01-04
Publication date: 2023-08-11
Anticipated expiration: 2033-01-04

Abstract

The utility model relates to a longitudinal SCR device for ESD protection, comprising an N-type silicon substrate arranged on a back metal layer; the N-type silicon substrate is provided with a P-type epitaxial layer, the P-type epitaxial layer is provided with an N-type buried layer, the N-type epitaxial layer with bottom surfaces at two ends connected with the P-type epitaxial layer is formed on the N-type buried layer, and the N-type epitaxial layer is provided with an N-type heavily doped region and a P-type heavily doped region; the N-type heavily doped region is positioned around the P-type heavily doped region and is connected with the bottom surface of the front metal layer; the N-type epitaxial layer is positioned around the front metal layer and is provided with a dielectric layer; and isolation deep trenches penetrating into the N-type silicon substrate are formed at two ends of the N-type epitaxial layer. The utility model can greatly improve the effective area of the leakage flow passage without increasing the area of the chip, greatly improves the ESD capacity of the SCR device and has wide application range.

Description

Longitudinal SCR device for ESD protection

Technical Field

The utility model belongs to the technical field of electrostatic discharge protection, and particularly relates to a longitudinal SCR device for ESD protection.

Background

The thyristor (SiliconControlledRectifier, SCR) is widely used in power devices, and can be used as a power switch because it can be switched between a high-resistance state and a low-resistance state, and is also a device commonly used for electrostatic discharge (Electro-StaticDischarge, ESD) protection, and has excellent capability of discharging static electricity. Compared with a diode, a triode and a field effect transistor, the self positive feedback mechanism enables the silicon controlled device to have the advantages of strong current discharge capability, high discharge efficiency per unit area, small on-resistance, strong robustness, high protection level and the like, and can achieve higher electrostatic protection level with smaller chip area in a semiconductor plane process.

The current mainstream SCR device is usually a planar transverse structure, but in practical application, the drainage channel of the SCR device is only in limited depth on the surface, so that the ESD capability of the SCR device is limited, and in order to improve the ESD capability, the chip area is usually increased to realize the SCR device, but in this way, the application range of the SCR device is limited.

Disclosure of Invention

Aiming at the defects of the prior art, the utility model provides a longitudinal SCR device for ESD protection, which can greatly improve the effective area of a leakage flow passage without increasing the area of a chip, greatly improve the ESD capacity of the SCR device and has wide application range.

In order to achieve the above purpose, the technical scheme of the utility model is as follows:

a longitudinal SCR device for ESD protection includes an N-type silicon substrate disposed on a back metal layer;

the N-type silicon substrate is provided with a P-type epitaxial layer, the P-type epitaxial layer is provided with an N-type buried layer, the N-type epitaxial layer with bottom surfaces at two ends connected with the P-type epitaxial layer is formed on the N-type buried layer, and the N-type epitaxial layer is provided with an N-type heavily doped region and a P-type heavily doped region;

the N-type heavily doped region is positioned around the P-type heavily doped region and is connected with the bottom surface of the front metal layer;

the N-type epitaxial layer is positioned around the front metal layer and is provided with a dielectric layer; and isolation deep trenches penetrating into the N-type silicon substrate are formed at two ends of the N-type epitaxial layer.

In the longitudinal SCR device for ESD protection, the front metal layer is connected with the N-type heavily doped region and the P-type heavily doped region to be led out of an Anode Anode of the SCR device; the back metal layer is connected with the N-type silicon substrate to be led out of a Cathode of the SCR device; the N-type buried layer is connected with the N-type epitaxial layer to form a base region of the PNP structure or an emitter region of the NPN structure.

In the longitudinal SCR device for ESD protection, the N-type heavily doped region is formed by phosphorus implantation, and the P-type heavily doped region is formed by boron implantation.

In the longitudinal SCR device for ESD protection, the thickness of the P-type epitaxial layer is 2-8 um, and the epitaxial resistivity is 0.01-0.4 ohm cm.

According to the longitudinal SCR device for ESD protection, the thickness of the N-type epitaxial layer is 3-9 um, and the epitaxial resistivity is 5-100 omega cm.

The utility model has the technical effects and advantages that:

according to the longitudinal SCR device for ESD protection, the N-type heavily doped region, the P-type heavily doped region, the N-type epitaxial layer, the N-type buried layer, the P-type epitaxial layer and the N-type silicon substrate are sequentially formed between the front metal layer and the back metal layer from top to bottom, and when ESD protection is carried out, the drainage direction of the SCR device is changed from top to bottom, so that the drainage passage of the SCR device is changed into the longitudinal direction, the effective area of the drainage passage can be greatly increased, the ESD capacity of the SCR device is greatly improved, and the chip area can be greatly reduced under the same ESD capacity.

Drawings

FIG. 1 is a schematic diagram of the structure of the present utility model;

fig. 2 is a construction flow chart of the present utility model.

Reference numerals in the drawings: 101. an N-type silicon substrate; 102. a P-type epitaxial layer; 103. an N-type buried layer; 104. an N-type epitaxial layer; 105-1, N type heavily doped region; 105-2, P-type heavily doped region; 106. isolating the deep trench; 107. a dielectric layer; 108. a front side metal layer; 109. and a back metal layer.

Detailed Description

The utility model is described in further detail below with reference to examples given in the accompanying drawings.

Referring to fig. 1, a longitudinal SCR device for ESD protection includes an N-type silicon substrate 101 disposed on a back metal layer 109, a P-type epitaxial layer 102 is formed on the N-type silicon substrate 101, an N-type buried layer 103 is disposed on the P-type epitaxial layer 102, an N-type epitaxial layer 104 with bottom surfaces at two ends connected to the P-type epitaxial layer 102 is formed on the N-type buried layer 103, and an N-type heavily doped region 105-1 and a P-type heavily doped region 105-2 are formed on the N-type epitaxial layer 104. The N-type heavily doped region 105-1 is located around the P-type heavily doped region 105-2 and is connected to the bottom surface of the front metal layer 108. A dielectric layer 107 is formed on the N-type epitaxial layer 104 and around the front metal layer 108; the two ends of the N-type epitaxial layer 104 are provided with isolation deep trenches 106 penetrating into the N-type silicon substrate 101.

In this embodiment, the front metal layer 108 is connected with the N-type heavily doped region 105-1 and the P-type heavily doped region 105-2 to be led out as the Anode Anode of the SCR device. The back metal layer 109 is connected with the N-type silicon substrate 101 to be led out of a Cathode Cathiode of the SCR device. The N-type buried layer 103 is connected with the N-type epitaxial layer 104 to form a base region of a PNP structure or an emitter region of an NPN structure.

In this embodiment, the resistivity of the material parameter of the N-type silicon substrate 101 is 0.002 Ω·cm to 0.006 Ω·cm, <100> crystal orientation.

In this embodiment, the thickness of the P-type epitaxial layer 102 is 2 um-8 um, and the epitaxial resistivity thereof is 0.01 Ω·cm-0.4 Ω·cm.

In this embodiment, the thickness of the N-type epitaxial layer 104 is 3um to 9um, and the epitaxial resistivity thereof is 5 Ω·cm to 100 Ω·cm.

In this embodiment, the N-type heavily doped region 105-1 is formed by phosphorus implantation, the implantation energy is 80kev to 100kev, and the implantation dose is 7e15 to 1e16; the P-type heavily doped region 105-2 is formed by boron implantation, the implantation energy is 80 kev-100 kev, and the implantation dosage is 7e 15-1 e16. Wherein the injection temperature of the phosphorus injection and the boron injection is 1000-1050 ℃ and the time is 20-50 min.

In this embodiment, the voltage of the SCR device is mainly affected by the breakdown voltage of the PN junction formed by the N-type buried layer 103 and the P-type epitaxial layer 102, the required application voltage can be conveniently obtained by adjusting the thickness and the concentration of the SCR device, and the capacitance parameters of the SCR device can be conveniently changed by adjusting the proportions of the N-type heavily doped region 105-1, the P-type heavily doped region 105-2, the N-type epitaxial layer 104 and the P-type epitaxial layer 102.

When ESD occurs, because the N-type heavily doped region 105-1 and the P-type heavily doped region 105-2 are shorted, first, a field tube formed by the N-type buried layer 103, the P-type epitaxial layer 102 and the N-type silicon substrate 101 breaks down, current rapidly rises, and when the current reaches a certain value, a PN junction formed by the P-type heavily doped region 105-2 and the N-type epitaxial layer 104 is opened in a forward direction, and an SCR path formed by the P-type heavily doped region 105-2, the N-type epitaxial layer 104, the N-type buried layer 103, the P-type epitaxial layer 102 and the N-type silicon substrate 101 is opened.

The longitudinal SCR device manufacturing flow of the utility model is shown in figure 2:

1) Selecting material parameters of the N-type silicon substrate 101; the resistivity is 0.002 to 0.006 omega cm, <100> crystal orientation;

2) The P-type epitaxial layer 102 is grown by an epitaxial process, and the process conditions are as follows: the epitaxy resistivity is 0.01 to 0.4 omega cm, and the thickness is 2um to 8um;

3) The N buried layer 103 is formed by the processes of Photo, implant and drive, and the process conditions are as follows: phosphorus is injected, the injection energy is 100kev to 120kev, and the dosage is: 1e 15-2 e14, and the annealing condition is 1100 ℃ for 20-60 min;

4) The epitaxy process generates an N-type epitaxial layer 104, the process conditions are: the epitaxy resistivity is 5-100 omega cm, and the thickness range is: 3um to 9um;

5) The N-type heavily doped region 105-1 and the P-type heavily doped region 105-2 are formed by Photo, implant and drive processes, and the process conditions are as follows: NSD is that phosphorus is injected into 80-100 kev, and the dosage is 7e 15-1 e16; PSD is 80-100 kev of boron injection, and the dosage is 7e 15-1 e16; the driving condition is 1000-1050 ℃, 20-50 min;

6) Forming a dielectric layer 107, 8-10 k deposited BPSG by PECVD process;

7) The N-type heavy doping region 105-1 and the P-type heavy doping region 105-2 are connected by Photo, etch, sputter, alloy technology to lead out the Anode Anode of the device;

8) And the thinning and back surface metallization process is connected with the N-type silicon substrate 101 to lead out a Cathode.

The foregoing is merely a preferred embodiment of the present utility model, and it should be noted that modifications and improvements could be made by those skilled in the art without departing from the inventive concept, which falls within the scope of the present utility model.

Claims

1. A longitudinal SCR device for ESD protection, characterized by: comprises an N-type silicon substrate (101) disposed on a back metal layer (109);

a P-type epitaxial layer (102) is formed on the N-type silicon substrate (101), an N-type buried layer (103) is arranged on the P-type epitaxial layer (102), an N-type epitaxial layer (104) with bottom surfaces at two ends connected with the P-type epitaxial layer (102) is formed on the N-type buried layer (103), and an N-type heavily doped region (105-1) and a P-type heavily doped region (105-2) are formed on the N-type epitaxial layer (104);

the N-type heavily doped region (105-1) is positioned around the P-type heavily doped region (105-2) and is connected with the bottom surface of the front metal layer (108);

the N-type epitaxial layer (104) is positioned around the front metal layer (108) and is provided with a dielectric layer (107); isolation deep trenches (106) penetrating into the N-type silicon substrate (101) are formed at two ends of the N-type epitaxial layer (104).

2. A longitudinal SCR device for ESD protection as defined in claim 1, wherein: the front metal layer (108) is connected with the N-type heavily doped region (105-1) and the P-type heavily doped region (105-2) to be led out of the anode of the SCR device; the back metal layer (109) is connected with the N-type silicon substrate (101) to be led out of the cathode of the SCR device; the N-type buried layer 103 is connected with the N-type epitaxial layer to form a base region of a PNP structure or an emitter region of an NPN structure.

3. A longitudinal SCR device for ESD protection as defined in claim 1, wherein: the N-type heavily doped region (105-1) is formed by phosphorus implantation, and the P-type heavily doped region (105-2) is formed by boron implantation.

4. A longitudinal SCR device for ESD protection as defined in claim 1, wherein: the thickness of the P-type epitaxial layer (102) is 2 um-8 um, and the epitaxial resistivity is 0.01 ohm cm-0.4 ohm cm.

5. A longitudinal SCR device for ESD protection as defined in claim 1, wherein: the thickness of the N-type epitaxial layer (104) is 3 um-9 um, and the epitaxial resistivity is 5 Ω & cm-100 Ω & cm.