CN117790556A - Low-capacity low-clamping longitudinal SCR device for ESD protection - Google Patents
Low-capacity low-clamping longitudinal SCR device for ESD protection Download PDFInfo
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 59
- 239000002184 metal Substances 0.000 claims abstract description 59
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 43
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 43
- 239000010703 silicon Substances 0.000 claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000002955 isolation Methods 0.000 claims abstract description 12
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 6
- 238000002513 implantation Methods 0.000 claims description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 229910052698 phosphorus Inorganic materials 0.000 claims description 4
- 239000011574 phosphorus Substances 0.000 claims description 4
- 229910001316 Ag alloy Inorganic materials 0.000 claims description 3
- 229910000838 Al alloy Inorganic materials 0.000 claims description 3
- QQMBHAVGDGCSGY-UHFFFAOYSA-N [Ti].[Ni].[Ag] Chemical compound [Ti].[Ni].[Ag] QQMBHAVGDGCSGY-UHFFFAOYSA-N 0.000 claims description 3
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 claims description 3
- 239000005388 borosilicate glass Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 description 11
- 230000008569 process Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 8
- 239000007943 implant Substances 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 230000003321 amplification Effects 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000009024 positive feedback mechanism Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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Abstract
The invention relates to a low-capacity low-clamping longitudinal SCR device for ESD protection, which comprises an N-type silicon substrate, wherein a P-type epitaxial layer is formed on the front surface of the N-type silicon substrate, a back metal layer is formed on the back surface of the N-type silicon substrate, and a deep groove metal connecting hole is formed in the N-type silicon substrate; the deep groove metal connecting holes are filled with metal aluminum, one end of the deep groove metal connecting holes is connected with the back metal layer, and the other end of the deep groove metal connecting holes extend into the P-type epitaxial layer to form a short circuit hole structure; an N-type epitaxial layer is arranged on the P-type epitaxial layer, and an N-type buried layer is arranged between the P-type epitaxial layer and the N-type epitaxial layer; a P-type heavily doped region and an isolation deep trench are formed on the N-type epitaxial layer; the isolation deep trench sequentially penetrates through the N-type buried layer and the P-type epitaxial layer and penetrates into the N-type silicon substrate; the P-type heavily doped region is connected with the front metal layer; and a dielectric layer is formed on the P-type heavily doped region and the N-type epitaxial layer. The invention has simple structure, low cost and strong ESD and surge protection capability, and meets the application requirements.
Description
Technical Field
The invention belongs to the technical field of electrostatic discharge protection, and particularly relates to a low-capacitance low-clamping longitudinal SCR device for ESD protection.
Background
The silicon controlled device (Silicon Controlled Rectifier, SCR) is widely used in power devices, and can be used as a power switch because it can switch between a high-resistance state and a low-resistance state, and is also a device commonly used for electrostatic Discharge (ESD) protection, which has excellent capability of releasing electrostatic energy, and can better meet requirements. Compared with a diode, a triode and a field effect transistor, the self positive feedback mechanism enables the silicon controlled device to have the advantages of strong current discharge capability, high discharge efficiency per unit area, small on-resistance, strong robustness, high protection level and the like, and can achieve higher electrostatic protection level with smaller chip area in a semiconductor plane process.
As process linewidths become smaller and smaller, IC chips become more fragile, which requires ESD and surge protection devices with higher protection capabilities and lower forward and reverse clamp voltages. At present, the existing ESD and surge protection devices mostly adopt PN junction structures to be used as protection devices, but the devices have the defects of high clamping voltage, poor protection capability and high capacitance, and as the application frequency of an IC chip is higher and higher, the high-resistance type protection devices are difficult to meet the application requirements.
Disclosure of Invention
In order to solve the technical problems, the invention provides the longitudinal SCR device with simple structure, low cost and strong ESD and surge protection capability and low capacitance and low clamping voltage.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
the low-capacity low-clamping longitudinal SCR device for ESD protection comprises an N-type silicon substrate, wherein a P-type epitaxial layer is formed on the front surface of the N-type silicon substrate, a back metal layer is formed on the back surface of the N-type silicon substrate, and a plurality of deep groove metal connecting holes are formed in the N-type silicon substrate at intervals; the plurality of deep groove metal connecting holes are filled with metal aluminum, one end of each deep groove metal connecting hole is connected with the back metal layer, the other end of each deep groove metal connecting hole extends out of the front surface of the N-type silicon substrate and penetrates into the P-type epitaxial layer to form a short circuit hole structure;
an N-type epitaxial layer is arranged on the P-type epitaxial layer, and an N-type buried layer is arranged between the P-type epitaxial layer and the N-type epitaxial layer; a P-type heavily doped region and isolation deep trenches positioned at two sides of the P-type heavily doped region are formed on the N-type epitaxial layer;
the isolation deep trench extends downwards, sequentially penetrates through the N-type buried layer and the P-type epitaxial layer, and penetrates into the N-type silicon substrate; the P-type heavily doped region is connected with the front metal layer; and a dielectric layer is formed on the P-type heavily doped region and the N-type epitaxial layer, and the dielectric layer is positioned around the front metal layer.
In the low-capacitance low-clamping longitudinal SCR device for ESD protection, the front metal layer is connected with the P-type heavily doped region to be led out by an Anode Anode of the SCR device; and the back metal layer is connected with the N-type silicon substrate to be led out of a Cathode of the SCR device.
The low-capacity low-clamping longitudinal SCR device for ESD protection, wherein the N-type buried layer and the N-type epitaxial layer form a base region of a PNP structure and can be used as an emitter region of an NPN structure; the P-type epitaxial layer is used as a base region of the NPN structure; the N-type silicon substrate is used as a collector region of the NPN structure.
The low-capacity low-clamp longitudinal SCR device for ESD protection is characterized in that the P-type heavily doped region is a boron implantation, the implantation energy is 80-100 kev, and the dose is 2e 14-1 e16.
The thickness of the N-type epitaxial layer is 3 um-9 um, and the epitaxial resistivity is 5 Ω & lt, cm-100 Ω & lt, cm.
The low-capacity low-clamp longitudinal SCR device for ESD protection is characterized in that the N-type buried layer is formed by phosphorus injection, the injection energy is 70-120 kev, and the dosage is 5e 13-2 e15.
The thickness of the P-type epitaxial layer of the low-capacitance low-clamp longitudinal SCR device for ESD protection is 3 um-10 um, and the resistivity of the P-type epitaxial layer is 0.01-0.4 ohm cm.
The low-capacity low-clamping longitudinal SCR device for ESD protection, wherein the dielectric layer is an 8-10 k deposited borophosphosilicate glass layer; the front metal layer is 4um high silicon aluminum alloy; the back metal layer is a 150um titanium nickel silver alloy target.
The low-capacitance low-clamping longitudinal SCR device for ESD protection is formed by adopting a material with the resistivity of 0.002-0.006 omega cm and the crystal orientation of <100 >.
The invention has the technical effects and advantages that:
1. the capacitance of the low-capacitance low-clamping longitudinal SCR device for ESD protection is equivalent to the serial connection of three PN capacitors, the total capacitance is smaller than the minimum value of the three PN capacitors, the capacitance of the device is basically determined by the PN junction with the minimum capacitance in the structure, and the PN junction capacitance formed by the P-type heavily doped region and the N-type epitaxial layer is small in area and depth because of the small area of the P-type heavily doped region and the light concentration of the N-type epitaxial layer, so that the PN junction capacitance formed by the P-type heavily doped region and the N-type epitaxial layer is small; when the holding current IH of the SCR is smaller and the clamping voltage is lower, the amplification factors of the PNP structure formed by the P-type heavily doped region, the N-type epitaxial layer, the N-type buried layer and the P-type epitaxial layer and the NPN structure formed by the N-type buried layer, the P-type epitaxial layer and the N-type silicon substrate can change the holding current; the concentration of the N-type epitaxial layer is reduced, the thickness of the N-type buried layer is reduced, the concentration of the P-type epitaxial layer is reduced, or the thickness of the P-type epitaxial layer is reduced by increasing the depth or reducing the area of the P-type heavily doped region, so that the low clamping voltage is obtained.
2. According to the low-capacitance low-clamping longitudinal SCR device for ESD protection, the isolation deep groove is used as isolation, so that parasitic capacitance of the SCR device can be effectively reduced.
3. According to the low-capacity low-clamping longitudinal SCR device for ESD protection, the deep groove metal connecting holes are adopted in the cathode anode of the longitudinal NPN structure and the anode of the PNP structure, so that turning characteristics and maintenance current characteristics of the SCR device are improved.
Drawings
FIG. 1 is a schematic cross-sectional view of the present invention;
FIG. 2 is a schematic structural diagram of step 2 of the present invention for preparing a low capacitance low clamp longitudinal SCR device;
FIG. 3 is a schematic structural diagram of step 3 of the present invention for preparing a low capacitance low clamp longitudinal SCR device;
FIG. 4 is a schematic structural diagram of step 4 of the present invention for preparing a low capacitance low clamp longitudinal SCR device;
FIG. 5 is a schematic diagram of the structure of step 5 and step 6 of the present invention for preparing a low capacitance low clamp longitudinal SCR device;
FIG. 6 is a schematic structural diagram of steps 7,8 of the present invention for preparing a low capacitance low clamp longitudinal SCR device;
FIG. 7 is a schematic structural diagram of step 9 of the present invention for preparing a low capacitance low clamp longitudinal SCR device;
FIG. 8 is a schematic diagram of the I-V characteristics of a low capacitance low clamp vertical SCR device of the present invention.
Reference numerals in the drawings: 101. an N-type silicon substrate; 102. a P-type epitaxial layer; 103. an N-type buried layer; 104. an N-type epitaxial layer; 105. a P-type heavily doped region; 106. isolating the deep trench; 107. a dielectric layer; 108. a front side metal layer; 109. deep groove metal connecting holes; 110. and a back metal layer.
Detailed Description
The invention is described in further detail below with reference to examples given in the accompanying drawings.
Referring to fig. 1, a low-capacitance low-clamping longitudinal SCR device for ESD protection includes an N-type silicon substrate 101, wherein a P-type epitaxial layer 102 is formed on the front surface of the N-type silicon substrate 101, a back metal layer 110 is formed on the back surface of the N-type silicon substrate 101, and a plurality of deep groove metal connection holes 109 are formed in the N-type silicon substrate at intervals; the deep-groove metal connection holes 109 are filled with metal aluminum, one end of each deep-groove metal connection hole is connected with the back metal layer 110, and the other end of each deep-groove metal connection hole extends out of the front surface of the N-type silicon substrate 101 and penetrates into the P-type epitaxial layer 102 to form a short circuit hole structure.
An N-type epitaxial layer 104 is arranged on the P-type epitaxial layer 102, and an N-type buried layer 103 is arranged between the P-type epitaxial layer 102 and the N-type epitaxial layer 104; the N-type epitaxial layer 104 is formed with a P-type heavily doped region 105 and isolation deep trenches 106 located at two sides of the P-type heavily doped region 105.
The isolation deep trench 106 extends downwards, sequentially penetrates through the N-type buried layer 103 and the P-type epitaxial layer 102, and penetrates into the N-type silicon substrate 101; the P-type heavily doped region 105 is connected with the front metal layer 108; a dielectric layer 107 is formed on the P-type heavily doped region 105 and the N-type epitaxial layer 104, and the dielectric layer 107 is located around the front metal layer 108.
In specific implementation, the front metal layer 108 is connected with the P-type heavily doped region 105 to be led out of the Anode Anode of the SCR device; the back metal layer 109 is connected with the N-type silicon substrate 101 to be led out of a Cathode Cathiode of the SCR device.
Further, the N-type buried layer 103 and the N-type epitaxial layer 104 form a base region of a PNP structure and can be used as an emitter region of an NPN structure; the P-type epitaxial layer 102 is used as a base region of the NPN structure; the N-type silicon substrate 101 serves as a collector region for the NPN structure.
Specifically, the capacitance of the SCR device in the present application is equivalent to a series connection of three PN capacitors, and the total capacitance is smaller than the minimum value of the three, i.e., the device capacitance is basically determined by the PN junction with the smallest capacitance in the structure. In the invention, the PN junction capacitor formed by the P-type heavily doped region 105 and the N-type epitaxial layer 104 has small PN junction capacitance because the area and depth of the P-type heavily doped region 105 are small and the concentration of the N-type epitaxial layer 104 is light; in general, the smaller the holding current IH of the SCR, the lower the clamping voltage, and the PNP structure formed by the P-type heavily doped region 105, the N-type epitaxial layer 104, the N-type buried layer 103 and the P-type epitaxial layer 102, and the NPN structure formed by the N-type buried layer 103, the P-type epitaxial layer 102 and the N-type silicon substrate 101, the amplification factors of which can change the holding current.
Further, by increasing the depth or decreasing the area of the P-type heavily doped region 105; the concentration of the N-type epitaxial layer 104 is reduced, and the thickness of the N-type epitaxial layer is reduced; lowering the concentration or depth of the N-type buried layer 103; the concentration of the P-type epitaxial layer 102 is reduced or the thickness thereof is reduced, and these adjustments can be easily performed, thereby obtaining a low clamping voltage.
In particular, the P-type heavily doped region 105 is a boron implant with an implant energy of 80kev to 100kev and a dose of 2e14 to 1e16.
In specific implementation, the thickness of the N-type epitaxial layer 104 is 3 um-9 um, and the epitaxial resistivity is 5 Ω·cm-100 Ω·cm.
In specific implementation, the N-type buried layer 103 is a phosphorus implant, the implant energy is 70kev to 120kev, and the dose is 5e13 to 2e15.
In specific implementation, the thickness of the P-type epitaxial layer 102 is 3 um-10 um, and the resistivity thereof is 0.01 Ω cm-0.4 Ω cm.
In specific implementation, the dielectric layer 107 is a borosilicate glass layer deposited at 8-10 k; the front metal layer 108 is 4um high silicon aluminum alloy; the back metal layer 109 is a 150um titanium nickel silver alloy target.
In specific implementation, the N-type silicon substrate 101 is formed of a material having a resistivity of 0.002 to 0.006 Ω·cm and a crystal orientation of <100 >.
The deep groove metal connecting hole 109 is adopted by the cathode anode of the longitudinal NPN structure and the anode of the PNP structure of the SCR device, and metal aluminum is filled in the deep groove metal connecting hole 109, so that turning characteristics of the SCR device are improved and current characteristics are maintained.
Referring to fig. 8, an I-V characteristic diagram of a low-capacitance low-clamping longitudinal SCR device according to the present application is shown, where positive voltage is applied to an Anode, and when the voltage is less than a PN reverse breakdown voltage formed by an N-type buried layer 103 and a P-type epitaxial layer 102, almost no current is in an off state (0→vrwm); when the voltage rises above the breakdown voltage, a current starts to flow in the circuit, and the current path is: (108-105-104-103-102-109-110); the current increases with increasing voltage (vrwm→vt), the forward voltage of the PN junction formed by the P-type epitaxial layer 102 and the N-type silicon substrate 101 increases with increasing current, PNPN triggers on (vt→vh) when this voltage is greater than its forward on voltage (current path: 108→105→104→103→102→101→110), the voltage across the device decreases rapidly due to its negative resistance characteristics, and reaches the lowest point VH when the current is IH, followed by a slow increase with increasing current.
Referring to fig. 2-7, the preparation method of the low-capacity low-clamp longitudinal SCR device comprises the following steps:
1) Adopting a material with the resistivity of 0.002-0.006 omega cm and the crystal orientation of <100> as an N-type silicon substrate 101;
2) As shown in fig. 2, a P-type epitaxial layer 102 is grown on an N-type silicon substrate 101 by adopting an epitaxial process, wherein the resistivity of the P-type epitaxial layer 102 is 0.01-0.4 Ω cm, and the grown thickness is 2-8 um;
3) As shown in fig. 3, an N-type buried layer 103 is formed by adopting a Photo, implant and drive in process, and the process conditions for forming the N-type buried layer 103 are as follows: phosphorus is injected, the injection energy is 100kev to 120kev, and the dosage is: 1e15 to 2e14; the annealing condition is that the temperature is 1100 ℃ and the time is 20 min-60 min;
4) As shown in fig. 4, an epitaxial process is adopted to generate an N-type epitaxial layer 104, and the epitaxial resistivity of the N-type epitaxial layer 104 is 5-100 Ω·cm, and the thickness range is: 3um to 9um;
5) As shown in fig. 5, a P-type heavily doped region 105 is formed by adopting a Photo, implant and drive in process, and the forming process conditions of the P-type heavily doped region 105 are as follows: PSD is 80-100 kev of boron injection, and the dosage is 7e 15-1 e16; the annealing condition is that the temperature is 950-1050 ℃ and the time is 20-50 min;
6) As shown in fig. 5, isolation deep trenches 106 are vertically and downwardly opened outside two sides of the P-type heavily doped region 105, and the opened isolation deep trenches 106 penetrate through the N-type epitaxial layer 104, the N-type buried layer 103 and the P-type epitaxial layer 102 and penetrate into the N-type silicon substrate 101;
7) As shown in fig. 6, the front metal layer 108 is connected with the P-type heavily doped region 105 by adopting a Photo, etch, sputter, alloy process to lead out the Anode of the device; and forming a dielectric layer 107, 8-10 k deposited BPSG by adopting a PECVD process;
8) As shown in fig. 6, 6 deep-trench metal connection holes 109 penetrating into the P-type epitaxial layer 102 are formed on the back surface of the N-type silicon substrate 101 at intervals, and metal aluminum is filled in the deep-trench metal connection holes 109;
9) As shown in fig. 7, the back metal layer 110 is connected to the N-type silicon substrate 101 by a thinning and back metallization process to lead out the Cathode.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and improvements could be made by those skilled in the art without departing from the inventive concept, which falls within the scope of the present invention.
Claims (9)
1. A low capacitance low clamp longitudinal SCR device for ESD protection, characterized by: the semiconductor device comprises an N-type silicon substrate (101), wherein a P-type epitaxial layer (102) is formed on the front surface of the N-type silicon substrate (101), a back metal layer (110) is formed on the back surface of the N-type silicon substrate, and a plurality of deep groove metal connecting holes (109) are formed in the N-type silicon substrate at intervals; the plurality of deep groove metal connecting holes (109) are filled with metal aluminum, one end of each deep groove metal connecting hole is connected with the back metal layer (110), and the other end of each deep groove metal connecting hole extends out of the front surface of the N-type silicon substrate (101) and penetrates into the P-type epitaxial layer (102) to form a short circuit hole structure;
an N-type epitaxial layer (104) is arranged on the P-type epitaxial layer (102), and an N-type buried layer (103) is arranged between the P-type epitaxial layer (102) and the N-type epitaxial layer (104); a P-type heavily doped region (105) and isolation deep trenches (106) positioned at two sides of the P-type heavily doped region (105) are formed on the N-type epitaxial layer (104);
the isolation deep trench (106) extends downwards and sequentially penetrates through the N-type buried layer (103) and the P-type epitaxial layer (102) to penetrate into the N-type silicon substrate (101); the P-type heavily doped region (105) is connected with the front metal layer (108); a dielectric layer (107) is formed on the P-type heavily doped region (105) and the N-type epitaxial layer (104), and the dielectric layer (107) is positioned around the front metal layer (108).
2. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the front metal layer (108) is connected with the P-type heavily doped region (105) to be led out of an Anode Anode of the SCR device; the back metal layer (109) is connected with the N-type silicon substrate (101) to be led out of a Cathode Cathiode of the SCR device.
3. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the N-type buried layer (103) and the N-type epitaxial layer (104) form a base region of a PNP structure and can be used as an emitter region of an NPN structure; the P-type epitaxial layer (102) is used as a base region of the NPN structure; the N-type silicon substrate (101) is used as a collector region of the NPN structure.
4. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the P-type heavily doped region (105) is a boron implantation, the implantation energy is 80-100 kev, and the dose is 2e 14-1 e16.
5. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the thickness of the N-type epitaxial layer (104) is 3 um-9 um, and the epitaxial resistivity is 5 Ω & cm-100 Ω & cm.
6. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the N-type buried layer (103) is phosphorus implantation, the implantation energy is 70-120 kev, and the dosage is 5e 13-2 e15.
7. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the thickness of the P-type epitaxial layer (102) is 3 um-10 um, and the resistivity is 0.01 ohm cm-0.4 ohm cm.
8. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the dielectric layer (107) is a borosilicate glass layer deposited at 8-10 k; the front metal layer (108) is made of 4um high silicon aluminum alloy; the back metal layer (109) is a 150um titanium nickel silver alloy target.
9. A low capacitance low clamp longitudinal SCR device for ESD protection as defined in claim 1, wherein: the N-type silicon substrate (101) is formed by adopting a material with the resistivity of 0.002-0.006 omega cm and the crystal orientation of <100 >.
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