CN219163390U

CN219163390U - Multi-chip packaging structure based on double-sided electrode type chiplet

Info

Publication number: CN219163390U
Application number: CN202223104604.XU
Authority: CN
Inventors: 蔡琨辰
Original assignee: Zhongshan Xincheng Semiconductor Co ltd
Current assignee: Zhongshan Xincheng Semiconductor Co ltd
Priority date: 2022-11-22
Filing date: 2022-11-22
Publication date: 2023-06-09
Anticipated expiration: 2032-11-22

Abstract

The utility model discloses a multi-chip packaging structure based on a double-sided electrode type chiplet, which is simple in structure and easy to realize, and the double-sided electrode type chiplet and other chiplets are arranged together, so that a plurality of chiplets manufactured by different processes can be integrated into one package, and functions and performances can be enhanced conveniently. The arrangement of the first electrode and the second electrode of the double-sided electrode type chiplet is convenient for realizing interconnection of the first electrode and the substrate in a wire bonding mode on one hand, so that the first electrode and the substrate can be conveniently wire bonded together with other wire bonding chiplets by using a mature wire bond packaging process; on the other hand, the interconnection between the second electrode and the substrate is conveniently realized in a flip-chip mode, so that the flip-chip is conveniently carried out together with other flip-chip small chips by using a mature f/i p ch/i p packaging process, and the production efficiency is improved; in addition, the arrangement of the double-sided electrode type chiplet makes the scheme unnecessary to chase advanced packaging technology to integrate the chiplet, thereby being beneficial to reducing packaging cost.

Description

Multi-chip packaging structure based on double-sided electrode type chiplet

Technical Field

The utility model relates to a chip packaging structure, in particular to a multi-chip packaging structure based on a double-sided electrode type small chip.

Background

The concept of core/small chip (Chiplet) proposed by DARPA, advanced research program office in united states of america, has been considered as a direction of development of future semiconductor integrated circuits in recent years. The chip technology is to package some chip bare chips which are produced in advance and realize specific functions together through advanced integration technology to form a system-level chip; and these basic dies are chiplets (chiplets). The Chiplet technology can disperse the design of large-size multi-cores into smaller chiplets, and can meet the requirements of the existing high-performance operation processor; the flexible design mode not only improves flexibility, but also has better yield and cost saving advantages, reduces chip design time and accelerates the time of chip marketing.

A double-sided electrode chiplet is a chiplet with both Flip Chip and Wire Bond double-sided electrodes, wherein the front side of the chiplet is provided with electrodes for the Flip Chip, and electrodes suitable for the Wire Bond are formed on the back side of the chiplet through TSV (Through Silicon Via) technology.

Chinese patent CN114914196a discloses a partial interposer 2.5D fan-out package structure and process based on the concept of core, wherein multi-layer interconnect multi-chip package is realized by bridging chips through the interposer, enabling high density interconnection of multiple cores/chiplets. However, in the advanced packaging technology used in the above patent, an integration mode of an interposer is needed, and a TSV blind hole is formed in the interposer to realize a 2.5D packaging structure, so that the packaging cost is high; in addition, for the package structure with different types of chiplets such as wire bonding chiplet and Flip Chip, the mature wire bond and Flip Chip packaging process cannot be used, which is not beneficial to improving the packaging efficiency.

Therefore, how to overcome the above-mentioned drawbacks has become an important issue to be solved by the person skilled in the art.

Disclosure of Invention

The utility model overcomes the defects of the technology and provides a multi-chip packaging structure based on a double-sided electrode type small chip.

In order to achieve the above purpose, the present utility model adopts the following technical scheme:

the utility model provides a multicore piece packaging structure based on two-sided electrode formula chiplet, is including base plate 1, base plate 1 upper surface stacks and is connected with two-sided electrode formula chiplet 2 and other chiplets that have two-sided electrode, two-sided electrode formula chiplet 2 one surface is equipped with the first electrode 21 that is applicable to wire bonding, and another surface is equipped with the second electrode 22 that is applicable to the flip-chip.

Preferably, the first electrode 21 of the double-sided electrode chiplet 2 is connected to the upper surface of the substrate 1 through a lead 4, the second electrode 22 is provided with a solder ball 5, and the second electrode 22 is connected to the upper surface of the substrate 1 through the solder ball 5.

Preferably, the other chiplet is a wire-bonded chiplet 3, and a third electrode 31 suitable for wire bonding is disposed on the wire-bonded chiplet 3, and the third electrode 31 is connected to the upper surface of the substrate 1 through a wire 4.

Preferably, the upper surface of the substrate 1 is provided with a metal wiring layer 6 for connection to each electrode.

Preferably, the double-sided electrode chiplet 2 has a second electrode 22 formed on its back side by TSV (Through Silicon Via) techniques.

Preferably, a filling glue layer 7 for filling the gap between the double-sided electrode type chiplet 2 and the substrate 1 is arranged in the gap.

Preferably, the upper surface of the substrate 1 is provided with a plastic sealing layer 8 for packaging all the components into a whole.

Compared with the prior art, the utility model has the beneficial effects that:

1. the dual-electrode type small chip is simple in structure and easy to realize, and the dual-electrode type small chip and other small chips are arranged together, so that small chips manufactured by different processes can be integrated into one package, and functions are enhanced and performances are improved. The arrangement of the first electrode and the second electrode of the double-sided electrode type chiplet is convenient for realizing interconnection of the first electrode and the substrate in a wire bonding mode on one hand, so that the first electrode and the substrate can be conveniently bonded together with other wire bonding chiplets by using a mature wire bond packaging process; on the other hand, the interconnection between the second electrode and the substrate is conveniently realized in a flip-chip mode, so that the flip-chip is conveniently carried out together with other flip-chip chips by using a mature flip-chip packaging process, and the production efficiency is improved; in addition, the arrangement of the double-sided electrode type chiplet makes the scheme unnecessary to chase advanced packaging technology to integrate the chiplet, thereby being beneficial to reducing packaging cost.

2. The second electrode is formed on the back of the small Chip through TSV (Through Silicon Via) technology, so that the electrodes which are interconnected with the outside are arranged on the front and the back of the small Chip, the substrate can be conveniently packaged with a common packaging carrier plate, an interposer is not required to be arranged, the small Chip can be packaged with a wire bonding small Chip or a Flip Chip into a whole, the packaging process of the mature wire bond and Flip Chip can be used in the subsequent packaging process, the production efficiency can be improved, and the packaging cost can be reduced.

Drawings

Fig. 1 is a schematic sectional view of the present embodiment.

Fig. 2 is a schematic cross-sectional structure of the plastic sealing layer.

Detailed Description

The following examples are provided to illustrate the features of the present utility model and other related features in further detail to facilitate understanding by those skilled in the art:

as shown in fig. 1 and fig. 2, a multi-chip package structure based on a double-sided electrode chiplet includes a substrate 1, a double-sided electrode chiplet 2 with double-sided electrodes and a wire bonding chiplet 3 are stacked and connected on an upper surface of the substrate 1, a first electrode 21 suitable for wire bonding is provided on an upper surface of the double-sided electrode chiplet 2, a second electrode 22 suitable for flip-chip is provided on a lower surface of the double-sided electrode chiplet, the first electrode 21 is connected with the substrate 1 through a wire 4, a solder ball 5 is provided on the second electrode 22, and the second electrode 22 is connected with an upper surface of the substrate 1 through the solder ball 5.

The scheme is simple in structure and easy to realize, and the two-sided electrode chiplet 2 and other chiplets are arranged together, so that the chiplets manufactured by different processes can be integrated into one package, and the functions and the performance can be enhanced conveniently. The arrangement of the first electrode 21 and the second electrode 22 of the double-sided electrode type chiplet 2 is convenient for realizing interconnection of the first electrode 21 and the substrate 1 in a wire bonding mode on one hand, so as to perform wire bonding together with other wire bonding chiplets 3 by using a mature wire bond packaging process; on the other hand, the interconnection between the second electrode 22 and the substrate 1 is conveniently realized in a flip-chip mode, so that the flip-chip is conveniently carried out together with other flip-chip chips by using a mature flip-chip packaging process, and the production efficiency is improved; in addition, the arrangement of the double-sided electrode type chiplet 2 makes the scheme unnecessary to chase advanced packaging technology to integrate the chiplet, thereby being beneficial to reducing packaging cost.

As shown in fig. 1, the other chiplet is a wire-bonded chiplet 3, a third electrode 31 suitable for wire bonding is disposed on the wire-bonded chiplet 3, and the third electrode 31 is connected to the upper surface of the substrate 1 through a wire 4. In particular, the other chiplet may be a flip-chip chiplet, where electrodes suitable for flip-chip are provided, and the electrodes are connected to the upper surface of the substrate 1 through solder balls 5 under the electrodes.

As described above, the package structure can comprise the following three combination structures: a combination of one or more double-sided electrode chiplets and one or more wire-bonded chiplets 3; a combination of one or more double-sided electrode chiplets and one or more flip-chip chiplets; one or more double-sided electrode chiplets in combination with one or more wire-bonded chiplets 3 and one or more flip-chip chiplets.

As shown in fig. 1, the upper surface of the substrate 1 is provided with a metal wiring layer 6 for connection to each electrode. In this way, it is convenient to design the corresponding lines according to the chiplet structure in order to achieve interconnection of the substrate 1 with a plurality of chiplets.

From the above, the double-sided electrode chiplet 2 forms the second electrode 22 on its back side by TSV (Through Silicon Via) technology. Thus, the two-sided electrode type chiplet 2 can conveniently form the second electrode 22, electrodes which are interconnected with the outside are arranged on the front and the back of the chiplet, so that the substrate 1 can use a common packaging carrier plate, an interposer is not required to be arranged, and the substrate can be packaged with the wire bonding chiplet 3 and/or the Flip Chip into a whole, thereby being beneficial to using the mature wire bond and Flip Chip packaging process in the subsequent packaging process, being beneficial to improving the production efficiency and reducing the packaging cost.

As shown in fig. 1 or fig. 2, a filling adhesive layer 7 for filling the gap between the double-sided electrode chiplet 2 and the substrate 1 is disposed in the gap. Therefore, the gap at the bottom of the double-sided electrode type small chip 2 is convenient to fill up, so that the effect of reinforcing the chip is achieved, and the stability of the chip is improved.

As shown in fig. 2, the upper surface of the substrate 1 is provided with a plastic layer 8 for encapsulating all the components into one body. Therefore, all the components are conveniently packaged into a whole, so that the functions of insulation protection, moisture resistance and the like are conveniently achieved for the internal components. In particular, the molding layer 8 is typically an epoxy material.

As described above, the present disclosure protects a multi-chip package structure based on a dual-sided electrode type chiplet, and all technical schemes identical or similar to the present disclosure should be shown as falling within the scope of the present disclosure.

Claims

1. The utility model provides a multicore piece packaging structure based on two-sided electrode chiplet, includes base plate (1), its characterized in that base plate (1) upper surface piles up and is connected with two-sided electrode chiplet (2) and other chiplets that have two-sided electrode, other chiplets are wire bonding chiplet (3) or are flip-chip chiplet, two-sided electrode chiplet (2) one surface is equipped with first electrode (21) that are applicable to wire bonding, and another surface is equipped with second electrode (22) that are applicable to the flip-chip.

2. The multi-chip package structure based on the double-sided electrode chiplet according to claim 1, characterized in that the first electrode (21) of the double-sided electrode chiplet (2) is connected to the upper surface of the substrate (1) through a lead (4), the second electrode (22) is provided with a solder ball (5), and the second electrode (22) is connected to the upper surface of the substrate (1) through the solder ball (5).

3. The multi-chip package structure based on the double-sided electrode chiplet according to claim 1, characterized in that a third electrode (31) suitable for wire bonding is provided on the wire bonding chiplet (3), and the third electrode (31) is connected to the upper surface of the substrate (1) through a wire (4).

4. A multichip package structure based on a double-sided electrode chiplet according to claim 1 or 3, characterized in that the upper surface of the substrate (1) is provided with a metal wiring layer (6) for connection to the electrodes.

5. A multichip package structure based on a double-sided electrode chiplet according to claim 1, characterized in that the double-sided electrode chiplet (2) is formed with a second electrode (22) on its back side by TSV technology.

6. The multi-chip package structure based on the double-sided electrode chiplet according to claim 1, characterized in that a filling glue layer (7) for filling the gap between the double-sided electrode chiplet (2) and the substrate (1) is provided in the gap.

7. The multi-chip package structure based on the double-sided electrode chiplet according to claim 1, characterized in that the upper surface of the substrate (1) is provided with a plastic layer (8) for packaging all components as one body.