JP2005539403A5 - - Google Patents

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JP2005539403A5
JP2005539403A5 JP2004568930A JP2004568930A JP2005539403A5 JP 2005539403 A5 JP2005539403 A5 JP 2005539403A5 JP 2004568930 A JP2004568930 A JP 2004568930A JP 2004568930 A JP2004568930 A JP 2004568930A JP 2005539403 A5 JP2005539403 A5 JP 2005539403A5
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package
packages
substrate
stacked
module
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JP2004568930A
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JP4800625B2 (en
JP2005539403A (en
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Priority claimed from US10/632,568 external-priority patent/US7205647B2/en
Priority claimed from US10/632,550 external-priority patent/US6972481B2/en
Priority claimed from US10/632,552 external-priority patent/US20040061213A1/en
Priority claimed from US10/632,553 external-priority patent/US7053476B2/en
Priority claimed from US10/632,549 external-priority patent/US7064426B2/en
Priority claimed from US10/632,551 external-priority patent/US6838761B2/en
Application filed filed Critical
Priority claimed from PCT/US2003/028919 external-priority patent/WO2004027823A2/en
Publication of JP2005539403A publication Critical patent/JP2005539403A/en
Publication of JP2005539403A5 publication Critical patent/JP2005539403A5/ja
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Publication of JP4800625B2 publication Critical patent/JP4800625B2/en
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Claims (14)

積み重ねられた下側および上側パッケージを具備し、前記パッケージのそれぞれは、基板に取り付けられたダイスを有し、前記上側および下側基板は、ワイヤボンディングにより相互接続されることを特徴とするマルチパッケージモジュール。   A multi-package comprising stacked lower and upper packages, each of the packages having dice attached to a substrate, the upper and lower substrates being interconnected by wire bonding module. 第1パッケージ基板上に少なくとも1つのダイスを有する第1パッケージを供給し、
第2パッケージ基板上に少なくとも1つのダイスを有する第2パッケージを前記第1パッケージの上に配置し、
前記第1および第2基板間においてワイヤボンドz軸相互接続を形成することを特徴とするマルチパッケージの形成方法。
Providing a first package having at least one die on a first package substrate;
A second package having at least one die on a second package substrate is disposed on the first package;
Forming a wire bond z-axis interconnect between the first and second substrates;
第1パッケージ上に積み重ねられた第2パッケージを有するマルチパッケージモジュールであって、前記パッケージのそれぞれは、基板に取り付けられたダイスを具備し、前記第2パッケージの基板および前記第1パッケージの基板は、ワイヤボンディングにより相互接続され、前記第1パッケージは、ボールグリッドアレイパッケージであることを特徴とするマルチパッケージモジュール。   A multi-package module having a second package stacked on a first package, each of the packages comprising a die attached to a substrate, wherein the substrate of the second package and the substrate of the first package are The multi-package module is interconnected by wire bonding, and the first package is a ball grid array package. マルチパッケージモジュールの形成方法であって、
第1パッケージ基板を具備するBGA第1パッケージを供給し、
第2パッケージ基板を具備する第2パッケージを供給し、前記第1パッケージ上に第2パッケージを積み重ね、そして
前記第1および第2基板をワイヤボンド接続することにより、前記第1および第2パッケージを電気的に相互接続することを特徴とするマルチパッケージモジュールの形成方法。
A method for forming a multi-package module, comprising:
Supplying a BGA first package having a first package substrate;
Supplying a second package comprising a second package substrate, stacking the second package on the first package, and wire-bonding the first and second substrates to form the first and second packages; A method of forming a multi-package module, characterized by being electrically interconnected.
第1パッケージ上に積み重ねられた第2パッケージを有し、前記積み重ねられたパッケージは、ワイヤボンドにより電気的に相互接続され、前記パッケージの少なくとも1つは、電気遮蔽材を有していることを特徴とするマルチパッケージモジュール。   A second package stacked on the first package, wherein the stacked packages are electrically interconnected by wire bonds, and at least one of the packages has an electrical shield. Features multi-package module. 第1パッケージ上に積み重ねられた第2パッケージを具備するマルチパッケージモジュールの形成方法であって、
遮蔽材を有する第1パッケージを供給し、
第2パッケージを供給し、
前記遮蔽材の略平面な上側表面に前記第2パッケージを積み重ね、そして、
前記第1および第2パッケージをワイヤボンドにより電気的に相互接続することを特徴とするマルチパッケージモジュールの形成方法。
A method of forming a multi-package module comprising a second package stacked on a first package, comprising:
Providing a first package having a shielding material;
Supply the second package,
Stacking the second package on a substantially planar upper surface of the shield; and
A method of forming a multi-package module, wherein the first and second packages are electrically interconnected by wire bonding.
第1パッケージ上に積み重ねられた第2パッケージを有するマルチパッケージモジュールを具備する携帯機器であって、積み重ねられたパッケージは、ワイヤボンドにより電気的に相互接続され、前記パッケージの少なくとも1つは、電気遮蔽材を有することを特徴とする携帯機器。   A portable device comprising a multi-package module having a second package stacked on a first package, wherein the stacked packages are electrically interconnected by wire bonds, wherein at least one of the packages is electrically A portable device having a shielding material. 第1パッケージ上に積み重ねられた第2パッケージを有するマルチパッケージモジュールを具備するコンピュータであって、積み重ねられたパッケージは、ワイヤボンドにより電気的に相互接続され、前記パッケージの少なくとも1つは、電気遮蔽材を有することを特徴とするコンピュータ。   A computer comprising a multi-package module having a second package stacked on a first package, the stacked packages being electrically interconnected by wire bonds, wherein at least one of said packages is electrically shielded A computer comprising a material. 積み重ねられた第1および第2パッケージを具備するマルチパッケージモジュールであって、前記パッケージのそれぞれは、基板に取り付けられたダイスを有し、第1および第2の基板は、ワイヤボンディングにより相互接続され、前記第1パッケージは、上向きダイス構成のフリップチップを有するフリップチップボールグリッドアレイパッケージを具備することを特徴とするマルチパッケージモジュール。   A multi-package module comprising stacked first and second packages, each package having a die attached to a substrate, the first and second substrates being interconnected by wire bonding. The first package comprises a flip chip ball grid array package having flip chips with an upward die configuration. 第1パッケージ基板を有する上向きダイスフリップチップ第1パッケージを供給し、
ダイスおよび第2パッケージ基板を有する第2パッケージを供給し、前記第1パッケージ上に前記第2パッケージを積み重ね、
前記第1パッケージ基板と第2パッケージ基板とをワイヤボンド接続することにより、前記第1および第2パッケージを電気的に相互接続することを特徴とするマルチパッケージモジュールの形成方法。
Providing an upward die flip chip first package having a first package substrate;
Providing a second package having a die and a second package substrate, and stacking the second package on the first package;
A method of forming a multi-package module, wherein the first and second packages are electrically interconnected by wire-bonding the first package substrate and the second package substrate.
積み重ねられた第1および第2パッケージを具備するマルチパッケージモジュールであって、前記パッケージのそれぞれは、基板に取り付けられたダイスを有し、前記第1および第2基板は、ワイヤボンディングにより相互接続され、前記第1パッケージは、下向きダイス構成のフリップチップを有するフリップチップボールグリッドアレイパッケージを具備することを特徴とするマルチパッケージモジュール。   A multi-package module comprising stacked first and second packages, each of the packages having a die attached to a substrate, wherein the first and second substrates are interconnected by wire bonding. The first package comprises a flip chip ball grid array package having flip chips with a downward die configuration. 第1パッケージ基板を有する下向きダイスフリップチップ第1パッケージを供給し、
ダイスおよび第2パッケージ基板を有する第2パッケージを供給し、前記第1パッケージ上に前記第2パッケージを積み重ね、そして
前記第1パッケージ基板と前記第2パッケージ基板とをワイヤボンド接続することにより、前記第1および第2パッケージを電気的に相互接続することを特徴とするマルチパッケージモジュールの形成方法。
Supplying a downward facing die flip chip first package having a first package substrate;
Providing a second package having a die and a second package substrate, stacking the second package on the first package, and wire bonding the first package substrate and the second package substrate; A method of forming a multi-package module, wherein the first and second packages are electrically interconnected.
積み重ねられた下側および上側パッケージを具備し、前記パッケージのそれぞれは、基板に取り付けられたダイスを有し、前記上側および下側基板は、ワイヤボンディングにより送と接続され、前記パッケージの少なくともいずれか1つは、積み重ねられたダイスのパッケージを有することを特徴とするマルチパッケージモジュール。   Stacked lower and upper packages each having a die attached to a substrate, the upper and lower substrates being connected to the feed by wire bonding, and at least one of the packages One is a multi-package module having stacked dice packages. 積み重ねられたダイスの第1パッケージを供給し、
第2パッケージを供給し、
前記第1パッケージ上に前記第2パッケージを積み重ね、そして、
ワイヤボンディングにより前記第1パッケージおよび第2パッケージ間の電気的相互接続を形成することを特徴とするマルチパッケージモジュールの形成方法。
Supply the first package of stacked dies,
Supply the second package,
Stacking the second package on the first package; and
A method of forming a multi-package module, comprising forming an electrical interconnection between the first package and the second package by wire bonding.
JP2004568930A 2002-09-17 2003-09-15 Semiconductor multi-package module having wire bond interconnection between stacked packages and method of forming the same Expired - Fee Related JP4800625B2 (en)

Applications Claiming Priority (15)

Application Number Priority Date Filing Date Title
US41159002P 2002-09-17 2002-09-17
US60/411,590 2002-09-17
US10/632,553 2003-08-02
US10/632,550 2003-08-02
US10/632,552 2003-08-02
US10/632,551 US6838761B2 (en) 2002-09-17 2003-08-02 Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield
US10/632,549 US7064426B2 (en) 2002-09-17 2003-08-02 Semiconductor multi-package module having wire bond interconnect between stacked packages
US10/632,552 US20040061213A1 (en) 2002-09-17 2003-08-02 Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages
US10/632,568 2003-08-02
US10/632,551 2003-08-02
US10/632,550 US6972481B2 (en) 2002-09-17 2003-08-02 Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages
US10/632,568 US7205647B2 (en) 2002-09-17 2003-08-02 Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages
US10/632,553 US7053476B2 (en) 2002-09-17 2003-08-02 Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages
US10/632,549 2003-08-02
PCT/US2003/028919 WO2004027823A2 (en) 2002-09-17 2003-09-15 Semiconductor multi-package module having wire bond interconnection between stacked packages

Related Child Applications (1)

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JP2011137096A Division JP5602685B2 (en) 2002-09-17 2011-06-21 Multi-package module and method for forming the same

Publications (3)

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JP2005539403A JP2005539403A (en) 2005-12-22
JP2005539403A5 true JP2005539403A5 (en) 2006-11-02
JP4800625B2 JP4800625B2 (en) 2011-10-26

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JP2004568930A Expired - Fee Related JP4800625B2 (en) 2002-09-17 2003-09-15 Semiconductor multi-package module having wire bond interconnection between stacked packages and method of forming the same
JP2011137096A Expired - Lifetime JP5602685B2 (en) 2002-09-17 2011-06-21 Multi-package module and method for forming the same
JP2013123601A Expired - Lifetime JP5856103B2 (en) 2002-09-17 2013-06-12 Semiconductor multi-package module having wire bond interconnections between stacked packages

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JP2013123601A Expired - Lifetime JP5856103B2 (en) 2002-09-17 2013-06-12 Semiconductor multi-package module having wire bond interconnections between stacked packages

Country Status (6)

Country Link
EP (1) EP1547141A4 (en)
JP (3) JP4800625B2 (en)
KR (1) KR101166575B1 (en)
AU (1) AU2003272405A1 (en)
TW (3) TWI378548B (en)
WO (1) WO2004027823A2 (en)

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