CN218727404U - High-power wafer testing device - Google Patents
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- CN218727404U CN218727404U CN202221645825.5U CN202221645825U CN218727404U CN 218727404 U CN218727404 U CN 218727404U CN 202221645825 U CN202221645825 U CN 202221645825U CN 218727404 U CN218727404 U CN 218727404U
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Abstract
The utility model discloses a high-power wafer testing device, which comprises a testing cavity, a testing module, a first air pump and a second air pump; the test cavity is used for placing a wafer and is respectively provided with an inert gas inlet and an inert gas outlet; one end of the first air pump is used for accessing inert gas, and the other end of the first air pump is connected with an inert gas inlet of the testing cavity; one end of the second air pump is connected with an inert gas outlet of the test cavity; the test module is arranged in the test cavity and used for testing the wafer placed in the test cavity. According to the scheme, the influence of high and low temperature test environments on the wafer and the test equipment is considered in the high-power wafer test process, and the oxidation resistance of the wafer in the high-temperature test environment and the moisture resistance of the wafer in the low-temperature test environment are ensured by the inert gas exchange mode of injecting and extracting inert gas in the test cavity, so that the safety of the wafer in the high-power wafer test process is ensured, and meanwhile, the long-term stable operation of the test equipment is ensured.
Description
Technical Field
The utility model relates to a power semiconductor device technical field, in particular to high-power wafer testing arrangement.
Background
In the screening test process of the high-power wafer applied to some special scenes, 10kV voltage pulse is needed for testing, the high-temperature test environment temperature reaches more than 300 ℃, and the low-temperature test environment temperature reaches below 70 ℃.
When the environmental temperature reaches more than 300 ℃, if the wafer is exposed to the air, metallic substances such as aluminum, copper and tungsten on the surface of the wafer can be oxidized in different degrees in the testing process, in addition, the metal surface of the electrified carrier can also be oxidized, after the gas permeates into the wafer, the gas can be chemically reacted with a metal target material and an alloy target material in the wafer, meanwhile, under the high temperature, the heat radiation can be transmitted to other parts of testing equipment, the aging of the testing equipment is caused, and the rise of the surface temperature of the testing equipment can also generate potential safety hazards to operators.
When the low temperature reaches below 70 ℃ below zero, the surface of the wafer is prone to generating condensation, which causes short circuit of the electrodes and also risks damaging the wafer to be tested.
Under a normal atmospheric pressure, in a normal air environment, when the distance between two conductors is less than or equal to 5mm, a potential difference of 10kV will generate electric arcs between the two conductors. This greatly limits the spacing of the wafer powered PADs and other PADs or conductors.
For the influence of high-temperature aging, the risk brought by oxidation and chemical action of air on the interior of the wafer is not completely recognized in the conventional testing mode, and the mode of blowing dry air to the area where the wafer is located is adopted conventionally to prevent condensation and dissipate heat.
The way of drying the air by blowing is obvious in practical application to the drying effect in a small-area 30 cubic centimeter space, but actually, the condensation of other areas on the surface of the wafer is caused to the large-size wafer due to the influence of convection and the conventional requirement of humidity of a clean room, and the problem of high temperature is not basically helpful.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a high-power wafer testing arrangement has considered the influence of high, low temperature test environment to wafer and test equipment itself in high-power wafer test process, through the inert gas exchange mode of pouring into in the test cavity and taking inert gas out to guarantee the oxidation resistance of wafer under high temperature test environment and the dampproofing under the low temperature test environment, thereby help having guaranteed the safety of wafer in the high-power wafer test process, ensured test equipment's long-term steady operation simultaneously.
In order to achieve the above object, the utility model provides a following technical scheme:
a high-power wafer testing device comprises a testing cavity, a testing module, a first air pump and a second air pump;
the test cavity is used for placing a wafer and is respectively provided with an inert gas inlet and an inert gas outlet;
one end of the first air pump is used for accessing inert gas, and the other end of the first air pump is connected with an inert gas inlet of the test cavity; one end of the second air pump is connected with an inert gas outlet of the test cavity;
the test module is arranged in the test cavity and used for testing the wafer placed in the test cavity.
Preferably, the inert gas inlet is located above a side wall of the testing chamber; the inert gas outlet is positioned below the other opposite side wall of the testing cavity and is distributed diagonally to the inert gas inlet.
Preferably, the device also comprises a gas detection sensor, a gas pressure sensor and a control module;
the gas detection sensor is arranged in the test cavity and is used for detecting the oxygen content in the test cavity; the gas pressure sensor is arranged in the test cavity; the first air pump, the second air pump, the gas detection sensor and the gas pressure sensor are all in communication connection with the control module.
Preferably, the test module comprises a probe arm, a probe and a wafer tray;
the wafer tray is used for placing the wafer and providing high voltage for the wafer; the probe is arranged on the probe arm and is used for contacting and matching with the top of the wafer and providing low voltage for the wafer.
Preferably, the test module further comprises a probe station;
the probe station is arranged between the probe arm and the wafer tray and is provided with a through hole matched with the probe.
Preferably, the test platform further comprises a mobile test platform;
the movable test bench is arranged in the test cavity, and the wafer tray is arranged at the top of the movable test bench.
Preferably, the mobile test bench is a translation lifting test bench.
Preferably, the translation lifting test platform comprises an X-direction moving mechanism, a Y-direction moving mechanism and a Z-direction moving mechanism;
the Y-direction moving mechanism is arranged at the top of the movable end of the X-direction moving mechanism; the Z-direction moving mechanism is arranged at the top of the movable end of the Y-direction moving mechanism; the wafer tray is arranged on the top of the movable end of the Z-direction moving mechanism.
Preferably, the X-direction moving mechanism, the Y-direction moving mechanism and/or the Z-direction moving mechanism includes a lead screw motor assembly.
According to the above technical scheme, the utility model provides a high-power wafer testing arrangement has considered high, low temperature test environment to the influence of wafer and test equipment itself in high-power wafer test process, through inject into in the test cavity and take inert gas's inert gas exchange mode out to ensure the oxidation resistance of wafer under high temperature test environment and the dampproofing under the low temperature test environment, thereby help guaranteeing the safety of wafer in the high-power wafer test process, ensured test equipment's long-term steady operation simultaneously.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a high-power wafer testing apparatus provided in an embodiment of the present invention;
fig. 2 is a barshen law plot.
The device comprises a test chamber 1, a second air pump 2, an inert gas inlet 3, an inert gas outlet 4, a leak detector 5, a probe arm 6, a probe 7, a wafer tray 8, a probe table 9, a temperature adjusting table 10, a sealing connector 11, an XY-direction moving mechanism 12, a Z-direction moving mechanism 13 and a first air pump 14.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
The embodiment of the utility model provides a high-power wafer testing device, as shown in fig. 1, includes a testing chamber 1, a testing module, a first air pump 14 and a second air pump 2;
the test chamber 1 is used for placing a wafer and is respectively provided with an inert gas inlet 3 and an inert gas outlet 4;
one end of the first air pump 14 is used for accessing inert gas, and the other end is connected with the inert gas inlet 3 of the testing cavity 1; one end of the second air pump 2 is connected with an inert gas outlet 4 of the testing cavity 1;
the test module is disposed in the test chamber 1 and is used for testing the wafer placed in the test chamber 1.
It should be noted that one end of the first air pump 14 is used for being connected with an air outlet of the inert gas source tank, and in addition, the test chamber 1 is a closed test chamber. In addition, when the wafer is in a high-temperature testing environment or a low-temperature testing environment, the first air pump 14 and the second air pump 2 are simultaneously started (to accelerate the speed of gas exchange), that is, the wafer is prevented from being oxidized and condensed in the high-temperature testing environment or the low-temperature testing environment by an inert gas exchange mode of injecting and extracting inert gas in the testing chamber 1. That is, the scheme injects the inert gas into the testing cavity 1 in the gas exchange mode so as to achieve two purposes, wherein one purpose can be achieved, oxidation and other chemical reactions of the wafer can be avoided, and oxidation aging loss of equipment can be avoided; secondly, the heat radiation generated by the test wafer can be taken away quickly, and the whole equipment is prevented from being heated up quickly; and the scheme selects the inert gas to replace the air for exchange, so that the problem that the wafer is damaged due to short circuit in the power-on test process because water molecules in the air are easy to generate condensation and frosting after meeting the low temperature of the wafer can be avoided.
According to the above technical scheme, the embodiment of the utility model provides a high-power wafer testing arrangement has considered high, the low temperature test environment is to wafer and test equipment's influence itself in high-power wafer test process, through inject into in the test cavity and take inert gas's inert gas exchange mode out to ensure the oxidation resistance of wafer under high temperature test environment and the dampproofing under the low temperature test environment, thereby help having guaranteed the safety of wafer in the high-power wafer test process, the long-term steady operation of test equipment has been ensured simultaneously.
In the present embodiment, in order to obtain a better inert gas exchange effect for the testing chamber 1, as shown in fig. 1, the inert gas inlet 3 is located above one side wall of the testing chamber 1; the inert gas outlet 4 is located below the other opposite side wall of the testing chamber 1 and is diagonally distributed from the inert gas inlet 3.
Specifically, the embodiment of the utility model provides a high-power wafer testing arrangement still includes gas detection sensor, gas pressure sensor and control module;
the gas detection sensor is arranged in the test cavity 1 and is used for detecting the oxygen content in the test cavity 1; the gas pressure sensor is arranged in the testing cavity 1 and used for detecting the gas pressure in the testing cavity 1; the first air pump 14, the second air pump 2, the air detection sensor and the air pressure sensor are all in communication connection with the control module. Wherein, when the wafer is in the high, when low temperature test environment needs to carry out gas exchange, open first air pump 14 and second air pump 2 simultaneously through control module, meanwhile detect remaining oxygen content in test cavity 1 through gaseous detection sensor, after oxygen content is less than certain threshold value, rethread control module reduces the pressure of first air pump 14 and second air pump 2 simultaneously, the atmospheric pressure in maintaining test cavity 1 is greater than standard atmospheric pressure, except preventing that air oxygen from getting into test cavity 1, and can take away certain heat in the test cavity 1, the atmospheric pressure that increases in the test cavity 1 also is favorable to reducing the effect of discharging, reduce the risk of discharging. That is to say, this scheme makes the atmospheric pressure in the test cavity 1 be higher than atmospheric pressure after the inert gas exchanges, guarantees the density of the inert gas in the test cavity 1.
Further, as shown in fig. 1, the test module includes a probe arm 6, a probe 7, and a wafer tray 8;
the wafer tray 8 is used for placing wafers and providing high voltage for the wafers; the probes 7 are disposed at the ends of the probe arms 6 and are adapted to contact and engage the top of the wafer and provide a low voltage thereto. The probe 7 and the wafer tray 8 of the present scheme are used as carriers for powering up the test module. In addition, the test module of this scheme so designs, has characteristics such as simple structure, test are convenient. In addition, in order to ensure that the wafer can be tested normally in the testing chamber 1, the pitch of the power-on pad and the power-on electrode of the wafer chip is also controlled. In order to avoid the arcing effect, it is necessary to ensure that no voltage difference is generated within 5mm around the charged members such as the probes 7, the energizing circuit, the wafer tray 8, and the wafer.
Furthermore, in order to avoid the influence of the high temperature of the wafer tray 8 on the probe arm 6, a blocking table needs to be additionally arranged between the wafer tray and the probe arm; correspondingly, as shown in fig. 1, the test module further comprises a probe station 9;
the probe station 9 is arranged between the probe arm 6 and the wafer tray 8 and is provided with through holes for cooperation with the probes 7.
In this scheme, in order to better implement the test of the wafer, the high-power wafer testing device provided by the embodiment of the utility model further comprises a mobile test board;
the movable test bench is arranged in the test cavity 1, and the wafer tray 8 is arranged at the top of the movable test bench. Wherein, the mobile test platform is a translation lifting test platform.
Specifically, the translation lifting test platform comprises an X-direction moving mechanism, a Y-direction moving mechanism and a Z-direction moving mechanism 13;
the Y-direction moving mechanism is arranged at the top of the movable end of the X-direction moving mechanism; the Z-direction moving mechanism 13 is arranged at the top of the movable end of the Y-direction moving mechanism; the wafer tray 8 is disposed on top of the movable end of the Z-direction moving mechanism 13. In addition, this scheme also need avoid the circuit to switch on when setting up parts such as probe, wafer tray in test cavity 1, and the accessible structure carries out electrical isolation with probe and probe arm to wafer tray and work slip table to ensure equipment, the wafer chip that is surveyed and tester's safety under the high voltage condition. The structural member can be made of high-insulation, high-heat-conduction and low-vacuum deflation materials, and the thickness of the structural member is ensured to be more than 5 mm.
In order to further optimize the above technical solution, the X-direction moving mechanism, the Y-direction moving mechanism and/or the Z-direction moving mechanism 13 includes a lead screw motor assembly. Wherein, translation elevating platform adopts lead screw motor assembly, has simple structure, characteristics such as the motion is steady reliable. As shown in fig. 1, the XY-direction moving mechanism 12 in this embodiment is composed of the above-described X-direction moving mechanism and Y-direction moving mechanism.
In addition, in order to avoid the situation that the test chamber 1 is leaked, the leak detection of the test chamber 1 is needed; correspondingly, as shown in fig. 1, the embodiment of the present invention provides a high-power wafer testing apparatus, further comprising:
and the leak detector 5 is arranged on the inner wall of the testing cavity 1.
In addition, similarly, the influence of the high temperature of the wafer tray 8 on the mobile test bench is avoided; correspondingly, as shown in fig. 1, the embodiment of the present invention provides a high-power wafer testing apparatus, further comprising:
and the temperature adjusting table 10 is arranged in the test cavity 1 and connected between the wafer tray 8 and the top of the movable test bench. Namely, the temperature conducted from the wafer tray 8 to the top of the mobile test platform is adjusted through the temperature adjusting platform 10, so that the top of the mobile test platform is prevented from being affected by high temperature. The temperature control stage 10 is provided on the top of the movable end of the Z-direction moving mechanism 13, and the wafer tray 8 is provided on the top of the temperature control stage 10.
In addition, in the present solution, in order to ensure that the wafer can be normally powered up in the test chamber 1, the electrical connection line of the test module needs to be led into the test chamber 1 from an external high voltage power supply, but in order to ensure the air tightness of the test chamber 1, the electrical connection line of the test module needs to be subjected to sealing threading treatment; correspondingly, as shown in fig. 1, the embodiment of the present invention provides a high-power wafer testing apparatus, further comprising:
and a sealing connector 11 penetrating through the wall of the test chamber 1 for passing through the electrical connection wires of the test module. In addition, in order to avoid the electrical connection wires from forming abnormal conduction with the testing chamber 1 in the energized state, the sealing connector 11 needs to be made of a high-insulation low-vacuum outgassing material. Of course, as shown in fig. 1, the present solution can also perform probing of two wafers. Wherein the number of probe arms 6, 7 required to be used is also two.
The scheme is further described below:
the utility model discloses the technical problem who solves:
the utility model discloses a solve ageing resistance, heat radiation and microthermal condensation problem under the high temperature, consider the arc discharge problem between the high voltage conductor simultaneously.
When the environmental temperature reaches above 300 ℃, if the wafer is exposed to the air, metallic substances such as aluminum, copper, tungsten and the like on the surface of the wafer can be oxidized to different degrees in the testing process, and meanwhile, the metal surface of the powered carrier (probe or powered metal table) can be oxidized, so that after gas permeates into the wafer, the gas can be chemically reacted with the metal target and the alloy target in the wafer.
1. According to the formula of heat radiation:
Q＝σT 4 A
stefan Boltzmann constant, 5.67E-8 (W/m) 2 k 4 )
Q heat transfer per unit time
T is absolute temperature
| σ | 5.67E-08 | 5.67E-08 | 5.67E-08 | W/m 2 k 4 |
| A | 0.04 | 0.04 | 0.04 | 2 |
| T | 25+273.15 | 300+273.15 | 400+273.15 | K |
| Q | 1.79E+01 | 2.45E+02 | 4.66E+02 | W |
TABLE 1
According to the data in Table 1, a 0.04 square meter wafer will generate 245W of heat per unit time at 300 degrees Celsius.
2. According to the formula of heat transfer:
K＝Qd/A△T
k is coefficient of thermal conductivity
Q conductive heat
d space distance of isothermal plane
A surface area
Delta T temperature difference
The heat transfer coefficients of common gases are shown in table 2:
| gas (es) | Coefficient of thermal conductivity (W/mK) |
| Air | 0.026 |
| Ar | 0.018 |
| CO | 0.025 |
| CO2 | 0.017 |
| H | 0.182 |
| He | 0.151 |
| N2 | 0.026 |
| Ne | 0.049 |
| O2 | 0.027 |
TABLE 2
Taking air as an example, the heat transfer rate at 300 ℃ is 62.4W on one side and 124.8W on both sides for a 0.04 square meter wafer (see Table 3).
| K | 0.026 | 0.026 | 0.026 | W/mK |
| A | 0.04 | 0.04 | 0.04 | 2 |
| d | 0.005 | 0.005 | 0.005 | m |
| △ |
100 | 300 | 400 | C |
| Q | 20.8 | 62.4 | 83.2 | W |
TABLE 3
The heat that can be taken away by using air obviously cannot completely take away the heat radiation of the wafer, and the redundant radiation will be accumulated in the wafer chamber, and finally the whole equipment reaches a higher temperature.
Water molecules in the air are easy to generate condensation and frost after meeting the low temperature of the wafer. It can cause short circuits during power-up testing and damage to the wafer.
The utility model discloses the concrete embodiment that the technique was realized:
as shown in fig. 1, the utility model discloses mechanical structure with most wafer test uses with add the electrical structure airtight in a cavity, denominate this cavity wafer room, install the sealed pipeline of gaseous injection and extraction gas and the circuit sealed pipeline that the test needs additional on the wafer room, the gaseous detection sensor of indoor installation of wafer and gas pressure sensor.
The gas injection port in the wafer chamber is arranged above one side of the wafer chamber, the gas extraction port is arranged below the other side of the wafer chamber in a diagonal form, and the air guide groove is arranged in the wafer chamber. Utilize gaseous sensor that detects, detect the indoor surplus oxygen content of wafer, after oxygen content is less than certain threshold value, reduce the air pump of extraction gas simultaneously and pour into the pressure of gaseous air pump into, maintain the inside atmospheric pressure of cavity and be greater than standard atmospheric pressure to guarantee that the air can not get into the wafer because of pressure indoor, can also take away the heat in certain wafer simultaneously, the atmospheric pressure that increases in the cavity is favorable to reducing the effect of discharging moreover, reduces the risk of discharging.
In the high temperature test environment, the test temperature of the wafer is above 300 ℃. And selecting inert gas with small influence on the wafer and high heat conduction coefficient by combining the characteristics of the wafer, and injecting the inert gas into the wafer chamber in the gas exchange mode. The method has two purposes, one of which can avoid the oxidation of the wafer and other chemical reactions, and simultaneously avoid the oxidation aging loss of the equipment. And the second one can take away the heat radiation generated by the test wafer quickly, thereby avoiding the quick temperature rise of the whole equipment.
| Air | H | He | |
| K | 0.026 | 0.182 | 0.151 |
| A | 0.04 | 0.04 | 0.04 |
| d | 0.005 | 0.005 | 0.005 |
| △T | 300 | 300 | 300 |
| Q | 62.4 | 436.8 | 362.4 |
TABLE 4
The arcing effect of different gases at high voltage of 10kV also needs to be considered when selecting the gases.
According to Barshen's law, the relationship between the voltage pulse frequency at 400Hz at room temperature, the different gas pressure spacing and the voltage generated arc is shown in FIG. 2.
The arcing effect of different gases at high voltage of 10kV also needs to be considered when selecting the gases.
In summary, the influence of the gas on the wafer, the thermal conductivity, and the arc effect are considered in selecting the wafer chamber inflation gas at high temperature, and a suitable gas is selected by combining these factors.
In a low-temperature test environment, the test temperature of the wafer is below-60 ℃, and when gas exchange is needed, the gas pump for injecting and extracting gas is started simultaneously to accelerate the gas exchange speed. Utilize gaseous sensor that detects, detect the indoor surplus oxygen content of wafer, after oxygen content is less than certain threshold value, need close the air pump of extraction gas, reduce the pressure of injection gas air pump to reduce the heat exchange of the indoor gaseous of wafer, maintain the inside atmospheric pressure of cavity and be greater than standard atmospheric pressure, in order to guarantee that the air can not get into the wafer indoor because of pressure.
The gas selection also takes into account the effect of the gas on the wafer and the effect of the gas on the arcing effect. After the inert gas is used for replacing the air, water molecules in the air are exchanged out of the wafer chamber, and the risk of condensation and frost is avoided.
The utility model discloses technical scheme has considered the influence of high-temperature gas to wafer and test equipment itself in high-power wafer test process to and the harm that the electric arc effect brought under the high-voltage test condition, guarantee the oxidation resistance of wafer under high temperature through the structure of airtight cavity and the mode of pouring into inert gas, and the dampproofing under the low temperature. And the arc effect of the conductor under high voltage is guided and avoided by using the discharge characteristics of different gases.
Meanwhile, a gas exchange mode and a gas exchange process are designed, the oxygen removal efficiency is improved, and the density of the inert gas in the wafer chamber is ensured by using the pressure higher than the atmospheric pressure.
The design effectively ensures the safety of the wafer in the process of testing the high-power wafer, and simultaneously ensures the long-term stable operation of the testing equipment.
In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A high-power wafer testing device is characterized by comprising a testing cavity (1), a testing module, a first air pump (14) and a second air pump (2);
the test cavity (1) is used for placing wafers and is respectively provided with an inert gas inlet (3) and an inert gas outlet (4);
one end of the first air pump (14) is used for accessing inert gas, and the other end of the first air pump is connected with the inert gas inlet (3) of the testing cavity (1); one end of the second air pump (2) is connected with an inert gas outlet (4) of the testing cavity (1);
the test module is arranged in the test cavity (1) and is used for testing the wafer placed in the test cavity (1).
2. The high power wafer test apparatus according to claim 1, wherein the inert gas inlet (3) is located above a sidewall of the test chamber (1); the inert gas outlet (4) is positioned below the other opposite side wall of the testing cavity (1) and is distributed diagonally to the inert gas inlet (3).
3. The high power wafer test apparatus according to claim 1, further comprising a gas detection sensor, a gas pressure sensor and a control module;
the gas detection sensor is arranged in the test cavity (1) and is used for detecting the oxygen content in the test cavity (1); the gas pressure sensor is arranged in the test cavity (1); the first air pump (14), the second air pump (2), the air detection sensor and the air pressure sensor are all in communication connection with the control module.
4. The high power wafer test apparatus according to claim 1, wherein the test module comprises a probe arm (6), a probe (7) and a wafer tray (8);
the wafer tray (8) is used for placing the wafers and providing high voltage for the wafers; the probe (7) is arranged on the probe arm (6) and is used for contacting and matching with the top of the wafer and providing low voltage for the wafer.
5. The high power wafer test apparatus according to claim 4, wherein the test module further comprises a probe station (9);
the probe station (9) is arranged between the probe arm (6) and the wafer tray (8) and is provided with a through hole used for being matched with the probe (7).
6. The high power wafer test apparatus as claimed in claim 4, further comprising a mobile test station;
the movable test bench is arranged in the test cavity (1), and the wafer tray (8) is arranged at the top of the movable test bench.
7. The high power wafer test apparatus as claimed in claim 6, wherein the moving test table is a translational elevating test table.
8. The high power wafer testing device according to claim 7, wherein the translation elevating test platform comprises an X-direction moving mechanism, a Y-direction moving mechanism and a Z-direction moving mechanism (13);
the Y-direction moving mechanism is arranged at the top of the movable end of the X-direction moving mechanism; the Z-direction moving mechanism (13) is arranged at the top of the movable end of the Y-direction moving mechanism; the wafer tray (8) is arranged on the top of the movable end of the Z-direction moving mechanism (13).
9. The high power wafer testing device according to claim 8, wherein the X-direction moving mechanism, the Y-direction moving mechanism and/or the Z-direction moving mechanism (13) comprises a lead screw motor assembly.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116774019A (en) * | 2023-08-24 | 2023-09-19 | 杭州中安电子有限公司 | Wafer burn-in test equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116774019A (en) * | 2023-08-24 | 2023-09-19 | 杭州中安电子有限公司 | Wafer burn-in test equipment |
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