CN218071441U

CN218071441U - Feedback amplifier, radio frequency chip and electronic device

Info

Publication number: CN218071441U
Application number: CN202220770473.XU
Authority: CN
Inventors: 刘石生; 黄伟
Original assignee: Shenzhen Jingzhun Communication Technology Co ltd
Current assignee: Shenzhen Jingzhun Communication Technology Co ltd
Priority date: 2022-04-01
Filing date: 2022-04-01
Publication date: 2022-12-16
Anticipated expiration: 2032-04-01

Abstract

The embodiment of the application discloses feedback amplifier, radio frequency chip and electron device, feedback amplifier includes: a field effect transistor; the first end of the drain electrode matching circuit is connected with the drain electrode of the field effect transistor, and the second end of the drain electrode matching circuit is connected with the radio frequency signal output end; the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end; the first end of the source electrode matching circuit is connected with the source electrode of the field effect transistor; the first end of the feedback circuit is connected with the fourth end of the grid matching circuit, and the second end of the feedback circuit is connected with the third end of the drain matching circuit; the drain electrode matching circuit comprises a low coupling inductance pair, and the low coupling inductance pair is an inductance pair with opposite induction magnetic field directions. The feedback amplifier of the application can enable the gain to be flat, reduce the energy loss of the feedback amplifier, reduce the size of the feedback amplifier and reduce the cost.

Description

Feedback amplifier, radio frequency chip and electronic device

Technical Field

The present application relates to the field of electronic technologies, and in particular, to a feedback amplifier, a radio frequency chip, and an electronic device.

Background

With the development of communication technology, especially the emergence of 5G technology, high frequency wireless communication technology is becoming an important development direction of wireless communication.

The rf transceiver system for high frequency wireless communication includes a large number of amplifiers, and the performance of the amplifiers can have a significant influence on the performance of the rf transceiver system. Therefore, high frequency wireless communication technology puts higher demands on the performance of amplifiers, such as miniaturization, gain flatness, integration, power consumption, and the like.

The existing radio frequency or high frequency amplifier chip is mostly composed of elements such as transistors, lumped parameter element inductors, lumped parameter element capacitors, resistors, microstrip lines and the like. In the element, an inductor, a microstrip line, a capacitor, etc. may generate electromagnetic radiation and other induced magnetic or electric fields, etc. due to signal excitation, and these physical fields may affect the arrangement and normal operation of other elements. In designing or manufacturing an amplifier, in order to solve the problem of electromagnetic compatibility between elements, there is a method of achieving electromagnetic compatibility by maintaining a large arrangement pitch of the elements, which results in a large size of the amplifier, inconvenience in high-density integration, and inconvenience in cost reduction. In addition, electromagnetic radiation, induced magnetic fields or electric fields cause energy losses, sacrificing the performance of the amplifier. In order to realize the popularization of high-frequency wireless communication technology, the problems of reducing the cost of components and improving the performance of the components are urgently needed to be solved.

SUMMERY OF THE UTILITY MODEL

In order to solve the technical problem or at least partially solve the technical problem, the application provides a feedback amplifier, a radio frequency chip and an electronic device.

In a first aspect, the present application provides a feedback amplifier comprising:

the field effect transistor comprises an enhancement type field effect transistor and a depletion type field effect transistor, and comprises a drain electrode, a grid electrode and a source electrode, and the field effect transistor is used for amplifying signals;

the first end of the drain electrode matching circuit is connected with the drain electrode of the field effect transistor, and the second end of the drain electrode matching circuit is connected with the radio frequency signal output end;

the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end;

the first end of the source electrode matching circuit is connected with the source electrode of the field effect transistor;

a first end of the feedback circuit is connected with a fourth end of the grid matching circuit, and a second end of the feedback circuit is connected with a third end of the drain matching circuit;

the drain electrode matching circuit comprises a low coupling inductance pair, and the low coupling inductance pair is an inductance pair with opposite induction magnetic field directions.

In an embodiment of the present application, the low coupling inductor pair includes:

the first end of the first inductor is connected with the drain electrode of the field effect transistor;

a first end of the second inductor is connected with a drain electrode bias power supply end, and a second end of the second inductor is connected with a second end of the first inductor;

wherein the first inductor and the second inductor have opposite induction magnetic field directions.

In an embodiment of the present application, the drain matching circuit further includes:

a first end of the first capacitor is connected with a second end of the first inductor, and a second end of the first capacitor is connected with the radio-frequency signal output end;

and the first end of the second capacitor is connected with the first end of the second inductor, and the second end of the second capacitor is grounded.

In an embodiment of the present application, the feedback circuit includes:

a third inductive unit, a first end of the third inductive unit is connected with a fourth end of the grid matching circuit;

a second resistor, a first end of which is connected to a second end of the third inductive unit;

a first end of the fifth capacitor is connected with the second end of the second resistor, and a second end of the fifth capacitor is connected with the second end of the first inductor;

wherein, the third inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In an embodiment of the present application, the gate matching circuit includes:

a first end of the third capacitor is connected with the radio-frequency signal input end, a second end of the third capacitor is used as a fourth end of the grid matching circuit and is connected with the first end of the feedback circuit, the second end of the third capacitor is further connected with the grid of the field effect tube, and the second end of the third capacitor is further connected with the first end of the feedback circuit;

a first end of the fourth inductive unit is connected with the second end of the third capacitor, and the second end of the fourth inductive unit is the third end of the grid matching circuit;

wherein, the fourth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

a first end of the third capacitor is connected with the radio frequency signal input end;

an eighth inductive unit, a first end of the eighth inductive unit being connected to the second end of the third capacitor;

a ninth inductive unit, a first end of which is connected to a second end of the eighth inductive unit, a first end of which is used as a fourth end of the gate matching circuit and is further connected to the first end of the feedback circuit, and a second end of which is connected to the gate of the fet;

any one of the fourth, eighth and ninth sensing units is one of an inductor, a microstrip line or a combination of an inductor and a microstrip line.

In this embodiment, the feedback amplifier further includes a gate bias circuit, and the gate bias circuit is connected to the third terminal of the gate matching circuit.

In an embodiment of the present application, the gate bias circuit further includes:

a first end of the fourth capacitor is grounded, a second end of the fourth capacitor is connected with the grid bias power supply end, and a second end of the fourth capacitor is further connected with a second end of the fourth inductive unit.

In an embodiment of the present application, the source matching circuit includes:

a fifth inductive unit, wherein a first end of the fifth inductive unit is connected with the source electrode of the field effect transistor, and a second end of the fifth inductive unit is grounded;

wherein, the fifth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In the embodiment of the present application, the source matching circuit is ground.

In the embodiment of the present application, the gate bias circuit is ground.

a sixth inductive unit, wherein a first end of the sixth inductive unit is connected with the source electrode of the field effect transistor;

a sixth capacitor, a first end of the sixth capacitor being connected to the second end of the sixth inductive unit, a second end of the sixth capacitor being grounded;

a first resistor, a first end of which is connected to the second end of the seventh inductive unit, and a second end of which is grounded;

the sixth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

a first end of the seventh inductive unit is connected with the source electrode of the field effect transistor;

a seventh capacitor, a first end of which is connected to the second end of the seventh inductive unit, and a first end of which is further connected to a source bias power supply terminal, and a second end of which is grounded;

wherein, the seventh inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In an embodiment of the present application, the first inductor and the second inductor are both spiral inductors and are arranged in the feedback amplifier with opposite spiral directions.

In an embodiment of the present application, the first inductor and the second inductor are arranged in the feedback amplifier as mirror images of each other.

In the embodiment of the present application, the first inductor is composed of a first microstrip line, and the first microstrip line is wound into a first spiral pattern, the second inductor is composed of a second microstrip line, and the second microstrip line is wound into a second spiral pattern, wherein the first end and the second end of the first microstrip line are respectively used as the first end and the second end of the first inductor, the first end and the second end of the second microstrip line are respectively used as the first end and the second end of the second inductor, and the second end of the first microstrip line and the second end of the second microstrip line are connected together to enable the first microstrip line and the second microstrip line to form a combined microstrip line.

In an embodiment of the present application, the first and second spiral patterns do not overlap and are adjacent to but at a distance from each other in a direction parallel to the wiring layer of the feedback amplifier.

In the embodiment of the present application, the merged microstrip line is formed by multiple layers of metal materials, where each layer of metal material is located in a different wiring layer of the feedback amplifier.

In an embodiment of the present application, the merged microstrip line is formed by a single layer of metal material, where the single layer of metal material is located in the same or different wiring layers of the feedback amplifier.

In a second aspect, a radio frequency chip is provided, which includes a substrate, and the above-mentioned feedback amplifier on the substrate.

In a third aspect, an electronic device is provided, which includes the rf chip as described above.

The embodiment of the application discloses a feedback amplifier, feedback amplifier includes: the field effect transistor comprises a drain electrode, a grid electrode and a source electrode, and is used for signal amplification; the first end of the drain electrode matching circuit is connected with the drain electrode of the field effect tube, and the second end of the drain electrode matching circuit is connected with the radio frequency signal output end; the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end; the first end of the source electrode matching circuit is connected with the source electrode of the field effect transistor; a first end of the feedback circuit is connected with a fourth end of the grid matching circuit, and a second end of the feedback circuit is connected with a third end of the drain matching circuit; the drain electrode matching circuit comprises a low coupling inductance pair, and the low coupling inductance pair is an inductance pair with opposite induction magnetic field directions. In the embodiment of the application, the low coupling inductance pair is an inductance pair with opposite directions of the induction magnetic fields, the directions of the induction electric fields generated by the pair of inductances with opposite directions of the induction magnetic fields are also opposite, and the induction electric fields with opposite directions can be partially offset, so that the radiation generated by the induction electric fields is reduced, and the energy loss of the circuit is reduced. In addition, the physical distance of the inductors in the low-coupling inductor pair can be closer because the induced electric fields are partially offset, so that the size of the circuit can be reduced, and the cost is reduced. The feedback circuit can enable the input and the output of the feedback amplifier to realize impedance matching more easily, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit are small and large by adjusting the parameters of the feedback circuit, so that the gain in the working bandwidth of the feedback amplifier is increased along with the increase of the frequency.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive labor.

Fig. 1 to 7 are circuit schematic diagrams of a feedback amplifier in an embodiment of the present application;

FIG. 8 is a diagram of an RF chip in an embodiment of the present application;

FIG. 9 is a schematic diagram of the arrangement of low coupled inductor pairs in a feedback amplifier in an embodiment of the present application;

fig. 10 is a schematic diagram of an electronic device in an embodiment of the application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making creative efforts shall fall within the protection scope of the present application.

The feedback amplifier provided by the embodiment of the application can be used as an independent component, or can be applied to radio frequency chip or system integration.

As shown in fig. 1, an embodiment of the present application provides a feedback amplifier, including:

the field effect transistor 110, the field effect transistor 110 includes a drain, a gate and a source, and the field effect transistor 110 is used for signal amplification;

a drain matching circuit 120, wherein a first end of the drain matching circuit 120 is connected to the drain of the field effect transistor 110, and a second end of the drain matching circuit 120 is connected to a radio frequency signal output end RFOUT;

a gate matching circuit 130, wherein a first end of the gate matching circuit 130 is connected to the gate of the fet 110, and a second end of the gate matching circuit 130 is connected to the radio frequency signal input terminal RFIN;

a source matching circuit 140, wherein a first end of the source matching circuit 140 is connected to the source of the fet 110;

a first terminal of the feedback circuit 150 is connected to the fourth terminal of the gate matching circuit 130, and a second terminal of the feedback circuit 150 is connected to the third terminal of the drain matching circuit 120;

the drain matching circuit 120 includes a pair of low-coupling inductors 121, and the pair of low-coupling inductors 121 are inductors with opposite directions of an induced magnetic field.

In the field effect transistor 110 in the embodiment of the present application, the three electrodes are a Source electrode (Source, S electrode), a Gate electrode (Gate, G electrode) and a Drain electrode (Drain, D electrode), respectively, for amplifying a radio frequency signal, and details are not repeated herein.

In the embodiment of the present application, the drain matching circuit 120 is configured to match the drain output impedance of the fet 110 to a first target impedance, which is the output impedance of the rf signal output terminal RFOUT of the feedback amplifier.

In the embodiment of the present application, the gate matching circuit 130 is configured to match the gate input impedance of the fet 110 to a second target impedance, which is the input impedance of the rf signal input terminal RFIN of the feedback amplifier.

In the embodiment of the present application, the source matching circuit 140 is configured to adjust the gate optimal gain matching impedance of the fet 110 and the gate optimal noise impedance of the fet 110 to be close to or consistent with each other, so as to optimize the noise performance and the gain performance of the feedback amplifier.

In the embodiment of the present application, the feedback circuit 150 is configured to implement impedance matching between the input and the output of the feedback amplifier, and meanwhile, parameters of the feedback circuit 150 may be adjusted to make the high-frequency feedback amount of the feedback circuit 150 small and the low-frequency feedback amount large, so that the gain in the operating bandwidth of the feedback amplifier increases with the increase of the frequency.

In the embodiment of the present application, as shown in fig. 2, the low-coupling inductor pair 121 includes:

a first inductor L1, a first end of the first inductor L1 being connected to the drain of the fet 110;

a first end of the second inductor L2 is connected to the drain bias power supply terminal VD, and a second end of the second inductor L2 is connected to a second end of the first inductor L1;

the first inductor L1 and the second inductor L2 have opposite directions of induced magnetic fields.

In the embodiment of the present application, the first inductor L1 and the second inductor L2 may be planar spiral inductors, and a spiral direction of the first inductor L1 is opposite to a spiral direction of the second inductor L2.

In other embodiments of the present application, the first inductor L1 and the second inductor L2 may also be other structures and physical layouts capable of realizing opposite directions of the induced magnetic field, and are not described herein again.

When the inductor is excited by a signal, an induction magnetic field can be generated, an induction electric field can be generated by the induction magnetic field, and radiation can be generated by the induction electric field, so that energy loss is generated; therefore, an induction magnetic field is also present in the inductor L1 and the inductor L2, and an energy loss is generated by an induction electric field generated by the induction magnetic field.

In the embodiment of the present application, the directions of the induction magnetic fields of the first inductor L1 and the second inductor L2 are opposite, so that the directions of the induction electric field generated by the induction magnetic field of the first inductor L1 and the induction electric field generated by the induction magnetic field of the second inductor L2 are also opposite, and the two opposite induction electric fields can be partially offset, so that the radiation generated by the induction electric fields is reduced, and the energy loss is reduced.

Because the induced electric field between the first inductor L1 and the second inductor L2 is partially offset, the physical distance between the first inductor L1 and the second inductor L2 can be closer, so that the size of the circuit can be reduced, and the cost can be reduced.

In the embodiment of the present application, the drain matching circuit 120 includes a pair of low-coupling inductors 121, and the pair of low-coupling inductors 121 are a pair of inductors L1 and L2 with opposite directions of an induced magnetic field, so that mutual coupling can be reduced, and energy loss can be reduced. In addition, the physical distance between the first inductor L1 and the second inductor L2 can be closer, so that the size of the circuit can be reduced, and the cost can be reduced.

In the embodiment of the present application, as shown in fig. 2, the drain matching circuit 120 further includes:

a first end of the first capacitor C1 is connected with a second end of the first inductor L1, and a second end of the first capacitor C1 is connected with a radio frequency signal output end FROUT;

and a first end of the second capacitor C2 is connected with a first end of the second inductor L2, and a second end of the second capacitor C2 is grounded.

In the embodiment of the present application, the first capacitor C1, the second capacitor C2 and the low-coupling inductor pair 121 form a matching network, which is used to match the drain output impedance of the fet 110 to a first target impedance.

In this embodiment, the resonant frequency of the second capacitor C2 is close to or the same as the center frequency of the working frequency band of the feedback amplifier, so as to achieve isolation of the ac signal between the feedback amplifier and the drain bias power supply terminal VD, and provide a radio frequency signal ground for the first end of the second inductor L2 in the drain matching circuit 120.

As shown in fig. 2, in the embodiment of the present application, the feedback circuit 150 includes:

a third inductive unit L3, wherein a first end of the third inductive unit L3 is connected to a fourth end of the gate matching circuit 130;

a second resistor R2, a first end of the second resistor R2 being connected to a second end of the third inductive unit L3;

a first end of the fifth capacitor C5 is connected to the second end of the second resistor R2, and a second end of the fifth capacitor C5 is connected to the second end of the first inductor L1;

the third sensing unit L3 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

In the embodiment of the present application, the third inductive element L3 in the feedback circuit 150 has a low-pass characteristic, so that the feedback circuit 150 has a relatively large low-frequency feedback amount and a relatively small high-frequency feedback amount in the feedback amplifier, and thus, the feedback circuit can be used to make the high-frequency feedback amplitude and the low-frequency feedback amplitude in the output signal of the feedback amplifier different, thereby achieving the purpose of adjusting the high-frequency gain and the low-frequency gain simultaneously.

The second resistor R2 in the feedback circuit 150 has a signal blocking characteristic, and when the resistance of the second resistor R2 itself is small, the feedback amount is large; when the resistance value of the second resistor R2 itself is large, the feedback amount is small. Therefore, the purpose of adjusting the overall gain of the feedback amplifier can be achieved by adjusting the resistance value of the second resistor R2.

As shown in fig. 2, in the embodiment of the present application, the gate matching circuit 130 includes:

a third capacitor C3, a first end of the third capacitor C3 is connected to the radio frequency signal input terminal RFIN, a second end of the third capacitor C3 is connected to the first end of the feedback circuit 150, and a second end of the third capacitor C3 is further connected to the gate of the fet 110;

a fourth inductive unit L4, a first end of the fourth inductive unit L4 is connected to the second end of the third capacitor C3, and a second end of the fourth inductive unit L4 is a third end of the gate matching circuit 130;

wherein, the fourth inductive unit L4 is one of an inductor, a microstrip line or a combination of an inductor and a microstrip line.

In this embodiment, the feedback amplifier further includes a gate bias circuit 160, and the gate bias circuit 160 is connected to the third terminal of the gate matching circuit 130.

The gate bias circuit 160 further includes:

a first end of the fourth capacitor C4 is grounded, a second end of the fourth capacitor C4 is connected to the gate bias power supply terminal VG, and a second end of the fourth capacitor C4 is further connected to the second end of the fourth inductive unit L4.

In the embodiment of the present application, the resonant point frequency of the fourth capacitor C4 is close to or the same as the center frequency of the working frequency band of the feedback amplifier, and is used for realizing the isolation of the feedback amplifier from the ac signal of the gate bias power supply terminal VG and providing a radio frequency signal ground for the second terminal of the fourth inductor L4.

In the embodiment of the present application, as shown in fig. 2, the source matching circuit 140 includes:

a fifth inductive unit L5, a first end of the fifth inductive unit L5 is connected to the source of the fet 110, and a second end of the fifth inductive unit L5 is grounded;

the fifth sensing unit L5 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

The fifth inductive unit L5 may adjust the gate optimal gain matching impedance of the fet 110 and the gate optimal noise impedance of the fet 110 to be similar or identical, so as to optimize the noise performance and gain performance of the feedback amplifier.

As shown in fig. 3, in the embodiment of the present application, the source matching circuit 140 is a ground.

In a specific application scenario of the embodiment of the present application, in the source matching circuit 140, the source matching circuit 140 is a ground, i.e., the source of the fet 110 may be directly grounded.

In the embodiment shown in fig. 2 and 3, the gate bias voltage VG is provided to the fet 110 through the gate bias power supply terminal VG, and the drain bias voltage VD is provided to the fet 110 through the drain bias power supply terminal VD. The rf signal is input through the rf signal input terminal RFIN, passes through the gate matching circuit 130, drives the gate of the fet 110, is amplified by the fet 110, passes through the drain matching circuit 120, and is output through the rf signal output terminal RFOUT. In the embodiments shown in fig. 2 and fig. 3, the feedback circuit 150 can make the input and output of the feedback amplifier more easily achieve impedance matching, and at the same time, by adjusting the parameters of the feedback circuit 150, the feedback circuit 150 has a small high-frequency feedback amount and a large low-frequency feedback amount, so that the gain in the operating bandwidth of the feedback amplifier increases with the increase of the frequency. The positive slope of the gain of the feedback amplifier according to the embodiment of the present application may compensate for the negative slope of the gain of other lossy circuits or other amplification circuits in the radio frequency link, so that the gain of the radio frequency link is relatively flat.

In the embodiment of the present application, in the embodiment shown in fig. 2 and fig. 3, the drain matching circuit 120 of the feedback amplifier includes the low-coupling inductor pair 121, and the low-coupling inductor pair 121 is an inductor pair with opposite directions of the induced magnetic field, which can reduce energy loss in the drain matching circuit 120, improve the integration level of the feedback amplifier, reduce the circuit size, and reduce the cost.

In the embodiments shown in fig. 2 and 3 of the present application, the gate bias voltage VG needs to be provided, and in the embodiment shown in fig. 4 of the present application, a single power supply self-biased feedback amplifier may be used, so that the gate bias voltage VG does not need to be provided.

As shown in fig. 4, in the embodiment of the present application, the gate bias circuit 160 is ground, i.e., the second terminal of the fourth inductor L4 is grounded.

As shown in fig. 4, in the embodiment of the present application, the source matching circuit 140 includes:

the source matching circuit 140 includes:

a sixth inductive unit L6, wherein a first end of the sixth inductive unit L6 is connected to the source of the fet 110;

a sixth capacitor C6, wherein a first end of the sixth capacitor C6 is connected to a second end of the sixth inductive unit L6, and a second end of the sixth capacitor C6 is grounded;

a first resistor R1, a first end of the first resistor R1 being connected to the second end of the sixth inductive unit L6, and a second end of the first resistor R1 being grounded;

the sixth inductive unit L6 is one of an inductor, a microstrip line, or a combination of an inductor and a microstrip line.

In this embodiment, the sixth inductive unit L6 may adjust the gate optimal gain matching impedance of the fet 110 and the gate optimal noise impedance of the fet 110 to be close to or consistent with each other, so as to optimize the noise performance and gain performance of the feedback amplifier.

In the embodiment of the present application, the sixth capacitor C6 is used to couple the rf signal output by the source of the fet 110 and passing through the sixth inductive unit L6 to the ground, so as to reduce the energy loss of the source matching circuit 140.

In the embodiment of the present application, the first resistor R1 is used to raise the source potential of the fet 110, so that the gate-to-source voltage of the fet 110 is a negative value, and the normal operation of the feedback amplifier is maintained.

In the embodiment shown in fig. 4, a drain bias voltage VD is provided to the fet 110 through the drain bias power source terminal VD, and at this time, the drain-source current of the fet 110 flows through the resistor R1 in the source matching circuit 140, so as to raise the source potential of the fet 110, so that the gate-source voltage of the fet 110 is negative, and the normal operation of the fet 110 is maintained. The rf signal is input through the rf signal input terminal RFIN, passes through the gate matching circuit 130, drives the gate of the fet 110, is amplified by the fet 110, passes through the drain matching circuit 120, and is output through the rf signal output terminal RFOUT. In the embodiment shown in fig. 4, the feedback circuit 150 can make the input and output of the feedback amplifier more easily realize impedance matching, and at the same time, by adjusting the parameters of the feedback circuit 150, the feedback circuit 150 has a small high-frequency feedback amount and a large low-frequency feedback amount, so that the gain in the operating bandwidth of the feedback amplifier increases with the increase of the frequency. The positive slope of the gain of the feedback amplifier in the embodiment of the application can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is relatively flat.

In the embodiment of the present application, in the embodiment shown in fig. 4, the drain matching circuit 120 of the feedback amplifier includes a low coupling inductor pair 121, and the low coupling inductor pair 121 is an inductor pair with opposite directions of the induced magnetic field, which can reduce energy loss in the drain matching circuit 120, improve the integration level of the feedback amplifier, reduce the circuit size, and reduce the cost.

In the embodiment of the present application, as shown in fig. 5, the gate-bias circuit 160 is connected to a gate-bias power supply terminal VG, and the second terminal of the fourth capacitor C4 is connected to the gate-bias power supply terminal VG.

The source matching circuit 140 includes:

a seventh inductive unit L7, wherein a first end of the seventh inductive unit L7 is connected to the source of the fet 110;

a seventh capacitor C7, wherein a first end of the seventh capacitor C7 is connected to the second end of the seventh inductive unit L7, the first end of the seventh capacitor C7 is further connected to a source bias power source terminal VS, and a second end of the seventh capacitor C7 is grounded;

the seventh inductive unit L7 is one of an inductor, a microstrip, or a combination of an inductor and a microstrip.

The seventh inductive unit L7 may adjust the gate optimal gain matching impedance of the fet 110 and the gate optimal noise impedance of the fet 110 to be similar or identical, so as to optimize the noise performance and gain performance of the feedback amplifier.

In this embodiment, the resonant frequency of the seventh capacitor C7 is close to or the same as the center frequency of the working frequency band of the feedback amplifier, so as to achieve isolation of the feedback amplifier from the ac signal of the source bias power source terminal VS, and provide a radio frequency signal ground for the second end of the seventh inductor L7.

In the embodiment shown in fig. 5, a gate bias voltage VG is provided to the feedback amplifier through a gate bias power supply terminal VG, a drain bias voltage VD is provided to the feedback amplifier through a drain bias power supply terminal VD, a source bias voltage VS is provided to the feedback amplifier through a source bias power supply terminal VS, a voltage difference between VG and VS is adjusted to be a gate-source bias voltage of the field-effect transistor 110 in a normal operating state, a voltage difference between VD and VS is adjusted to be a drain-source bias voltage of the field-effect transistor 110 in a normal operating state, and the field-effect transistor 110 is in a normal operating state. The rf signal is input through the rf signal input terminal RFIN, passes through the gate matching circuit 130, drives the gate of the fet 110 in the feedback amplifier, is amplified by the fet 110, passes through the drain matching circuit 120, and is output through the rf signal output terminal RFOUT. In the embodiment shown in fig. 5, the feedback circuit 150 can make the input and output of the feedback amplifier more easily realize impedance matching, and at the same time, by adjusting the parameters of the feedback circuit 150, the feedback circuit 150 has a small high-frequency feedback amount and a large low-frequency feedback amount, so that the gain in the operating bandwidth of the feedback amplifier increases with the increase of the frequency. The positive slope of the gain of the feedback amplifier in the embodiment of the application can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is relatively flat.

In the embodiment of the present application, in the embodiment shown in fig. 5, the drain matching circuit 120 of the feedback amplifier includes a low coupling inductor pair 121, and the low coupling inductor pair 121 is an inductor pair with opposite directions of the induced magnetic field, so that energy loss in the drain matching circuit 120 can be reduced, the integration level of the feedback amplifier is improved, the circuit size is reduced, and the cost is reduced.

In the embodiment shown in fig. 2 to 5, the second terminal of the third capacitor C3 is both the first terminal of the gate matching circuit 130 and the fourth terminal of the gate matching circuit 130.

In the embodiment of the present application, there are other implementation manners of the gate matching circuit 130, as shown in fig. 6, the gate matching circuit 130 includes:

a third capacitor C3, wherein a first end of the third capacitor C3 is connected to the radio frequency signal input terminal RFIN;

a fourth inductive unit L4, a first end of the fourth inductive unit L4 being connected to a second end of the third capacitor C3;

an eighth inductive unit L8, a first end of the eighth inductive unit L8 being connected to the second end of the third capacitor C3;

a ninth inductive unit L9, a first end of the ninth inductive unit L9 is connected to the second end of the eighth inductive unit L8, the first end of the ninth inductive unit L9 is further connected to the first end of the feedback circuit 150, and a second end of the ninth inductive unit L9 is connected to the gate of the fet 110;

any one of the fourth inductive unit L4, the eighth inductive unit L8 and the ninth inductive unit L9 is one of an inductor, a microstrip or a combination of an inductor and a microstrip.

In the embodiment shown in fig. 6, the second terminal of the ninth inductive unit L9 is the first terminal of the gate matching circuit 130, and the first terminal of the ninth inductive unit L9 is the fourth terminal of the gate matching circuit 130.

In the embodiment of the present application, the eighth inductive unit L8 and the ninth inductive unit L9 are used as the gate pre-matching circuit of the fet 110, and can match the gate input impedance of the fet 110 to a suitable impedance.

In the embodiment shown in fig. 6 of the present application, the same or similar functions are provided for the same reference numerals as those in the embodiments shown in fig. 2 to fig. 5, and thus, the description thereof is omitted.

In the embodiment shown in fig. 6, the gate bias voltage VG is provided to the fet 110 through the gate bias power source terminal VG, and the drain bias voltage VD is provided to the fet 110 through the drain bias power source terminal VD, so as to maintain the normal operation of the fet 110. The rf signal is input through the rf signal input terminal RFIN, passes through the gate matching circuit 130, drives the gate of the fet 110, is amplified by the fet 110, passes through the drain matching circuit 120, and is output through the rf signal output terminal RFOUT. In the embodiment shown in fig. 6, the feedback circuit 150 can make the input and output of the feedback amplifier more easily realize impedance matching, and at the same time, by adjusting the parameters of the feedback circuit 150, the feedback circuit 150 has a small high-frequency feedback amount and a large low-frequency feedback amount, so that the gain in the operating bandwidth of the feedback amplifier increases with the increase of the frequency. The positive slope of the gain of the feedback amplifier in the embodiment of the application can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is relatively flat.

In the embodiment of the present application, in the embodiment shown in fig. 6, the drain matching circuit 120 of the feedback amplifier includes a low coupling inductor pair 121, and the low coupling inductor pair 121 is an inductor pair with opposite directions of the induced magnetic field, so that energy loss in the drain matching circuit 120 can be reduced, the integration level of the feedback amplifier is improved, the circuit size is reduced, and the cost is reduced.

In the embodiments shown in fig. 2 to fig. 5, the gate matching circuit 130 may adopt the structure of the gate matching circuit 130 in fig. 6, and details thereof are not repeated herein.

In the embodiment of the present application, any one of the third, fourth, fifth, sixth, seventh, eighth and ninth inductive units L3, L4, L5, L6, L7, L8 and L9 may be one of an inductor, a microstrip line or a combination of an inductor and a microstrip line. In the plurality of inductive units, part of the inductive units can be inductors, part of the inductive units can be microstrip lines, and part of the inductive units can be the combination of the inductors and the microstrip lines; or all of them are inductors, or all of them are microstrip lines, or all of them are a combination of inductors and microstrip lines, and are not described herein again. For ease of description, the inductive elements are shown in fig. 2 as inductors, or they may be in the form of microstrip lines, as shown in fig. 7. Fig. 3 to 6 are also shown in the form of inductors, and the corresponding way of showing the inductive units in the form of microstrip lines is not described here again. The inductive unit is represented in the form of a microstrip line or an inductor, so that the structure, the function and the beneficial effect of the circuit are not influenced, and the description is omitted.

In the embodiment of the present application, the power supply bias modes of the feedback amplifier include single power supply self-bias, dual power supply bias, and triple power supply bias, where the single power supply self-bias refers to that only the drain bias voltage VD is provided from the outside, as shown in fig. 4; the dual power bias means that a drain bias voltage VD and a gate bias power VG are supplied from the outside as shown in fig. 2, 3, 6 and 7; the three-source bias means that a gate bias voltage VD, a gate bias voltage VG, and a source bias voltage VS are supplied from the outside, as shown in fig. 5. The single power supply is simple in self-bias power supply, the double power supply can exert better power performance, the three power supply biases are beneficial to energy conservation, and a power supply bias mode can be configured according to practical application. The power supply bias mode of the embodiment of the present application may also be used in other circuits, and is not described herein again.

The embodiment of the application also provides a radio frequency chip, which comprises a substrate and the feedback amplifier on the substrate.

As shown in fig. 1, the feedback amplifier includes:

a field effect transistor 110;

a gate matching circuit 130, wherein a first terminal of the gate matching circuit 130 is connected to the gate of the fet 110, and a second terminal of the gate matching circuit 130 is connected to the radio frequency signal input terminal RFIN;

a gate bias circuit 160, wherein the gate bias circuit 160 is connected to the third terminal of the gate matching circuit 130.

a first inductor L1, a first end of the first inductor L1 being connected to the drain of the field effect transistor 110;

the first inductor L1 and the second inductor L2 have opposite induction magnetic field directions.

When the inductor is excited by a signal, an induction magnetic field can be generated, the induction magnetic field can generate an induction electric field, and the induction electric field can generate induction eddy current in the substrate of the chip, so that energy loss is generated; therefore, there are also induced magnetic fields on the inductor L1 and the inductor L2, and the induced currents generated by the induced magnetic fields generate induced eddy currents in the substrate of the chip, thereby generating energy loss.

In the embodiment of the application, the directions of the induction magnetic fields of the first inductor L1 and the second inductor L2 are opposite, so that the directions of the induction electric fields generated by the induction magnetic fields of the first inductor L1 and the induction electric fields generated by the induction magnetic fields of the second inductor L2 are also opposite, the directions of the induction eddy currents generated by the two opposite induction electric fields are opposite, the induction eddy currents with opposite directions can be partially offset, so that the induction eddy currents are reduced, the generated energy loss is reduced, and the energy loss of the chip matching network is reduced.

In the embodiment of the present application, in the drain matching circuit 120 of the amplifying circuit in the chip, the directions of the induced magnetic fields of the first inductor L1 and the second inductor L2 are opposite, so that the induced eddy current in the substrate can be partially cancelled, and the energy loss can be reduced. In addition, the physical distance between the first inductor L1 and the second inductor L2 can be closer, which can reduce the size of the chip and reduce the cost.

In the embodiment of the present application, the feedback amplifier included in the chip is as described in the above embodiments, and is not described herein again.

The detailed implementation, functions, and working processes of the source matching circuit 140 and the gate matching circuit 130 of the feedback amplifier in the chip of the embodiment of the present application refer to the above embodiments and fig. 2 to 7, which are not repeated herein.

Therefore, the radio frequency chip in the embodiment of the application has the advantages of low power consumption, small size and low cost.

As shown in fig. 8, the radio frequency chip 1500 may include a feedback amplifier 1501, where the feedback amplifier 1501 may be any of the embodiments of feedback amplifiers described above. One feedback amplifier 1501 may be used alone, or a plurality of feedback amplifiers 1501 may be used in combination. In an example, the radio frequency chip 1500 may include one or more feedback amplifiers 1501.

In embodiments of the feedback amplifier and the rf chip that employ low coupling inductance pairs, the layout of the low coupling inductance pairs greatly affects the size of the circuit dimensions. When the inductor is excited by a signal, an induction magnetic field can be generated, an induction electric field can be generated by the induction magnetic field, and the induction electric field can generate radiation, so that energy loss is generated. For example, the induced electric field may generate eddy currents in the circuit medium and electromagnetic radiation in space. If two inductors are placed close together, mutual coupling will occur between them, which aggravates this loss. The embodiment of the application at least partially reduces mutual coupling between the two inductors by configuring the two inductors of the low coupling inductor pair to generate the induced magnetic fields with opposite directions, so that the induced magnetic fields of the two inductors have opposite directions, and the induced magnetic fields are partially or completely offset, thereby reducing or eliminating energy loss caused by the induced electric fields, and further enabling the two inductors of the low coupling inductor pair to be arranged closer to each other, so as to further reduce the chip area occupied by the feedback amplifier.

For example, the first inductance L1 and the second inductance L2 of the low-coupling inductance pair 121 may be disposed to be adjacent to each other and such that the direction of the induced magnetic field generated by the first inductance L1 is opposite to the direction of the induced magnetic field generated by the second inductance L2.

In one example, the first inductor L1 and the second inductor L2 are both spiral inductors, which may be arranged in the feedback amplifier with opposite spiral directions. For example, one inductor spirals clockwise and the other counterclockwise.

In one example, the first inductance L1 and the second inductance L2 are arranged in the feedback amplifier as mirror images of each other.

Fig. 9 shows a schematic diagram of a low coupling inductance pair arrangement in a feedback amplifier according to an embodiment of the present application. Fig. 9 is a schematic diagram of a low-coupling inductance pair of the feedback amplifier viewed from above from a direction perpendicular to the wiring layer of the feedback amplifier. In one example, the feedback amplifier may be a radio frequency chip.

As shown in fig. 9, the low-coupling inductance pair 121 includes two inductances respectively composed of a first microstrip line 1214 and a second microstrip line 1215, wherein the first microstrip line 1214 is wound in a first spiral pattern S1, and the second microstrip line 1215 is wound in a second spiral pattern S2. The first end 1211 and the second end 1212 of the first microstrip line 1214 serve as a first end and a second end of the first inductor L1, respectively. The first end 1213 and the second end 1212 of the second microstrip line 1215 serve as the first end and the second end of the second inductance L2, respectively. The second end 1212 of the first microstrip line 1214 and the second end 1212 of the second microstrip line 1215 are connected together to form a common end 1212 of the first inductance L1 and the second inductance L2, and the first microstrip line 1214 and the second microstrip line 1215 form a merged microstrip line. The first end 1211 of the first inductor L1, the first end 1213 of the second inductor L2, and the second ends 1212 of the first inductor L1 and the second inductor L2 are respectively connected to the other parts of the feedback amplifier through connection lines.

The merged microstrip line (first microstrip line/second microstrip line) of the embodiment of the present application may be formed of a single layer or multiple layers of metal materials. In one example, the merged microstrip line is composed of multiple layers of metallic material, where each layer of metallic material is located in a different wiring layer of the feedback amplifier. And multiple layers of metal materials in different wiring layers are overlapped together to form a combined microstrip line, and the metal materials of the layers are connected through interlayer through holes. In another example, the merged microstrip line is composed of a single layer of metallic material, which may be located in the same or different wiring layers of the feedback amplifier. For example, a portion of a single layer of metallic material is located in one wiring level and other portions are located in a different one or more wiring levels. Similarly, the single-layer metal materials on different wiring layers are connected through the through holes.

In the example of fig. 9, both spiral patterns S1 and S2 comprise a plurality of turns, it being understood that they may also each comprise one turn, or one may comprise a plurality of turns and the other may comprise a plurality of turns.

As an example, the first microstrip line 1214 and the second microstrip line 1215 may be wound in opposite directions such that the spiral directions of the first spiral pattern S1 and the second spiral pattern S2 are opposite, so that the directions of the induced magnetic fields caused by the currents in the microstrip lines forming the two spiral patterns S1 and S2 are opposite when the low-coupling inductance pair 121 is in the operating state. For example, one of S1 and S2 is made to have a counterclockwise spiral direction and the other is made to have a clockwise spiral direction. Here, a direction from the first terminal of the first inductor L1 or the second inductor L2 to the common terminal may be referred to as a spiral direction, or a direction from the common terminal to the first terminal of the first inductor L1 or the second inductor L2 may be referred to as a spiral direction.

In the embodiment of fig. 9, the first microstrip line 1214 is wound in a first spiral pattern S1 in a counterclockwise direction from the first end 1211 to the common end 1212 in an inside-out manner (first inside turn then outside turn), and the second microstrip line 1215 is wound in a second spiral pattern S2 in a clockwise direction from the first end 1213 to the common end 1212 in an inside-out manner (first inside turn then outside turn). It will be appreciated that one may be wound in an inside-out manner, the other in an outside-in (outer turns followed by inner turns) manner, or both in an outside-in manner. It is understood that the microstrip line need not be wound in the inside-out or outside-in direction all the time when wound in the spiral pattern S1 or S2, but may be changed in direction one or more times. For example, first from inside to outside, halfway through to outside to inside, or vice versa.

In summary, each of the spiral patterns S1 and S2 may wind the microstrip line from the respective first end to the common end in one of the following ways:

from the inside to the outside;

from outside to inside;

a combination of the above two.

In the embodiment of fig. 9, the two spiral patterns S1 and S2 do not overlap and are adjacent but at a distance D in a direction parallel to the wiring layers of the feedback amplifier. In the embodiment of the present application, as described above, since mutual coupling between two inductances is low, the two spiral patterns S1 and S2 may be arranged as close as possible (but there is no overlapping portion between the two), thereby reducing the circuit size and the cost. In one example, the spacing between the two spiral patterns S1 and S2 (distance D as shown in fig. 9) may be a minimum of about 3 microns. The "pitch between two spiral patterns" described herein refers to a distance between microstrip lines of the two spiral patterns that are closest to each other. As shown in FIG. 9, distance D is the distance between adjacent outermost turns of S1 and S2. In practice, the minimum spacing between the two spiral patterns is determined by the chip manufacturing process.

In the example of fig. 9, the first microstrip line 1214 and the second microstrip line 1215 have the same length. That is, the common terminal 1212 is located at a midpoint of the merged microstrip line. It is understood that the common terminal 1212 may be located not at the midpoint of the merged microstrip line, but at other positions, such as a position closer to S1 or S2.

As shown in fig. 9, in this embodiment, the spiral patterns S1 and S2 are arranged in mirror images, and both are mirror images, which are shown in an axisymmetric arrangement in fig. 9. That is, the spiral patterns S1 and S2 have the same configuration, for example, the same number of turns, the microstrip line width, the pitch between adjacent turns, and the like, except that their patterns are opposite (winding manner is opposite), and are in a symmetrical/mirror relationship with respect to a plane perpendicular to the wiring layers, which is located in the middle of the two. S1 and S2 may not be arranged in a mirror image, for example, S1 and S2 have different configurations, for example, S1 and S2 have different turns, microstrip line width or spacing between adjacent turns, etc., as long as the induced magnetic fields of the wound spiral patterns S1 and S2 are opposite in direction.

It is understood that the arrangement of the first spiral pattern S1 and the second spiral pattern S2 in fig. 9 may be interchanged.

In the low-coupling inductance pair 121 according to the above-mentioned embodiment of the present application, the microstrip lines of the two inductances have a common end and are arranged in two spiral patterns with opposite spiral directions, and when an excitation signal is applied to the low-coupling inductance pair 121 in an operating state, the excitation signal is shunted to the two spirals (microstrip lines of the two inductances) at the common end, so that the directions of the induced magnetic fields generated by the currents in the two spirals are opposite, thereby at least partially reducing mutual coupling/inductance between the two inductances.

In the above-described inductance pair embodiment, as shown in fig. 9, the inductance pair is arranged in the integrated circuit chip to have three terminals: common terminal 1212, a head end 1211, which is the first branch end of the inductor pair, and a tail end 1213, which is the second branch end of the inductor pair. As previously described, the three terminals of the pair may be connected to a stimulus signal or other circuit portion by leads. For example, a radio frequency excitation signal may be accessed from the common terminal 1212 of the pair of inductors, and the radio frequency excitation signal is shunted to the first microstrip line (first inductor) and the second microstrip line (second inductor) at the common terminal 1212. The radio frequency excitation signal is typically a periodically varying signal, for example a sinusoidal signal. Let the excitation signal accessed at the common port 1212 be i _com ＝I _com Sin ω t. The excitation signal is split into two branches at the common terminal 1212, one of which passes through the common terminal 1212 to the first spiral pattern S1 at the first branch end (head end) 1211, and the other passes through the common terminal 1212 to the second spiral pattern S2 at the second branch end (tail end) 1213. Let the excitation signal in the first spiral pattern S1 be i ₁ (t) the excitation signal in the first spiral pattern S1 is i ₂ (t), assuming no signal is reflected, i ₁ (t)+i ₂ (t)＝I _com Sin ω t. If the common terminal is located at the midpoint of the combined microstrip line and S1 and S2 are axisymmetric patterns, the excitation signals in S1 and S2 are identical at any time, i.e., the excitation signals are identical

Excitation signal i in an inductive pair ₁ (t) and i ₂ (t) is a periodically-changing signal, the current magnitude of which periodically changes unevenly, so that the induced magnetic field generated also periodically changes unevenly; the changing magnetic field in turn generates an electric field, thereby generating an electromagnetic wave. When the excitation signals in S1 and S2 are identical, since the spiral directions of S1 and S2 are opposite, the magnitude of the induced magnetic field generated in S1 and the induced magnetic field generated in S2 are identical and the magnetic field direction is opposite at any time, and the directions of the induced electric fields are opposite and the directions are changed periodically. Therefore, the induced magnetic fields generated by S1 and S2 will almost completely cancel in many areasSome regions will cancel partially, and therefore the corresponding electric field or electromagnetic wave due to the induced magnetic field will also cancel, thereby reducing the loss of the inductive pair.

If the common end is not located at the middle point of the combined microstrip line, or S1 and S2 are patterns with different configurations, it may not be guaranteed that excitation signals in S1 and S2 are completely the same, so that the degree of mutual cancellation of the induced magnetic fields of S1 and S2 is reduced compared with the case that the excitation signals in S1 and S2 are completely the same, but the induced magnetic fields generated by S1 and S2 at any time still partially cancel each other, and the electromagnetic radiation intensity is weakened mutually, so that the loss of the inductance pair is reduced to some extent.

It should be noted that, theoretically, an inductor pair having three ports (a common terminal, a leading end of the merged microstrip line as a first branch terminal, and a trailing end of the merged microstrip line as a second branch terminal) as described above is a passive lossless network, and since the passive network has reciprocity, the loss of the inductor pair and its transmission characteristic are reciprocal regardless of which of the three ports an excitation signal is input.

The low coupling inductance pair 121 formed by the first inductance L1 and the second inductance L2 in the feedback amplifier may adopt the low coupling inductance pair arrangement as described above. The above description of the low-coupling inductance pairs applies to all low-coupling inductance pairs referred to herein, and for the sake of brevity, are not repeated herein elsewhere.

In the above-described embodiments of the feedback amplifier, the above-described low-coupling inductor pair is used, which makes the feedback amplifier of the present application have the following advantages:

in the above-described embodiments of the amplifier, the above-described pair of low coupling inductors is used, which provides the following advantages for the amplifier of the present application: by configuring the two inductors constituting the inductor pair such that their respective induced magnetic fields are opposite in direction, the inductor pair is a low-coupling inductor pair, and the loss of the amplifier input matching circuit can be reduced. In addition, the coupling between the two inductors forming the low-coupling inductor pair and the radiation ranges of the induction electric field and the induction magnetic field of the inductors can be reduced in this way, so that the inductors and other components are arranged closer to each other, and the circuit size is further reduced.

The embodiment of the application also provides an electronic device, the electronic device comprises the radio frequency chip, and the radio frequency chip comprising the feedback amplifier embodiment of the application can be used in the electronic device.

As shown in fig. 10, the electronic device 1600 includes the rf chip 1500 shown in fig. 8. The electronic device 1600 may be a wireless device or any other electronic device that may use a feedback amplifier.

A wireless device may be a User Equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a base station, etc. The wireless device may also be a cellular phone, a smart phone, a tablet, a wireless modem, a Personal Digital Assistant (PDA), a handheld device, a laptop, a smartbook, a netbook, a cordless phone, a Wireless Local Loop (WLL) station, a bluetooth device, etc. The wireless device may be capable of communicating with a wireless communication system, and may also be capable of receiving signals from a broadcast station, signals from one or more satellites, and the like. The wireless device may support one or more wireless communication technologies (e.g., 5G, LTE, CDMA2000, WCDMA, TD-SCDMA, GSM, 802.11, millimeter wave, etc.).

The embodiment of the application provides a feedback amplifier, a radio frequency chip and an electronic device, wherein the feedback amplifier comprises: a field effect transistor; the first end of the drain electrode matching circuit is connected with the drain electrode of the field effect tube, and the second end of the drain electrode matching circuit is connected with the radio frequency signal output end; the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end; the first end of the source electrode matching circuit is connected with the source electrode of the field effect transistor; a first end of the feedback circuit is connected with a fourth end of the grid electrode matching circuit, and a second end of the feedback circuit is connected with a third end of the drain electrode matching circuit; the drain electrode matching circuit comprises a low coupling inductance pair, and the low coupling inductance pair is an inductance pair with opposite induction magnetic field directions. In the embodiment of the application, the low coupling inductance pair is an inductance with opposite directions of the induction magnetic fields, the directions of the induction electric fields generated by the pair of inductances with opposite directions of the induction magnetic fields are also opposite, and the induction electric fields with opposite directions can be partially offset, so that the radiation generated by the induction electric fields is reduced, and the energy loss of the circuit is reduced. In addition, the physical distance of the inductors in the low-coupling inductor pair can be closer because the induced electric fields are partially offset, so that the size of the circuit can be reduced, and the cost is reduced. In addition, the feedback circuit can enable the input and the output of the feedback amplifier to realize impedance matching more easily, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit are small and large by adjusting the parameters of the feedback circuit, so that the gain in the working bandwidth of the feedback amplifier is increased along with the increase of the frequency. The positive slope of the gain of the feedback amplifier in the embodiment of the application can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is relatively flat.

The feedback amplifiers in the embodiments of the present application may be used independently, or may be used in a cascade of multiple stages, or may be applied to an integrated system, or may be applied to a multifunctional chip. The radio frequency chip of the embodiment of the present application may also include an independently used feedback amplifier, or may include a plurality of feedback amplifiers used in cascade, or may include a plurality of independently used feedback amplifiers.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to requirements, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to corresponding processes in the context, and are not described herein again.

In the embodiments described above, the description of each embodiment has its own emphasis, and reference may be made to the related description in other embodiments for parts that are not described or recited in any embodiment.

The units or modules described as separate parts may or may not be physically separate, and parts displayed as units or modules may or may not be physical units, may be located in one position, or may be distributed on multiple functional units. Some or all of the units or modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.

In addition, each functional unit or module in each embodiment of the present application may be integrated into one chip unit, or each unit or module may exist alone physically, or two or more units or modules are integrated into one unit.

It is noted that, in this document, relational terms such as "first" and "second," and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.

The previous description is only an example of the present application, and is provided to enable any person skilled in the art to understand or implement the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A feedback amplifier, characterized in that the feedback amplifier comprises:

the field effect transistor comprises a drain electrode, a grid electrode and a source electrode, and is used for signal amplification;

2. The feedback amplifier of claim 1, wherein the low-coupling inductor pair comprises:

3. The feedback amplifier of claim 2, wherein the drain matching circuit further comprises:

4. The feedback amplifier of claim 2, wherein the feedback circuit comprises:

a second resistor, a first end of the second resistor being connected to a second end of the third inductive unit;

the third inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

5. The feedback amplifier of claim 2, wherein the gate matching circuit comprises:

a first end of the third capacitor is connected with the radio frequency signal input end, a second end of the third capacitor is used as a fourth end of the grid matching circuit and is connected with the first end of the feedback circuit, and the second end of the third capacitor is also connected with the grid of the field effect transistor;

6. The feedback amplifier of claim 2, wherein the gate matching circuit comprises:

a ninth inductive unit, a first end of the ninth inductive unit is connected to a second end of the eighth inductive unit, the first end of the ninth inductive unit serving as a fourth end of the gate matching circuit is further connected to the first end of the feedback circuit, and the second end of the ninth inductive unit is connected to the gate of the fet;

7. The feedback amplifier of claim 5 or 6, further comprising a gate bias circuit, wherein the gate bias circuit is connected to the third terminal of the gate matching circuit.

8. The feedback amplifier of claim 7, wherein the gate bias circuit further comprises:

a fourth capacitor, a first end of the fourth capacitor is grounded, a second end of the fourth capacitor is connected to a gate bias power supply terminal, and a second end of the fourth capacitor is further connected to a second end of the fourth inductive unit.

9. The feedback amplifier of claim 8, wherein the source matching circuit comprises:

the fifth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

10. The feedback amplifier of claim 8 wherein said source matching circuit is ground.

11. The feedback amplifier of claim 7, wherein the gate bias circuit is ground.

12. The feedback amplifier of claim 11, wherein the source matching circuit comprises:

a sixth inductive unit, a first end of which is connected with the source electrode of the field effect transistor;

a first end of the first resistor is connected to the second end of the sixth inductive unit, and a second end of the first resistor is grounded;

13. The feedback amplifier of claim 8, wherein the source matching circuit comprises:

14. The feedback amplifier of claim 2, wherein the first and second inductors are both spiral inductors and are arranged in the feedback amplifier with opposite spiral directions.

15. The feedback amplifier of claim 2, wherein the first and second inductors are arranged in the feedback amplifier as mirror images of each other.

16. The feedback amplifier of claim 2, wherein the first inductor is formed of a first microstrip line wound in a first spiral pattern, the second inductor is formed of a second microstrip line wound in a second spiral pattern, wherein a first end and a second end of the first microstrip line are respectively used as a first end and a second end of the first inductor, a first end and a second end of the second microstrip line are respectively used as a first end and a second end of the second inductor, and the second end of the first microstrip line and the second end of the second microstrip line are connected together such that the first microstrip line and the second microstrip line form a merged microstrip line.

17. The feedback amplifier of claim 16, wherein the first and second spiral patterns do not overlap and are adjacent to but at a distance from each other in a direction parallel to a routing layer of the feedback amplifier.

18. The feedback amplifier of claim 16, wherein the merged microstrip is comprised of multiple layers of metallic material, wherein each layer of metallic material is located in a different wiring level of the feedback amplifier.

19. The feedback amplifier of claim 16, wherein the merged microstrip is comprised of a single layer of metallic material, wherein the single layer of metallic material is located in the same or different wiring layers of the feedback amplifier.

20. A radio frequency chip, characterized in that the radio frequency chip comprises a substrate, and a feedback amplifier according to any one of claims 1 to 19 on the substrate.

21. An electronic device comprising the radio-frequency chip of claim 20.