CN116938148A

CN116938148A - Feedback amplifier, radio frequency chip and electronic device

Info

Publication number: CN116938148A
Application number: CN202210348743.2A
Authority: CN
Inventors: 刘石生; 黄伟
Original assignee: Shenzhen Jingzhun Communication Technology Co ltd
Current assignee: Shenzhen Jingzhun Communication Technology Co ltd
Priority date: 2022-04-01
Filing date: 2022-04-01
Publication date: 2023-10-24

Abstract

The embodiment of the application discloses a feedback amplifier, a radio frequency chip and an electronic device, wherein the feedback amplifier comprises: a field effect transistor; the first end of the drain electrode matching circuit is connected with the drain electrode of the field effect transistor, and the second end of the drain electrode matching circuit is connected with the radio frequency signal output end; the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end; the first end of the source matching circuit is connected with the source electrode of the field effect transistor; the first end of the feedback circuit is connected with the fourth end of the grid matching circuit, and the second end of the feedback circuit is connected with the third end of the drain matching circuit; the drain matching circuit comprises a low-coupling inductance pair, wherein the low-coupling inductance pair is an inductance pair with opposite induction magnetic field directions. The feedback amplifier of the application can make gain flatter, reduce energy loss of the feedback amplifier, reduce the size of the feedback amplifier and reduce cost.

Description

Feedback amplifier, radio frequency chip and electronic device

Technical Field

The application relates to the technical field of electronics, in particular to a feedback amplifier, a radio frequency chip and an electronic device.

Background

With the development of communication technology, particularly the emergence of 5G technology, high-frequency wireless communication technology is an important development direction of wireless communication.

The radio frequency transceiver system for high frequency radio communication comprises a plurality of amplifiers, and the performance of the amplifiers can have important influence on the performance of the radio frequency transceiver system. Therefore, high frequency wireless communication technology puts higher demands on the performance of the amplifier, such as miniaturization, gain flatness, integration level, power consumption, etc.

The existing radio frequency or high frequency amplifier chip is mostly formed by elements such as transistors, concentrated parameter element inductances, concentrated parameter element capacitances, resistances, microstrip lines and the like. In the element, inductance, microstrip line, capacitance and the like can generate electromagnetic radiation and other induced magnetic fields or electric fields and the like due to signal excitation, and the physical fields can influence the arrangement and normal operation of other elements. In the design or manufacture of an amplifier, in order to solve the problem of electromagnetic compatibility between elements, an existing method is to implement electromagnetic compatibility by maintaining a large arrangement pitch of elements, which results in a large size of the amplifier, which is inconvenient for high density integration, and inconvenient for cost reduction. In addition, electromagnetic radiation, induced magnetic or electric fields can cause energy losses, sacrificing the performance of the amplifier. In order to realize popularization of high-frequency wireless communication technology, reducing the cost of components and improving the performance of the components are urgent problems to be solved.

Disclosure of Invention

In order to solve the above technical problems or at least partially solve the above technical problems, the present application provides a feedback amplifier, a radio frequency chip and an electronic device.

In a first aspect, the present application provides a feedback amplifier comprising:

the field effect tube comprises an enhancement type field effect tube and a depletion type field effect tube, wherein the field effect tube comprises a drain electrode, a grid electrode and a source electrode, and the field effect tube is used for amplifying signals;

the first end of the drain matching circuit is connected with the drain electrode of the field effect transistor, and the second end of the drain matching circuit is connected with the radio frequency signal output end;

the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end;

the first end of the source matching circuit is connected with the source electrode of the field effect transistor;

the first end of the feedback circuit is connected with the fourth end of the grid matching circuit, and the second end of the feedback circuit is connected with the third end of the drain matching circuit;

the drain matching circuit comprises a low-coupling inductance pair, wherein the low-coupling inductance pair is an inductance pair with opposite induction magnetic field directions.

In an embodiment of the present application, the low coupling inductance pair includes:

the first end of the first inductor is connected with the drain electrode of the field effect transistor;

the first end of the second inductor is connected with the drain bias power supply end, and the second end of the second inductor is connected with the second end of the first inductor;

the induction magnetic fields of the first inductor and the second inductor are opposite in direction.

In an embodiment of the present application, the drain matching circuit further includes:

the first end of the first capacitor is connected with the second end of the first inductor, and the second end of the first capacitor is connected with the radio frequency signal output end;

and the first end of the second capacitor is connected with the first end of the second inductor, and the second end of the second capacitor is grounded.

In an embodiment of the present application, the feedback circuit includes:

the first end of the third inductive unit is connected with the fourth end of the grid matching circuit;

the first end of the second resistor is connected with the second end of the third inductive unit;

a fifth capacitor, wherein a first end of the fifth capacitor is connected with a second end of the second resistor, and a second end of the fifth capacitor is connected with a second end of the first inductor;

The third inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In an embodiment of the present application, the gate matching circuit includes:

the second end of the third capacitor is used as a fourth end of the grid matching circuit to be connected with the first end of the feedback circuit, the second end of the third capacitor is also connected with the grid of the field effect transistor, and the second end of the third capacitor is also connected with the first end of the feedback circuit;

the first end of the fourth inductive unit is connected with the second end of the third capacitor, and the second end of the fourth inductive unit is a third end of the grid matching circuit;

the fourth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

the first end of the third capacitor is connected with the radio frequency signal input end;

An eighth inductive unit, wherein a first end of the eighth inductive unit is connected with a second end of the third capacitor;

a ninth inductive unit, wherein a first end of the ninth inductive unit is connected with a second end of the eighth inductive unit, the first end of the ninth inductive unit is used as a fourth end of the grid matching circuit and is also connected with the first end of the feedback circuit, and a second end of the ninth inductive unit is connected with the grid of the field effect transistor;

any one of the fourth inductive unit, the eighth inductive unit and the ninth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In an embodiment of the present application, the feedback amplifier further includes a gate bias circuit, where the gate bias circuit is connected to the third end of the gate matching circuit.

In an embodiment of the present application, the gate bias circuit further includes:

and the first end of the fourth capacitor is grounded, the second end of the fourth capacitor is connected with the grid bias power supply end, and the second end of the fourth capacitor is also connected with the second end of the fourth inductive unit.

In an embodiment of the present application, the source matching circuit includes:

The first end of the fifth inductive unit is connected with the source electrode of the field effect transistor, and the second end of the fifth inductive unit is grounded;

the fifth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In the embodiment of the application, the source matching circuit is ground.

In the embodiment of the application, the grid bias circuit is ground.

the first end of the sixth inductive unit is connected with the source electrode of the field effect transistor;

a first end of the sixth capacitor is connected with the second end of the sixth inductive unit, and a second end of the sixth capacitor is grounded;

a first resistor, wherein a first end of the first resistor is connected with a second end of the seventh inductive unit, and a second end of the first resistor is grounded;

the sixth inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

the first end of the seventh inductive unit is connected with the source electrode of the field effect transistor;

a seventh capacitor, wherein a first end of the seventh capacitor is connected with a second end of the seventh inductive unit, the first end of the seventh capacitor is also connected with a source bias power supply end, and a second end of the seventh capacitor is grounded;

The seventh inductive unit is one of an inductor, a microstrip line or a combination of the inductor and the microstrip line.

In an embodiment of the application, the first inductance and the second inductance are both spiral inductances and are arranged in opposite spiral directions in the feedback amplifier.

In an embodiment of the application, the first inductance and the second inductance are arranged as mirror images of each other in the feedback amplifier.

In the embodiment of the application, the first inductor is formed by a first microstrip line, the first microstrip line is wound into a first spiral pattern, the second inductor is formed by a second microstrip line, the second microstrip line is wound into a second spiral pattern, the first end and the second end of the first microstrip line are respectively used as the first end and the second end of the first inductor, the first end and the second end of the second microstrip line are respectively used as the first end and the second end of the second inductor, and the second end of the first microstrip line and the second end of the second microstrip line are connected together so that the first microstrip line and the second microstrip line form a combined microstrip line.

In an embodiment of the application, the first and second spiral patterns do not overlap and are adjacent but at a distance in a direction parallel to the wiring layer of the feedback amplifier.

In an embodiment of the present application, the combined microstrip line is formed of multiple layers of metal materials, where each layer of metal material is located in a different wiring layer of the feedback amplifier.

In an embodiment of the present application, the combined microstrip line is formed of a single layer of metal material, wherein the single layer of metal material is located in the same or different wiring layers of the feedback amplifier.

In a second aspect, a radio frequency chip is provided, the radio frequency chip comprising a substrate, and the feedback amplifier described above on the substrate.

In a third aspect, an electronic device is provided, comprising a radio frequency chip as described above.

The embodiment of the application discloses a feedback amplifier, which comprises: the field effect transistor comprises a drain electrode, a grid electrode and a source electrode, and is used for signal amplification; the first end of the drain matching circuit is connected with the drain electrode of the field effect transistor, and the second end of the drain matching circuit is connected with the radio frequency signal output end; the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end; the first end of the source matching circuit is connected with the source electrode of the field effect transistor; the first end of the feedback circuit is connected with the fourth end of the grid matching circuit, and the second end of the feedback circuit is connected with the third end of the drain matching circuit; the drain matching circuit comprises a low-coupling inductance pair, wherein the low-coupling inductance pair is an inductance pair with opposite induction magnetic field directions. In the embodiment of the application, the low-coupling inductance pair is an inductance pair with opposite induction magnetic field directions, the induction electric fields generated by a pair of inductances with opposite induction magnetic fields are opposite in directions, and the induction electric fields with opposite directions can be partially counteracted, so that the radiation generated by the induction electric fields is reduced, and the energy loss of the circuit is reduced. In addition, the physical distance of the inductors in the low-coupling inductor pair can be closer due to the partial cancellation of the induced electric field, so that the size of the circuit can be reduced, and the cost can be reduced. The feedback circuit can enable the input and output of the feedback amplifier to be more easily matched with the impedance, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit can be small by adjusting the parameters of the feedback circuit, so that the gain in the working bandwidth of the feedback amplifier is increased along with the increase of the frequency.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.

In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort.

FIGS. 1 to 7 are schematic circuit diagrams of a feedback amplifier according to an embodiment of the present application;

FIG. 8 is a schematic diagram of a radio frequency chip in an embodiment of the application;

FIG. 9 is a schematic diagram of the placement of low coupling inductance pairs in a feedback amplifier in an embodiment of the application;

fig. 10 is a schematic diagram of an electronic device according to an embodiment of the application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

The feedback amplifier provided by the embodiment of the application can be applied as an independent component or can be applied to radio frequency chips or system integration.

As shown in fig. 1, an embodiment of the present application provides a feedback amplifier, including:

a field effect transistor 110, wherein the field effect transistor 110 comprises a drain electrode, a gate electrode and a source electrode, and the field effect transistor 110 is used for signal amplification;

the first end of the drain matching circuit 120 is connected with the drain of the field effect transistor 110, and the second end of the drain matching circuit 120 is connected with the radio frequency signal output end RFOUT;

the first end of the gate matching circuit 130 is connected with the gate of the field effect transistor 110, and the second end of the gate matching circuit 130 is connected with the radio frequency signal input end RFIN;

a source matching circuit 140, wherein a first end of the source matching circuit 140 is connected with a source of the field effect transistor 110;

a feedback circuit 150, wherein a first end of the feedback circuit 150 is connected to the fourth end of the gate matching circuit 130, and a second end of the feedback circuit 150 is connected to the third end of the drain matching circuit 120;

the drain matching circuit 120 includes a low-coupling inductance pair 121, where the low-coupling inductance pair 121 is an inductance pair with opposite induced magnetic field directions.

In the field effect transistor 110 of the embodiment of the present application, the three poles are a Source (S pole), a Gate (G pole) and a Drain (Drain, D pole) respectively, which are used for amplifying the radio frequency signal, and are not described herein.

In the embodiment of the present application, the drain matching circuit 120 is configured to match the drain output impedance of the field effect transistor 110 to a first target impedance, where the first target impedance is the output impedance of the rf signal output terminal RFOUT of the feedback amplifier.

In the embodiment of the present application, the gate matching circuit 130 is configured to match the gate input impedance of the fet 110 to a second target impedance, where the second target impedance is the input impedance of the rf signal input terminal RFIN of the feedback amplifier.

In the embodiment of the present application, the source matching circuit 140 is configured to adjust the gate optimal gain matching impedance of the fet 110 and the gate optimal noise impedance of the fet 110 to be similar or identical, so as to optimize the noise performance and gain performance of the feedback amplifier.

In the embodiment of the application, the feedback circuit 150 is used for realizing impedance matching of the input and output of the feedback amplifier, and simultaneously, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit 150 can be small and the gain in the working bandwidth of the feedback amplifier can be increased along with the increase of the frequency by adjusting the parameters of the feedback circuit 150.

In an embodiment of the present application, as shown in fig. 2, the low-coupling inductance pair 121 includes:

a first inductor L1, wherein a first end of the first inductor L1 is connected with a drain electrode of the field effect transistor 110;

the first end of the second inductor L2 is connected with the drain bias power supply end VD, and the second end of the second inductor L2 is connected with the second end of the first inductor L1;

the directions of the induced magnetic fields of the first inductor L1 and the second inductor L2 are opposite.

In the embodiment of the present application, the first inductor L1 and the second inductor L2 may be planar spiral inductors, and the spiral direction of the first inductor L1 is opposite to the spiral direction of the second inductor L2.

In other embodiments of the present application, the first inductor L1 and the second inductor L2 may be other structures and physical layouts capable of achieving the opposite direction of the induced magnetic field, which are not described herein.

When the inductor is excited by a signal, an induced magnetic field is generated, an induced electric field is generated by the induced magnetic field, and radiation is generated by the induced electric field, so that energy loss is generated; therefore, the inductor L1 and the inductor L2 also have an induced magnetic field, and an induced electric field generated by the induced magnetic field generates energy loss.

In the embodiment of the application, the directions of the induction magnetic fields of the first inductor L1 and the second inductor L2 are opposite, so that the directions of the induction electric field generated by the induction magnetic field of the first inductor L1 and the induction electric field generated by the induction magnetic field of the second inductor L2 are opposite, and the two opposite induction electric fields can be partially offset, so that the radiation generated by the induction electric fields is reduced, and the energy loss is reduced.

Since the induced electric field between the first inductor L1 and the second inductor L2 is partially cancelled, the physical distance between the first inductor L1 and the second inductor L2 can be closer, so that the size of the circuit can be reduced, and the cost can be reduced.

In the embodiment of the present application, the drain matching circuit 120 includes the low-coupling inductance pair 121, where the low-coupling inductance pair 121 is a pair of inductances L1 and L2 with opposite directions of the induced magnetic field, so that mutual coupling can be reduced, and energy loss can be reduced. In addition, the physical distance between the first inductor L1 and the second inductor L2 can be closer, so that the size of the circuit can be reduced, and the cost can be reduced.

In an embodiment of the present application, as shown in fig. 2, the drain matching circuit 120 further includes:

the first end of the first capacitor C1 is connected with the second end of the first inductor L1, and the second end of the first capacitor C1 is connected with the radio frequency signal output end FROUT;

and the first end of the second capacitor C2 is connected with the first end of the second inductor L2, and the second end of the second capacitor C2 is grounded.

In the embodiment of the present application, the first capacitor C1, the second capacitor C2 and the low coupling inductance pair 121 form a matching network for matching the drain output impedance of the fet 110 to the first target impedance.

In the embodiment of the present application, the frequency of the resonance point of the second capacitor C2 is close to or the same as the center frequency of the working frequency band of the feedback amplifier, so as to isolate the ac signal between the feedback amplifier and the drain bias power supply terminal VD, and simultaneously provide the rf signal ground for the first terminal of the second inductor L2 in the drain matching circuit 120.

As shown in fig. 2, in the embodiment of the present application, the feedback circuit 150 includes:

a third inductive unit L3, wherein a first end of the third inductive unit L3 is connected to a fourth end of the gate matching circuit 130;

a second resistor R2, where a first end of the second resistor R2 is connected to a second end of the third inductive unit L3;

a fifth capacitor C5, where a first end of the fifth capacitor C5 is connected to the second end of the second resistor R2, and a second end of the fifth capacitor C5 is connected to the second end of the first inductor L1;

the third inductive unit L3 is one of an inductance, a microstrip line, or a combination of the inductance and the microstrip line.

In the embodiment of the present application, the third inductive unit L3 in the feedback circuit 150 has a low-pass characteristic, so that the feedback circuit 150 has a relatively large low-frequency feedback amount and a relatively small high-frequency feedback amount in the feedback amplifier, and thus the feedback circuit can be used to make the high-frequency feedback amplitude and the low-frequency feedback amplitude in the output signal of the feedback amplifier different, thereby achieving the purpose of simultaneously adjusting the high-frequency gain and the low-frequency gain.

The second resistor R2 in the feedback circuit 150 has a signal blocking characteristic, and when the resistance value of the second resistor R2 is smaller, the feedback amount is larger; when the resistance value of the second resistor R2 is large, the feedback amount is small. Therefore, the purpose of adjusting the overall gain of the feedback amplifier can be achieved by adjusting the resistance value of the second resistor R2.

As shown in fig. 2, in the embodiment of the present application, the gate matching circuit 130 includes:

a third capacitor C3, where a first end of the third capacitor C3 is connected to the radio frequency signal input terminal RFIN, a second end of the third capacitor C3 is connected to the first end of the feedback circuit 150, and a second end of the third capacitor C3 is further connected to the gate of the field effect transistor 110;

a fourth inductive unit L4, wherein a first end of the fourth inductive unit L4 is connected to a second end of the third capacitor C3, and a second end of the fourth inductive unit L4 is a third end of the gate matching circuit 130;

the fourth inductive unit L4 is one of an inductance, a microstrip line, or a combination of the inductance and the microstrip line.

In an embodiment of the present application, the feedback amplifier further includes a gate bias circuit 160, where the gate bias circuit 160 is connected to the third terminal of the gate matching circuit 130.

The gate bias circuit 160 further includes:

and the first end of the fourth capacitor C4 is grounded, the second end of the fourth capacitor C4 is connected with the grid bias power supply end VG, and the second end of the fourth capacitor C4 is also connected with the second end of the fourth inductive unit L4.

In the embodiment of the application, the resonance point frequency of the fourth capacitor C4 is close to or the same as the center frequency of the working frequency band of the feedback amplifier, so as to isolate the feedback amplifier from the ac signal of the gate bias power supply terminal VG, and simultaneously provide the second terminal of the fourth inductor L4 with the rf signal ground.

In an embodiment of the present application, as shown in fig. 2, the source matching circuit 140 includes:

a fifth inductive unit L5, wherein a first end of the fifth inductive unit L5 is connected to the source of the field effect transistor 110, and a second end of the fifth inductive unit L5 is grounded;

the fifth inductive unit L5 is one of an inductance, a microstrip line, or a combination of the inductance and the microstrip line.

The fifth inductive unit L5 may adjust the gate optimum gain matching impedance of the fet 110 and the gate optimum noise impedance of the fet 110 to be similar or identical, so as to achieve the optimization of the noise performance and gain performance of the feedback amplifier.

As shown in fig. 3, in the embodiment of the present application, the source matching circuit 140 is ground.

In a specific application scenario of the embodiment of the present application, in the source matching circuit 140, the source matching circuit 140 is ground, i.e. the source of the fet 110 may be directly grounded.

In the embodiments of the present application shown in fig. 2 and 3, the gate bias voltage VG is provided to the field effect transistor 110 through the gate bias power terminal VG, and the drain bias voltage VD is provided to the field effect transistor 110 through the drain bias power terminal VD. The radio frequency signal is input through the radio frequency signal input end RFIN, passes through the grid matching circuit 130, drives the grid of the field effect tube 110, and is output through the drain matching circuit 120 and the radio frequency signal output end RFOUT after being amplified by the field effect tube 110. In the embodiments shown in fig. 2 and 3, the feedback circuit 150 can make the input and output of the feedback amplifier easier to realize impedance matching, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit 150 can be made small and the gain in the working bandwidth of the feedback amplifier can be increased along with the increase of the frequency by adjusting the parameters of the feedback circuit 150. The positive slope of the gain of the feedback amplifier can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is flatter.

In the embodiment of the present application, in the embodiments shown in fig. 2 and fig. 3, the drain matching circuit 120 of the feedback amplifier includes the low-coupling inductance pair 121, where the low-coupling inductance pair 121 is an inductance pair with opposite induced magnetic fields, so that energy loss in the drain matching circuit 120 can be reduced, the integration level of the feedback amplifier is improved, the circuit volume is reduced, and the cost is reduced.

In the embodiments of the present application shown in fig. 2 and 3, the gate bias voltage VG needs to be provided, and in the embodiment of the present application shown in fig. 4, a single power self-bias feedback amplifier may be provided, so that the gate bias voltage VG does not need to be provided.

As shown in fig. 4, in the embodiment of the present application, the gate bias circuit 160 is ground, that is, the second ground of the fourth inductor L4.

As shown in fig. 4, in the embodiment of the present application, the source matching circuit 140 includes:

the source matching circuit 140 includes:

a sixth inductive unit L6, wherein a first end of the sixth inductive unit L6 is connected to the source of the fet 110;

a sixth capacitor C6, wherein a first end of the sixth capacitor C6 is connected to a second end of the sixth inductive unit L6, and a second end of the sixth capacitor C6 is grounded;

a first resistor R1, wherein a first end of the first resistor R1 is connected to a second end of the sixth inductive unit L6, and a second end of the first resistor R1 is grounded;

The sixth inductive unit L6 is one of an inductance, a microstrip line, or a combination of the inductance and the microstrip line.

In the embodiment of the present application, the sixth inductive unit L6 may adjust the gate optimal gain matching impedance of the fet 110 and the gate optimal noise impedance of the fet 110 to be similar or identical, so as to achieve the optimization of the noise performance and gain performance of the feedback amplifier.

In the embodiment of the present application, the sixth capacitor C6 is configured to couple the rf signal output by the source of the fet 110 and passing through the sixth inductive unit L6 to ground, so as to reduce the energy loss of the source matching circuit 140.

In the embodiment of the present application, the first resistor R1 is used to raise the source potential of the fet 110, so that the voltage from the gate to the source of the fet 110 is negative, and the normal operation of the feedback amplifier is maintained.

In the embodiment shown in fig. 4, the drain bias voltage VD is provided to the fet 110 through the drain bias power terminal VD, and at this time, the drain-source current of the fet 110 flows through the resistor R1 in the source matching circuit 140, so as to increase the source potential of the fet 110, and make the gate-source voltage of the fet 110 negative, so as to maintain the normal operation of the fet 110. The radio frequency signal is input through the radio frequency signal input end RFIN, passes through the grid matching circuit 130, drives the grid of the field effect tube 110, and is output through the drain matching circuit 120 and the radio frequency signal output end RFOUT after being amplified by the field effect tube 110. In the embodiment shown in fig. 4, the feedback circuit 150 can make the input and output of the feedback amplifier easier to realize impedance matching, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit 150 can be made small and the gain in the working bandwidth of the feedback amplifier can be increased along with the increase of the frequency by adjusting the parameters of the feedback circuit 150. The positive slope of the gain of the feedback amplifier can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is flatter.

In the embodiment of the present application, in the embodiment shown in fig. 4, the drain matching circuit 120 of the feedback amplifier includes the low-coupling inductance pair 121, where the low-coupling inductance pair 121 is an inductance pair with opposite induced magnetic field directions, so that energy loss in the drain matching circuit 120 can be reduced, the integration level of the feedback amplifier can be improved, the circuit volume can be reduced, and the cost can be reduced.

In the embodiment of the present application, as shown in fig. 5, the gate bias circuit 160 is connected to the gate bias power supply terminal VG, where the second terminal of the fourth capacitor C4 is connected to the gate bias power supply terminal VG.

The source matching circuit 140 includes:

a seventh inductive unit L7, wherein a first end of the seventh inductive unit L7 is connected to the source of the fet 110;

a seventh capacitor C7, where a first end of the seventh capacitor C7 is connected to the second end of the seventh inductive unit L7, the first end of the seventh capacitor C7 is further connected to the source bias power supply end VS, and a second end of the seventh capacitor C7 is grounded;

the seventh inductive unit L7 is one of an inductance, a microstrip line, or a combination of an inductance and a microstrip line.

The seventh inductive unit L7 may adjust the gate optimum gain matching impedance of the fet 110 and the gate optimum noise impedance of the fet 110 to be similar or identical, so as to optimize the noise performance and gain performance of the feedback amplifier.

In the embodiment of the application, the resonance point frequency of the seventh capacitor C7 is close to or the same as the center frequency of the working frequency band of the feedback amplifier, so as to isolate the feedback amplifier from the ac signal of the source bias power supply end VS, and simultaneously provide a radio frequency signal ground for the second end of the seventh inductor L7.

In the embodiment shown in fig. 5 of the present application, a gate bias voltage VG is provided to the feedback amplifier through a gate bias power supply terminal VG, a drain bias voltage VD is provided to the feedback amplifier through a drain bias power supply terminal VD, a source bias voltage VS is provided to the feedback amplifier through a source bias power supply terminal VS, a voltage difference between VG and VS is adjusted to be a gate-source bias voltage in a normal operation state of the field effect transistor 110, and a voltage difference between VD and VS is adjusted to be a drain-source bias voltage in a normal operation state of the field effect transistor 110, so that the field effect transistor 110 is in a normal operation state. The radio frequency signal is input through the radio frequency signal input end RFIN, passes through the grid matching circuit 130, drives the grid of the field effect tube 110 in the feedback amplifier, and passes through the drain matching circuit 120 after being amplified by the field effect tube 110, and is output by the radio frequency signal output end RFOUT. In the embodiment shown in fig. 5, the feedback circuit 150 can make the input and output of the feedback amplifier easier to realize impedance matching, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit 150 can be made small and the gain in the working bandwidth of the feedback amplifier can be increased along with the increase of frequency by adjusting the parameters of the feedback circuit 150. The positive slope of the gain of the feedback amplifier can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is flatter.

In the embodiment of the present application, in the embodiment shown in fig. 5, the drain matching circuit 120 of the feedback amplifier includes the low-coupling inductance pair 121, where the low-coupling inductance pair 121 is an inductance pair with opposite induced magnetic field directions, so that energy loss in the drain matching circuit 120 can be reduced, the integration level of the feedback amplifier can be improved, the circuit volume can be reduced, and the cost can be reduced.

In the embodiment shown in fig. 2 to 5, the second terminal of the third capacitor C3 is both the first terminal of the gate matching circuit 130 and the fourth terminal of the gate matching circuit 130.

In an embodiment of the present application, the gate matching circuit 130 has other implementation manners, as shown in fig. 6, where the gate matching circuit 130 includes:

the first end of the third capacitor C3 is connected with the radio frequency signal input end RFIN;

a fourth inductive unit L4, wherein a first end of the fourth inductive unit L4 is connected to a second end of the third capacitor C3;

an eighth inductive unit L8, wherein a first end of the eighth inductive unit L8 is connected to a second end of the third capacitor C3;

a ninth inductive unit L9, wherein a first end of the ninth inductive unit L9 is connected to a second end of the eighth inductive unit L8, the first end of the ninth inductive unit L9 is further connected to the first end of the feedback circuit 150, and a second end of the ninth inductive unit L9 is connected to the gate of the field effect transistor 110;

Any one of the fourth inductive unit L4, the eighth inductive unit L8 and the ninth inductive unit L9 is one of an inductance, a microstrip line or a combination of the inductance and the microstrip line.

In the embodiment shown in fig. 6, the second terminal of the ninth inductive unit L9 is the first terminal of the gate matching circuit 130, and the first terminal of the ninth inductive unit L9 is the fourth terminal of the gate matching circuit 130.

In the embodiment of the present application, the eighth inductive unit L8 and the ninth inductive unit L9 are used as the gate pre-matching circuits of the field effect transistor 110, so that the gate input impedance of the field effect transistor 110 can be matched to a proper impedance.

In the embodiment of the present application shown in fig. 6, the elements having the same reference numerals as those of the embodiment shown in fig. 2 to 5 have the same or similar functions, and will not be described again.

In the embodiment of the present application shown in fig. 6, the gate bias voltage VG is provided to the fet 110 through the gate bias power terminal VG, and the drain bias voltage VD is provided to the fet 110 through the drain bias power terminal VD, so as to maintain the normal operation of the fet 110. The radio frequency signal is input through the radio frequency signal input end RFIN, passes through the grid matching circuit 130, drives the grid of the field effect tube 110, and is output through the drain matching circuit 120 and the radio frequency signal output end RFOUT after being amplified by the field effect tube 110. In the embodiment shown in fig. 6, the feedback circuit 150 can make the input and output of the feedback amplifier easier to realize impedance matching, and meanwhile, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit 150 can be made small and the gain in the working bandwidth of the feedback amplifier can be increased along with the increase of frequency by adjusting the parameters of the feedback circuit 150. The positive slope of the gain of the feedback amplifier can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is flatter.

In the embodiment of the present application, in the embodiment shown in fig. 6, the drain matching circuit 120 of the feedback amplifier includes the low-coupling inductance pair 121, where the low-coupling inductance pair 121 is an inductance pair with opposite induced magnetic field directions, so that energy loss in the drain matching circuit 120 can be reduced, the integration level of the feedback amplifier can be improved, the circuit volume can be reduced, and the cost can be reduced.

In the embodiments shown in fig. 2 to 5, the gate matching circuit 130 may adopt the structure of the gate matching circuit 130 in fig. 6, and will not be described herein.

In the embodiment of the present application, any one of the third inductive unit L3, the fourth inductive unit L4, the fifth inductive unit L5, the sixth inductive unit L6, the seventh inductive unit L7, the eighth inductive unit L8 and the ninth inductive unit L9 may be one of an inductance, a microstrip line or a combination of an inductance and a microstrip line. The plurality of inductive units can be a combination of inductance and microstrip line, wherein part of inductive units are inductances and part of inductive units are microstrip lines; or all the inductors, or all the microstrip lines, or all the combinations of the inductors and the microstrip lines, which are not described herein. For convenience of description, the inductive elements are shown in fig. 2 in the form of inductors, or may be shown in the form of microstrip lines, as shown in fig. 7. Fig. 3 to 6 are also shown in the form of inductors, and the corresponding manner of showing the inductive element in the form of microstrip lines will not be described here again. The inductive unit is represented by a microstrip line or an inductance form, so that the structure, the function and the beneficial effect of the circuit are not affected, and the details are not repeated here.

In the embodiment of the application, the power supply bias mode of the feedback amplifier comprises single power supply self-bias, double power supply bias and three power supply bias, wherein the single power supply self-bias refers to that only the drain bias voltage VD is provided by the outside, as shown in fig. 4; the dual power bias refers to the supply of the drain bias voltage VD and the gate bias power VG from the outside, as shown in fig. 2, 3, 6 and 7; the three-power bias refers to the supply of the pole bias voltage VD, the gate bias voltage VG, and the source bias voltage VS from the outside, as shown in fig. 5. The single power supply self-bias power supply is simple, the double power supply bias can exert better power performance, the three power supply bias is beneficial to energy conservation, and the power supply bias mode can be configured according to practical application. The power supply bias mode of the embodiment of the application can also be used in other circuits, and is not repeated here.

The embodiment of the application also provides a radio frequency chip, which comprises a substrate and the feedback amplifier on the substrate.

As shown in fig. 1, the feedback amplifier includes:

a field effect transistor 110;

the drain matching circuit 120, a first end of the drain matching circuit 120 is connected with the drain of the field effect transistor 110, and a second end of the drain matching circuit 120 is connected with the radio frequency signal output end RFOUT;

and a gate bias circuit 160, wherein the gate bias circuit 160 is connected to the third terminal of the gate matching circuit 130.

When the inductor is excited by a signal, an induced magnetic field is generated, an induced electric field is generated by the induced magnetic field, and an induced eddy current is generated in the substrate of the chip by the induced electric field, so that energy loss is generated; therefore, the inductances L1 and L2 also have induced magnetic fields, and induced currents generated by the induced magnetic fields generate induced eddy currents in the substrate of the chip, thereby generating energy losses.

In the embodiment of the application, the directions of the induction magnetic fields of the first inductor L1 and the second inductor L2 are opposite, so that the directions of the induction electric field generated by the induction magnetic field of the first inductor L1 and the induction electric field generated by the induction magnetic field of the second inductor L2 are also opposite, the directions of induction eddy currents respectively generated by the two opposite induction electric fields are opposite, the induction eddy currents with opposite directions can be partially counteracted, the induction eddy currents are reduced, the generated energy loss is reduced, and the energy loss of a chip matching network is reduced.

In the embodiment of the application, in the drain matching circuit 120 of the amplifying circuit in the chip, the directions of the induced magnetic fields of the first inductor L1 and the second inductor L2 are opposite, so that the induced eddy current in the substrate can be partially counteracted, and the energy loss is reduced. In addition, the physical distance between the first inductor L1 and the second inductor L2 can be closer, so that the size of the chip can be reduced, and the cost is reduced.

In the embodiment of the present application, the feedback amplifier included in the chip is described in the above embodiment, and is not described herein again.

Specific implementations, functions, workflow, etc. of the source matching circuit 140 and the gate matching circuit 130 of the feedback amplifier in the chip according to the embodiment of the present application are described with reference to the above embodiments and fig. 2 to 7, and are not repeated here.

Therefore, the radio frequency chip in the embodiment of the application has low power consumption, small volume and low cost.

As shown in fig. 8, the radio frequency chip 1500 may include a feedback amplifier 1501, wherein the feedback amplifier 1501 may be any embodiment of a feedback amplifier as described above. One feedback amplifier 1501 may be used alone, or a plurality of feedback amplifiers 1501 may be used in combination. In an example, the radio frequency chip 1500 may include one or more feedback amplifiers 1501.

In embodiments of the feedback amplifier and the radio frequency chip employing low coupling inductance pairs, the layout of the low coupling inductance pairs greatly affects the size of the circuit dimensions. When the inductor is excited by a signal, an induced magnetic field is generated, an induced electric field is generated by the induced magnetic field, and radiation is generated by the induced electric field, so that energy loss is generated. For example, an induced electric field may generate eddy currents in a circuit medium and electromagnetic radiation in space. This loss is exacerbated if two inductors are placed in close proximity, which can create mutual coupling between them. According to the embodiment of the application, the mutual coupling between the two inductors is at least partially reduced by configuring the two inductors of the low-coupling inductor pair to have opposite directions of the generated induced magnetic fields, so that the directions of the induced electric fields caused by the induced magnetic fields of the two inductors are also opposite, and the induced electric fields are partially or completely counteracted, thereby reducing or eliminating the energy loss caused by the induced electric fields, and further reducing the chip area occupied by the feedback amplifier by arranging the two inductors of the low-coupling inductor pair to be closer.

For example, the first inductor L1 and the second inductor L2 of the low-coupling inductor pair 121 may be disposed to be adjacent to each other such that the direction of the induced magnetic field generated by the first inductor L1 is opposite to the direction of the induced magnetic field generated by the second inductor L2.

In one example, the first inductance L1 and the second inductance L2 are both spiral inductances, which may be arranged in the feedback amplifier with opposite spiral directions. For example, the spiral direction of one inductor is clockwise and the other is counter-clockwise.

In one example, the first inductance L1 and the second inductance L2 are arranged as mirror images of each other in the feedback amplifier.

Fig. 9 shows a schematic diagram of the arrangement of low coupling inductance pairs in a feedback amplifier according to an embodiment of the application. Fig. 9 is a schematic diagram of a low coupling inductance pair of a feedback amplifier looking down from a direction perpendicular to the wiring layer of the feedback amplifier. In one example, the feedback amplifier may be a radio frequency chip.

As shown in fig. 9, the low-coupling inductance pair 121 includes two inductances, which are respectively composed of a first microstrip line 1214 and a second microstrip line 1215, and the first microstrip line 1214 is wound into a first spiral pattern S1 and the second microstrip line 1215 is wound into a second spiral pattern S2. The first end 1211 and the second end 1212 of the first microstrip line 1214 serve as the first end and the second end of the first inductance L1, respectively. The first end 1213 and the second end 1212 of the second microstrip line 1215 serve as the first end and the second end of the second inductance L2, respectively. The second end 1212 of the first microstrip 1214 and the second end 1212 of the second microstrip 1215 are connected together to form a common end 1212 of the first inductance L1 and the second inductance L2, and the first microstrip 1214 and the second microstrip 1215 form a combined microstrip. The first end 1211 of the first inductor L1, the first end 1213 of the second inductor L2, and the second end 1212 of the first inductor L1 and the second inductor L2 are connected to the other parts of the feedback amplifier, respectively, through connection lines.

The combined microstrip line (first microstrip line/second microstrip line) of the embodiment of the present application may be composed of a single layer or multiple layers of metal materials. In one example, the merged microstrip line is composed of multiple layers of metallic material, where each layer of metallic material is located in a different wiring layer of the feedback amplifier. And multiple layers of metal materials positioned in different wiring layers are overlapped together to form a combined microstrip line, and the metal materials of the layers are connected through interlayer through holes. In another example, the merged microstrip line is composed of a single layer of metal material, which may be located in the same or different wiring layers of the feedback amplifier. For example, a portion of the single layer of metal material is located in one wiring layer and the other portion is located in a different wiring layer or layers. Likewise, the single layers of metal material located in the different wiring layers are connected by vias.

In the example of fig. 9, both spiral patterns S1 and S2 comprise a plurality of turns, it being understood that they may also each comprise one turn, or one comprising a plurality of turns and the other comprising a plurality of turns.

As an example, the first microstrip line 1214 and the second microstrip line 1215 may be wound in opposite directions such that the spiral directions of the first spiral pattern S1 and the second spiral pattern S2 are opposite, so that the directions of induced magnetic fields caused by currents in the microstrip lines forming the two spiral patterns S1 and S2 are opposite when the low coupling inductance pair 121 is in an operating state. For example, one of S1 and S2 is made to spiral counterclockwise and the other is made to spiral clockwise. The direction from the first end of the first inductor L1 or the second inductor L2 to the common end may be referred to herein as a spiral direction, or the direction from the common end to the first end of the first inductor L1 or the second inductor L2 may be referred to herein as a spiral direction.

In the embodiment of fig. 9, the first microstrip line 1214 is wound in a first spiral pattern S1 in a counterclockwise direction from the first end 1211 to the common end 1212 in an inside-out manner (turns inside first and turns outside), and the second microstrip line 1215 is wound in a second spiral pattern S2 in a clockwise direction from the first end 1213 to the common end 1212 in an inside-out manner (turns inside first and turns outside). It will be appreciated that both may also be wound one inside-out, the other outside-in (outside-in turns then inside turns), or both. It will be appreciated that the microstrip line need not always be wound in an inside-out or outside-in direction when wound into a spiral pattern S1 or S2, but may be redirected one or more times. For example, it is first from inside to outside, and halfway from outside to inside, or vice versa.

In summary, each of the spiral patterns S1 and S2 may wind the microstrip line from the respective first end to the common end in one of the following manners:

from inside to outside;

from outside to inside;

a combination of the two.

In the embodiment of fig. 9, the two spiral patterns S1 and S2 do not overlap and are adjacent but at a distance D in a direction parallel to the wiring layer of the feedback amplifier. In the embodiment of the present application, since the mutual coupling between the two inductors is low as described above, the two spiral patterns S1 and S2 can be arranged as close as possible (but without overlapping portions), thereby reducing the circuit size and the cost. In one example, the spacing between the two spiral patterns S1 and S2 (distance D as shown in fig. 9) may be a minimum of about 3 microns. The "distance between two spiral patterns" as referred to herein refers to the distance between the microstrip lines of the two spiral patterns closest to each other. As shown in fig. 9, the distance D is the distance between adjacent outermost turns of S1 and S2. In practice, the minimum spacing between the two spiral patterns is determined by the chip manufacturing process.

In the example of fig. 9, the first microstrip line 1214 is equal in length to the second microstrip line 1215. That is, the common terminal 1212 is located at the midpoint of the combined microstrip line. It will be appreciated that the common terminal 1212 may be located at other locations than the midpoint of the combined microstrip line, such as closer to S1 or S2.

In this embodiment, the spiral patterns S1 and S2 are mirror images, as shown in fig. 9, and both are mirror images, which are shown as axisymmetric in fig. 9. I.e. the spiral patterns S1 and S2 have the same configuration, e.g. the same number of turns, microstrip line linewidths, spacing between adjacent turns, etc., except that their patterns are reversed (winding wise reversed), both in a symmetrical/mirrored relationship with respect to a plane perpendicular to the wiring layer in between. S1 and S2 may not be arranged in mirror image, for example, S1 and S2 may have different configurations, for example, S1 and S2 may have different numbers of turns, microstrip line widths, or pitches between adjacent turns, so long as the induced magnetic fields of the wound spiral patterns S1 and S2 are opposite in direction.

It will be appreciated that the arrangement of the first spiral pattern S1 and the second spiral pattern S2 in fig. 9 is interchangeable.

In the low-coupling inductance pair 121 according to the above embodiment of the present application, the microstrip lines of the two inductors have a common terminal and are arranged in two spiral patterns with opposite spiral directions, and when the excitation signal is applied to the low-coupling inductance pair 121 in an operation state, the excitation signal is split to the two spirals (microstrip lines of the two inductors) at the common terminal, so that the directions of induced magnetic fields generated by currents in the two spirals are opposite, thereby reducing mutual coupling/mutual inductance between the two inductors at least partially.

In the above described inductor pair embodiment, as shown in fig. 9, the inductor pair is arranged in an integrated circuit chip to have three terminals: a common terminal 1212, a head terminal 1211 which is the first branch terminal of the inductor pair, and a tail terminal 1213 which is the second branch terminal of the inductor pair. As previously described, the three ends of the inductor pair may be connected to an excitation signal or other circuit by leadsPart(s). For example, a radio frequency excitation signal may be coupled from the common terminal 1212 of the pair of inductors, the radio frequency excitation signal being split at the common terminal 1212 to a first microstrip line (first inductor) and a second microstrip line (second inductor). The radio frequency excitation signal is typically a periodically varying signal, for example a sinusoidal signal. Let the excitation signal accessed at the common terminal 1212 be i _com ＝I _com Sin ωt. The excitation signal splits at the common terminal 1212 into two branches, one flowing through the first spiral pattern S1 from the common terminal 1212 to the first branch terminal (head terminal) 1211 and the other flowing through the second spiral pattern S2 from the common terminal 1212 to the second branch terminal (tail terminal) 1213. Let the excitation signal in the first spiral pattern S1 be i ₁ (t) the excitation signal in the first spiral pattern S1 is i ₂ (t) assuming no reflection of the signal, i ₁ (t)+i ₂ (t)＝I _com Sin ωt. If the common terminal is located at the midpoint of the combined microstrip line and S1 and S2 are axisymmetric patterns, the excitation signals in S1 and S2 are identical at any time, i.e Excitation signal i in an inductor pair ₁ (t) and i ₂ (t) is a periodically varying signal whose current magnitude varies periodically and thus the induced magnetic field produced is also periodically varying unevenly; the changing magnetic field in turn generates an electric field, thereby generating electromagnetic waves. In the case where the excitation signals in S1 and S2 are identical, since the spiral directions of S1 and S2 are opposite, the induced magnetic field generated at any time S1 is identical in magnitude and opposite in direction to the induced magnetic field generated at S2, and the corresponding induced electric field is also opposite in direction and periodically changes direction. Therefore, the induced magnetic fields generated by S1 and S2 are almost completely cancelled in many areas, and partially cancelled in some areas, so that the corresponding electric field or electromagnetic wave caused by the induced magnetic fields are cancelled, thereby reducing the loss of the inductance pair.

If the common terminal is not located at the midpoint of the combined microstrip line, or if the S1 and S2 are patterns with different configurations, it may not be ensured that the excitation signals in the S1 and S2 are identical, so that the degree of mutual cancellation of the induced magnetic fields of the S1 and S2 is reduced compared with the case that the excitation signals in the S1 and S2 are identical, but the induced magnetic fields generated by the S1 and S2 still partially cancel each other at any moment, so that the electromagnetic radiation intensity is weakened mutually, and the loss of the inductance pair is reduced to a certain extent.

It should be noted that, theoretically, the pair of inductors having three ports (the common port, the head end of the combined microstrip line as the first branch port, and the tail end of the combined microstrip line as the second branch port) as described above is a passive lossless network, and since the passive network has reciprocity, the loss of the pair of inductors and the transmission characteristics thereof are reciprocal regardless of which one of the three ports the excitation signal is input from.

The low coupling inductance pair 121 composed of the first inductance L1 and the second inductance L2 in the feedback amplifier may employ the low coupling inductance pair arrangement as described above. The above description of the low coupling inductance pairs applies to all low coupling inductance pairs referred to herein and will not be repeated elsewhere herein for brevity.

In the feedback amplifier embodiments described above, the low coupling inductance pair as described above is used, which gives the feedback amplifier of the present application the following advantages:

in the various amplifier embodiments described above, the low coupling inductance pair described above is used, which gives the amplifier of the present application the following advantages: by configuring the two inductors making up the inductor pair such that their respective induced magnetic fields are opposite in direction, making the inductor pair a low coupling inductor pair, the loss of the amplifier input matching circuit can be reduced. In addition, since the coupling between the two inductors constituting the low-coupling inductor pair and the radiation ranges of the induced electric field and the induced magnetic field of the inductors can be reduced in this way, the inductors and other components are disposed closer together, further reducing the circuit size.

The embodiment of the application also provides an electronic device, which comprises the radio frequency chip, and the radio frequency chip comprising the feedback amplifier embodiment of the application can be used in the electronic device.

As shown in fig. 10, the electronic device 1600 includes the radio frequency chip 1500 shown in fig. 8. The electronic device 1600 may be a wireless device or any other electronic device that may use a feedback amplifier.

The wireless device may be a User Equipment (UE), mobile station, terminal, access terminal, subscriber unit, base station, or the like. The wireless device may also be a cellular telephone, a smart phone, a tablet computer, a wireless modem, a Personal Digital Assistant (PDA), a handheld device, a laptop computer, a smart book, a netbook, a cordless telephone, a Wireless Local Loop (WLL) station, a bluetooth device, etc. The wireless device may be capable of communicating with a wireless communication system, may be capable of receiving signals from a broadcast station, signals from one or more satellites, and the like. A wireless device may support one or more wireless communication technologies (e.g., 5G, LTE, CDMA2000, WCDMA, TD-SCDMA, GSM, 802.11, millimeter waves, etc.).

The embodiment of the application provides a feedback amplifier, a radio frequency chip and an electronic device, wherein the feedback amplifier comprises: a field effect transistor; the first end of the drain matching circuit is connected with the drain electrode of the field effect transistor, and the second end of the drain matching circuit is connected with the radio frequency signal output end; the first end of the grid matching circuit is connected with the grid of the field effect transistor, and the second end of the grid matching circuit is connected with the radio frequency signal input end; the first end of the source matching circuit is connected with the source electrode of the field effect transistor; the first end of the feedback circuit is connected with the fourth end of the grid matching circuit, and the second end of the feedback circuit is connected with the third end of the drain matching circuit; the drain matching circuit comprises a low-coupling inductance pair, wherein the low-coupling inductance pair is an inductance pair with opposite induction magnetic field directions. In the embodiment of the application, the low-coupling inductance pair is an inductance with opposite induction magnetic field directions, the induction electric fields generated by the pair of inductions with opposite induction magnetic fields are opposite in directions, and the induction electric fields with opposite directions can be partially counteracted, so that the radiation generated by the induction electric fields is reduced, and the energy loss of the circuit is reduced. In addition, the physical distance of the inductors in the low-coupling inductor pair can be closer due to the partial cancellation of the induced electric field, so that the size of the circuit can be reduced, and the cost can be reduced. In addition, the feedback circuit can enable the input and output of the feedback amplifier to be easy to realize impedance matching, and simultaneously, the high-frequency feedback quantity and the low-frequency feedback quantity of the feedback circuit can be small and large by adjusting the parameters of the feedback circuit, so that the gain in the working bandwidth of the feedback amplifier is increased along with the increase of the frequency. The positive slope of the gain of the feedback amplifier can compensate the negative slope of the gain of other lossy circuits or other amplifying circuits in the radio frequency link, so that the gain of the radio frequency link is flatter.

The feedback amplifier in the embodiment of the application can be independently used, can be used in multistage cascade connection, can be applied to an integrated system, or can be applied to a multifunctional chip. The radio frequency chip of the embodiment of the application can also comprise a feedback amplifier which is independently used, or can comprise a plurality of feedback amplifiers which are used in cascade connection, or can comprise a plurality of feedback amplifiers which are independently used.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to requirements, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the functions described above. The functional units and modules in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. In addition, the specific names of the functional units and modules are only for convenience of distinguishing each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the context, and will not be described herein.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any embodiment, reference is made to the related descriptions of other embodiments.

The units or modules described as separate components may or may not be physically separate, and components shown as units or modules may or may not be physical units, may be located in one place, or may be distributed over a plurality of functional units. Some or all of the units or modules may be selected according to actual needs to achieve the purpose of the embodiment.

In addition, each functional unit or module in each embodiment of the present application may be integrated in one chip unit, or each unit or module may exist alone physically, or two or more units or modules may be integrated in one unit.

It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The foregoing is only a specific embodiment of the application to enable those skilled in the art to understand or practice the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A feedback amplifier, the feedback amplifier comprising:

the field effect transistor comprises a drain electrode, a grid electrode and a source electrode, and is used for signal amplification;

2. The feedback amplifier of claim 1, wherein the low coupling inductance pair comprises:

3. The feedback amplifier of claim 2, wherein the drain matching circuit further comprises:

4. The feedback amplifier of claim 2, wherein the feedback circuit comprises:

5. The feedback amplifier of claim 2, wherein the gate matching circuit comprises:

the first end of the third capacitor is connected with the radio frequency signal input end, the second end of the third capacitor is used as the fourth end of the grid matching circuit to be connected with the first end of the feedback circuit, and the second end of the third capacitor is also connected with the grid of the field effect transistor;

6. The feedback amplifier of claim 2, wherein the gate matching circuit comprises:

7. A feedback amplifier according to claim 5 or 6, further comprising a gate bias circuit connected to the third terminal of the gate matching circuit.

8. The feedback amplifier of claim 7, wherein the gate bias circuit further comprises:

9. The feedback amplifier of claim 8, wherein the source matching circuit comprises:

10. The feedback amplifier of claim 8, wherein the source matching circuit is ground.

11. The feedback amplifier of claim 7, wherein the gate bias circuit is ground.

12. The feedback amplifier of claim 11, wherein the source matching circuit comprises:

the first end of the first resistor is connected with the second end of the sixth inductive unit, and the second end of the first resistor is grounded;

13. The feedback amplifier of claim 8, wherein the source matching circuit comprises:

14. A feedback amplifier according to claim 2, characterized in that the first inductance and the second inductance are both spiral inductances and are arranged in the feedback amplifier with opposite spiral directions.

15. The feedback amplifier of claim 2, wherein the first inductance and the second inductance are arranged as mirror images of each other in the feedback amplifier.

16. The feedback amplifier of claim 2, wherein the first inductor is comprised of a first microstrip line and the first microstrip line is wound in a first spiral pattern, and the second inductor is comprised of a second microstrip line and the second microstrip line is wound in a second spiral pattern, wherein a first end and a second end of the first microstrip line are respectively a first end and a second end of the first inductor, and a first end and a second end of the second microstrip line are respectively a first end and a second end of the second inductor, and wherein the second end of the first microstrip line and the second end of the second microstrip line are connected together such that the first microstrip line and the second microstrip line form a combined microstrip line.

17. The feedback amplifier of claim 16, wherein the first and second spiral patterns do not overlap and are adjacent but spaced apart in a direction parallel to a wiring layer of the feedback amplifier.

18. The feedback amplifier of claim 16, wherein the merged microstrip line is comprised of multiple layers of metallic material, wherein each layer of metallic material is located in a different wiring layer of the feedback amplifier.

19. The feedback amplifier of claim 16, wherein the merged microstrip line is comprised of a single layer of metal material, wherein the single layer of metal material is located in the same or different wiring layers of the feedback amplifier.

20. A radio frequency chip comprising a substrate, and the feedback amplifier of any of claims 1 to 19 on the substrate.

21. An electronic device comprising the radio frequency chip of claim 20.