CN216391535U

CN216391535U - Ultrathin coreless double-layer circuit board

Info

Publication number: CN216391535U
Application number: CN202121672985.4U
Authority: CN
Inventors: 康孝恒; 蔡克林; 唐波; 杨飞; 李�瑞; 许凯; 蒋乐元
Original assignee: Huizhou Zhijin Electronic Technology Co ltd
Current assignee: Huizhou Zhijin Electronic Technology Co ltd
Priority date: 2021-07-21
Filing date: 2021-07-21
Publication date: 2022-04-26
Anticipated expiration: 2031-07-21

Abstract

The utility model provides an ultrathin coreless double-layer circuit board which comprises a combined board, wherein the combined board comprises two double-layer boards; the combined board comprises two conductor layers which are mutually attached, a PP layer is wrapped around the two conductor layers, and copper foil layers are pressed on the outer sides of the PP layer which are parallel to the conductor layers; the double-layer plate is obtained by cutting the PP layers at the two ends of the combined plate. The utility model adopts two good conductive layers with opposite smooth surfaces and good electric and heat conduction as inner layer materials, then the PP layer and the copper foil layer are respectively pressed on two sides of the materials, the PP layer is utilized to tightly wrap the peripheries of the two inner layer materials when the PP layer is melted and solidified, and at the moment, 2 combined plates of the same double-layer plate are obtained, thereby not only realizing the ultra-thinning of circuit boards with any layer number and improving the manufacturing efficiency by 100 percent, but also realizing the real coreless plate formation, reducing the material waste and further reducing the manufacturing and process cost.

Description

Ultrathin coreless double-layer circuit board

Technical Field

The utility model relates to a circuit board technology, in particular to an ultrathin coreless double-layer circuit board.

Background

The coreless circuit board with any layer naturally has the advantages of ultra-thinness, 100% improvement of efficiency and the like, which are difficult to obtain by the traditional multilayer circuit board.

In the prior art, a conventional method for manufacturing a coreless circuit board with any layer needs to be established on a strippable CCL (Dummy copper clad laminate, which is only used as a bearing plate), and then board separation is performed after outermost layer lamination is completed, so that 2 sheets of circuit boards with any layer and 1 sheet of CCL with the same mode are obtained.

However, the method in the prior art avoids the risk of insufficient capability of processing a thin plate by a wire body to some extent, but also has the problem of material waste.

Disclosure of Invention

The embodiment of the utility model provides an ultrathin coreless double-layer circuit board, which reduces material waste and reduces manufacturing and flow cost.

The embodiment of the utility model provides an ultrathin coreless double-layer circuit board, which comprises a combined board, wherein the combined board comprises two double-layer boards;

the combined board comprises two conductor layers which are mutually attached, a PP layer is wrapped around the two conductor layers, and copper foil layers are pressed on the outer sides of the PP layer which are parallel to the conductor layers;

the double-layer plate is obtained by cutting the PP layers at the two ends of the combined plate.

Optionally, in one possible implementation, the conductor layer includes a smooth surface and a rough surface;

and the smooth surfaces of the two conductor layers are mutually attached.

Optionally, in a possible implementation, the conductor layer has a thickness of 2 μm to 50 μm.

Optionally, in a possible implementation manner, the material of the conductor layer is a copper foil material or a ceramic material.

Optionally, in one possible implementation, the PP layer is a semi-cured PP layer.

Optionally, in a possible implementation manner, two end faces of the conductor layer, the PP layer, and the copper foil layer are flush.

Optionally, in a possible implementation manner, the outer sides of the copper foil layer and the conductor layer are both provided with solder resist layers.

Optionally, in one possible implementation, the solder resist layer is a solder resist ink layer.

Optionally, in a possible implementation manner, a protective layer is provided at a position where no solder resist layer is provided outside the copper foil layer and the conductor layer.

Optionally, in one possible implementation, the protective layer is one of a nickel-gold layer, a nickel-palladium-gold layer, a nickel-silver layer, an OSP layer, or a tin layer.

The utility model provides an ultrathin coreless double-layer circuit board, which adopts two excellent conductor layers with opposite smooth surfaces and electric and heat conduction as inner layer materials, then respectively presses a PP layer and a copper foil layer on two sides of the materials, and tightly wraps the two inner layer materials when the PP layer is melted and solidified, so that 2 identical double-layer board combined boards are obtained.

Drawings

Fig. 1 is a schematic structural diagram for embodying a conductor layer in the present embodiment;

FIG. 2 is a schematic structural view of a copper foil layer according to the present embodiment;

FIG. 3 is a schematic structural view of the present embodiment for embodying two double-layer plates;

FIG. 4 is a schematic structural diagram of the present embodiment for embodying the channel;

fig. 5 is a schematic structural diagram for embodying the solder resist layer and the protective layer in the present embodiment.

In the figure, 1, a conductor layer; 11. a polished surface; 12. rough surface; 2. a PP layer; 3. a copper foil layer; 4. a solder resist layer; 5. a protective layer; 6. a channel.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Example 1

An ultra-thin coreless double-layer circuit board, as shown in fig. 1-3, includes a composition board, which includes two double-layer boards, it can be understood that after the composition board is manufactured, the composition board can be disassembled into two double-layer boards, i.e. two double-layer circuit boards are formed.

The compoboard includes two conductor layer 1 of laminating each other, and the parcel has PP layer 2 around two conductor layer 1, and under PP layer 2's parcel promptly, two conductor layer 1 are fixed together, form a whole, and then can apply other spare parts in the outside of two conductor layer 1, can form the circuit board of two parts symmetry.

In practical application, the PP layer 2 may be a semi-cured PP layer, and the semi-cured PP layer may be initially placed on the outer sides of the two conductor layers 1, and then the two conductor layers 1 are melt-wrapped by the semi-cured PP layer under high-temperature pressing.

The material of the conductor layer 1 may be a copper foil material or a ceramic material, which has excellent electrical and thermal conductivity, preferably, a copper foil commonly used in the circuit board industry.

The conductor layer 1 comprises a smooth surface 11 and a rough surface 12, in order to make the outer side of the circuit board smooth, the smooth surfaces 11 of the two conductor layers 1 are mutually attached, the rough surfaces 12 are mutually away from each other and combined with the PP layer 2, and after the two conductor layers 1 are separated, the smooth surfaces 11 of the conductor layers 1 face outwards, so that the influence of the rough surfaces 12 on the circuit board is prevented.

For more convenient processing conditions, the thickness of the conductor layer 1 may be 2 μm to 50 μm, for example, 2 μm, 25 μm, or 50 μm.

In order to form the double-layer board, the copper foil layer 3 is required to be pressed on the outer sides of the PP layer 2 parallel to the conductor layer 1, after the pressing is finished, the copper foil layer 3, the PP layer 2 and the conductor layer 1 form the double-layer board, and the PP layer 2 wraps the two conductor layers 1 together, namely, the combined board comprises two double-layer boards.

In order to obtain two double-layer plates, the PP layers 2 at the two ends of the combined plate are cut, and after the PP layers 2 at the two ends of the combined plate are cut, the two ends of the conductor layer 1 lose the wrapping force of the PP layers 2 and are separated from each other, so that the two double-layer plates are formed.

In practical application, when cutting operation is performed, two end faces of the conductor layer 1, the PP layer 2 and the copper foil layer 3 are required to be flush.

The present embodiment further provides a process for manufacturing an ultra-thin coreless double-layer circuit board, including steps S1-S3, as follows:

s1, two conductor layers 1 are attached to each other.

S2, sequentially laying a PP layer 2 and a copper foil layer 3 on the outer sides of the two conductor layers 1, and performing high-temperature vacuum pressing treatment to soften and flow the PP layer 2 and wrap the peripheries of the two conductor layers 1;

and S3, cutting off the PP layers 2 at the two ends of the conductor layer 1, and separating the two conductor layers 1 to obtain two double-layer plates.

When the PP layers 2 on two sides of the conductor layer 1 are cut off, the method further includes cutting off the redundant copper foil layer 3, so that two end faces of the copper foil layer 3 are aligned with two end faces of the conductor layer 1.

In the embodiment, two good conductive layers 1 with opposite smooth surfaces 11 and with electric and heat conduction are used as inner layer materials, then a PP layer 2 and a copper foil layer 3 are respectively pressed on two sides of the materials, the two inner layer materials are tightly wrapped by the PP layer 2 during melting and solidification, and at the moment, a 2-piece composite board with the same double-layer board is obtained.

Example 2

An ultra-thin coreless double-layer circuit board is different from the circuit board of embodiment 1 in that, referring to fig. 4-5, a solder mask layer 4 is arranged on the outer sides of a copper foil layer 3 and the conductor layer 1, and the solder mask layer 4 can be a solder mask ink layer.

In practical application, when the solder mask layer 4 is printed, pads required to be used by a packaging factory and an assembly factory need to be leaked out, the protective layer 5 is arranged at the position where the solder mask layer 4 is not arranged on the outer sides of the copper foil layer 3 and the conductor layer 1, and the protective layer 5 can be one of a nickel-gold layer, a nickel-palladium-gold layer, a nickel-silver layer, an OSP layer or a tin layer.

This embodiment further provides a process for manufacturing an ultrathin coreless dual-layer circuit board, which is different from that in embodiment 1, after obtaining two three-layer boards, the process further includes:

punching holes in the copper foil layer 3, the PP layer 2 and the conductor layer 1 to form a channel 6 for communicating the copper foil layer 3 and the conductor layer 1;

filling the side walls of the channel 6 or the entire channel 6 with metal;

and performing protection treatment on the outer sides of the copper foil layer 3 and the conductor layer 1. Solder masks 4 are arranged on the outer sides of the copper foil layer 3 and the conductor layer 1, and pads required to be used by a packaging factory and an assembly factory are leaked out; and a protective layer 5 is arranged at the position where the solder mask layer 4 is not arranged outside the copper foil layer 3 and the conductor layer 1.

The solder resist layer 4 may be a solder resist ink layer, and the protection layer 5 may be one of a nickel-gold layer, a nickel-palladium-gold layer, a nickel-silver layer, an OSP layer, or a tin layer.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the utility model has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An ultrathin coreless double-layer circuit board is characterized by comprising a combined board, wherein the combined board comprises two double-layer boards;

the combined board comprises two conductor layers (1) which are mutually attached, a PP layer (2) wraps the peripheries of the two conductor layers (1), and copper foil layers (3) are pressed on the outer sides of the PP layer (2) which are parallel to the conductor layers (1);

the double-layer plate is obtained by cutting the PP layers (2) at the two ends of the combined plate.

2. An ultra-thin coreless double-layer circuit board according to claim 1, wherein the conductor layer (1) includes a smooth face (11) and a rough face (12);

the smooth surfaces (11) of the two conductor layers (1) are mutually attached.

3. An ultra-thin coreless double-layer circuit board according to claim 1 or 2, wherein the thickness of the conductor layer (1) is 2 μm to 50 μm.

4. An ultra-thin coreless double-layer circuit board according to claim 3, wherein the material of the conductor layer (1) is a copper foil material or a ceramic material.

5. An ultra-thin coreless bi-layer circuit board according to claim 1, wherein the PP layer (2) is a semi-cured PP layer.

6. An ultra-thin coreless double-layer circuit board according to claim 1, wherein two end faces of the conductor layer (1), the PP layer (2) and the copper foil layer (3) are flush.

7. An ultra-thin coreless double-layer circuit board according to claim 1, wherein a solder resist layer (4) is provided on the outer side of each of the copper foil layer (3) and the conductor layer (1).

8. An ultra-thin coreless double layer circuit board according to claim 7, wherein the solder mask layer (4) is a solder mask ink layer.

9. An ultra-thin coreless double layer circuit board according to claim 7 or 8, characterized in that a protective layer (5) is provided at a position outside the copper foil layer (3) and the conductor layer (1) where no solder resist layer (4) is provided.

10. The ultra-thin coreless double-layer circuit board of claim 9, wherein the protective layer (5) is one of a nickel-gold layer, a nickel-palladium-gold layer, a nickel-silver layer, an OSP layer, or a tin layer.