CN215799882U

CN215799882U - Silicon wafer loading structure on heterojunction solar cell processing equipment support plate

Info

Publication number: CN215799882U
Application number: CN202122480154.3U
Authority: CN
Inventors: 刘翠翠
Original assignee: Jiangxi Hankefan Semiconductor Technology Co ltd
Current assignee: Jiangxi Hankefan Semiconductor Technology Co ltd
Priority date: 2021-10-14
Filing date: 2021-10-14
Publication date: 2022-02-11
Anticipated expiration: 2031-10-14

Abstract

The utility model discloses a silicon wafer loading structure on a carrier plate of heterojunction solar cell processing equipment, which comprises a carrier plate body, wherein the difference from the prior art is that four pins which are distributed in a centrosymmetric manner are arranged at the top of the carrier plate body and are spliced with the carrier plate body, pin heads are fixedly arranged at the top ends of the pins, and the surfaces of the pin heads facing the carrier plate body are obliquely arranged. According to the utility model, after the four pins are in central symmetry with respect to the support plate body, the four pins are used for limiting the four sides of the silicon wafer, when the silicon wafer is askew placed at the top of the pin head, the pin head is obliquely arranged towards the surface of the support plate body, so that the silicon wafer can automatically slide from the top of the pin head to be placed on the support plate body, the loading structure reduces the processing difficulty of the support plate, the contact points with the silicon wafer are few, the edge effect of the silicon wafer during film coating is reduced, the automatic positioning requirement is reduced, and the proportion of edge breakage and corner shortage or poor film coating caused by inaccurate wafer placing of a production line is reduced.

Description

Silicon wafer loading structure on heterojunction solar cell processing equipment support plate

Technical Field

The utility model relates to the technical field of solar cell loading, in particular to a silicon wafer loading structure on a heterojunction solar cell processing equipment carrier plate.

Background

The monocrystalline silicon heterojunction solar cell has high conversion efficiency, is recognized as one of the key technologies of the next large-scale industrialization by the photovoltaic industry, and amorphous silicon film coating equipment of the monocrystalline silicon heterojunction solar cell comprises HWCVD and PECVD, wherein silicon wafers are required to be placed on a support plate with a groove, the groove which is generally adopted is square, and the square or quasi-square silicon wafers are placed in the groove.

The prior art has the following defects:

1. the edge of the groove and the silicon wafer can contact a plurality of sides, the number of the contact parts is large, and the contact parts can influence the coating quality, which is called edge effect;

2. in order to reduce the edge effect, the groove cannot be very deep (within 1mm, for example), the silicon wafer is difficult to slide on a slope even if the edge of the groove is made shallow, the silicon wafer needs to be accurately placed in the groove, and the requirement on positioning the silicon wafer is high;

3. machining very shallow recesses in a carrier plate and sometimes even multiple layers of very shallow recesses is costly.

SUMMERY OF THE UTILITY MODEL

In order to overcome the above defects in the prior art, embodiments of the present invention provide a silicon wafer loading structure on a carrier plate of a heterojunction solar cell processing apparatus, so as to solve the problems in the background art.

In order to achieve the above object, the present invention provides a silicon wafer loading structure on a carrier plate of a heterojunction solar cell processing apparatus: including the support plate body, different with prior art, the top of support plate body is provided with four pins that are central symmetry and distribute, and the pin pegs graft with the support plate body, the fixed round pin fin that is equipped with in top of pin, the round pin fin is towards the personally submitting slope setting of support plate body.

Preferably, the round pin nailhead is the hemisphere head, and when adopting the hemisphere head, because the edge of hemisphere head all is the arc design, consequently need not to adjust and can insert the support plate body with the pin and use.

Preferably, the pin head is a cone head, and the top end of the cone head is in a point shape, so that the contact surface with the silicon wafer is small after the silicon wafer is placed askew, and the silicon wafer can quickly slide into the carrier plate body.

Preferably, the pin head is a triangular head, and the triangular head is only provided with one inclined surface, so that the inclined surface of the triangular head needs to be manually adjusted to face the center of the carrier body during installation, and the silicon wafer can be rapidly slid into the carrier body by the inclined surface in the same way.

Preferably, the top of the carrier plate body is provided with a positioning hole corresponding to the position of the pin, and the positioning hole is convenient for the pin to be inserted into the carrier plate body.

The utility model has the technical effects and advantages that:

according to the utility model, the four pins are centrally symmetrical with respect to the support plate body and then inserted into the support plate body, when the silicon wafer is placed at the top of the support plate body, the four pins are used for limiting the four sides of the silicon wafer, when the silicon wafer is placed at the top of the pin head in a tilted manner, as the pin head faces the surface of the support plate body and is obliquely arranged, the silicon wafer can automatically slide down from the top of the pin head and is positioned on the support plate body, the loading structure reduces the processing difficulty of the support plate, has few contact points with the silicon wafer, reduces the edge effect when the silicon wafer is coated with a film, reduces the positioning requirement on automation, and reduces the proportion of edge breakage and corner defect or poor film coating caused by inaccurate film placement of a production line.

Drawings

Fig. 1 is a schematic view of the overall structure of the present invention.

Fig. 2 is a schematic structural view of a pin in embodiment 1 of the present invention.

Fig. 3 is a schematic structural view of a pin in embodiment 2 of the present invention.

Fig. 4 is a schematic structural view of a pin in embodiment 3 of the present invention.

The reference signs are: 1. a carrier plate body; 2. a pin; 3. positioning holes; 4. a pin head; 5. a conical head; 6. a triangular body head; 7. a hemispherical head.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to the attached drawing 1 of the specification, the silicon wafer loading structure on the carrier plate of the heterojunction solar cell processing equipment in the embodiment of the utility model comprises a carrier plate body 1, and is different from the prior art in that four pins 2 which are distributed in central symmetry are arranged at the top of the carrier plate body 1, the pins 2 are inserted into the carrier plate body 1, pin heads 4 are fixedly arranged at the top ends of the pins 2, and the surfaces of the pin heads 4 facing the carrier plate body 1 are obliquely arranged;

during the use, be central symmetry with four pins 2 about support plate body 1 after, insert support plate body 1 in, when the silicon chip was put at support plate body 1 top, four pins 2 were spacing processing for the four sides of silicon chip, put askew when being located the round pin fin 4 top when the silicon chip, because the round pin fin 4 sets up towards the personally submitting of support plate body 1 of slope, consequently the silicon chip can be automatic to be located support plate body 1 from the top landing of round pin fin 4, this loading structure reduces the processing degree of difficulty of support plate, and few with the silicon chip contact point, edge effect when reducing the silicon chip coating film, reduce the location requirement to the automation, reduce the production line because put the inaccurate limit unfilled corner that leads to of piece or the bad proportion of coating film.

Referring to the attached figure 2 of the specification, embodiment 1: the pin head 4 is a hemispherical head 7, and when the hemispherical head 7 is adopted, the edge of the hemispherical head 7 is in an arc design, so that the pin 2 can be inserted into the carrier plate body 1 without adjustment.

Referring to the description of figure 3, example 2: the pin head 4 is a cone head 5, and because the top end of the cone head 5 is in a point shape, the contact surface with the silicon wafer is small after the silicon wafer is placed askew, so that the silicon wafer can quickly slide into the carrier plate body 1.

Referring to figure 4 of the specification, example 3: the pin head 4 is a triangular head 6, and the triangular head 6 has only one inclined surface, so that the inclined surface of the triangular head 6 needs to be manually adjusted to face the center of the carrier body 1 during installation, and the silicon wafer can be rapidly slid into the carrier body 1 by the inclined surface.

Referring to the attached drawing 1 of the specification, the top of the carrier body 1 is provided with a positioning hole 3 corresponding to the position of the pin 2, and the positioning hole 3 facilitates the insertion of the pin 2 into the carrier body 1.

The points to be finally explained are: first, in the description of the present application, it should be noted that, unless otherwise specified and limited, the terms "mounted," "connected," and "connected" should be understood broadly, and may be a mechanical connection or an electrical connection, or a communication between two elements, and may be a direct connection, and "upper," "lower," "left," and "right" are only used to indicate a relative positional relationship, and when the absolute position of the object to be described is changed, the relative positional relationship may be changed;

secondly, the method comprises the following steps: in the drawings of the disclosed embodiments of the utility model, only the structures related to the disclosed embodiments are referred to, other structures can refer to common designs, and the same embodiment and different embodiments of the utility model can be combined with each other without conflict;

and finally: the above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents, improvements and the like that are within the spirit and principle of the present invention are intended to be included in the scope of the present invention.

Claims

1. Silicon chip on heterojunction solar cell processing equipment support plate loads structure, including support plate body (1), its characterized in that: the support plate is characterized in that more than four pins (2) are arranged in the plate placing area of the support plate body (1), the pins (2) are connected with the support plate body (1) in an inserting mode, pin heads (4) are fixedly arranged at the top ends of the pins (2), and the pin heads (4) are obliquely arranged towards the surface of the support plate body (1).

2. The silicon wafer loading structure on the carrier plate of the heterojunction solar cell processing equipment of claim 1, wherein: the pin head (4) is a hemispheroidal head (7).

3. The silicon wafer loading structure on the carrier plate of the heterojunction solar cell processing equipment of claim 2, wherein: the pin head (4) is a conical head (5).

4. The silicon wafer loading structure on the heterojunction solar cell processing equipment carrier plate of claim 2 or 3, wherein: the pin head (4) is a triangular head (6).

5. The silicon wafer loading structure on the carrier plate of the heterojunction solar cell processing equipment of claim 1, wherein: the top of the carrier plate body (1) is provided with a positioning hole (3) corresponding to the position of the pin (2).