CN213586010U - Video output card and card insertion type video splicing processing equipment - Google Patents

Video output card and card insertion type video splicing processing equipment Download PDF

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Publication number
CN213586010U
CN213586010U CN202022764554.2U CN202022764554U CN213586010U CN 213586010 U CN213586010 U CN 213586010U CN 202022764554 U CN202022764554 U CN 202022764554U CN 213586010 U CN213586010 U CN 213586010U
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ethernet
card
pin
electrically connected
video
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任江
石振振
周晶晶
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Xian Novastar Electronic Technology Co Ltd
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Xian Novastar Electronic Technology Co Ltd
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Abstract

The embodiment of the utility model provides a video output card and a card-inserting type splicing processor, wherein the video output card is applied to card-inserting type video splicing processing equipment and comprises an exchange back plate; the video output card includes: the first connector is connected with the exchange backboard; the processing chip is electrically connected with the first connector and comprises an Ethernet signal output pin; and the display screen loading module is electrically connected with the Ethernet signal output pin. The video output card that this embodiment provided can control the LED display screen through the display screen area carries module lug connection LED display screen, so, need not to use the video interface to change the sending card of net gape and can realize the control of LED display screen, the cost is reduced has also improved the reliability simultaneously.

Description

Video output card and card insertion type video splicing processing equipment
Technical Field
The utility model relates to a display control technical field especially relates to a video output card and a plug-in card formula video concatenation processing equipment.
Background
In the current display control industry, the market demand for video splicers with a sending function is more and more urgent. In the prior art, a video splicer generally comprises video input and video output, and a sending card which is matched with a video interface to be converted into a network port can control display on a display screen, so that the display screen can be controlled to display by matching the video splicer and the sending card, and thus, the cost is high and the reliability is low.
SUMMERY OF THE UTILITY MODEL
Accordingly, to overcome at least some of the deficiencies and shortcomings of the prior art, embodiments of the present invention provide a video output card and a card-insertion type video stitching processing device.
Specifically, the embodiment of the utility model provides a video output card, be applied to plug-in card formula video concatenation processing equipment, including exchanging the backplate; the video output card includes: the first connector is connected with the exchange backboard; the processing chip is electrically connected with the first connector and comprises an Ethernet signal output pin; and the display screen loading module is electrically connected with the Ethernet signal output pin.
The video output card of this embodiment is through set up display screen area and carry the module in the video output card, through processing chip connection display screen area and carry the module to can carry the module lug connection LED display screen through the display screen, control LED display screen and show, so, need not to use the video interface to change the sending card of net mouth and can realize the control of LED display screen, the cost is reduced has also improved the reliability simultaneously.
In an embodiment of the present invention, the ethernet signal output pin includes a media independent interface bus pin and a Serdes bus pin, and the display screen loading module includes: the two optical ports are electrically connected with the Serdes bus pins; the Ethernet PHY chip set is electrically connected with the media independent interface bus pin; and sixteen Ethernet interfaces electrically connected with the Ethernet PHY chip set.
In an embodiment of the present invention, the ethernet PHY chipset includes two first ethernet PHY chips, and each of the first ethernet PHY chips is connected to eight ethernet interfaces of the sixteen ethernet interfaces respectively; or the ethernet PHY chipset comprises sixteen second ethernet PHY chips, and the sixteen ethernet interfaces are respectively connected in a one-to-one correspondence manner.
In an embodiment of the present invention, the ethernet signal output pin is an MDI pin; the display screen loading module comprises: twenty Ethernet interfaces which are respectively and electrically connected with the MDI pins.
In an embodiment of the present invention, the ethernet signal output pin is a media independent interface bus pin; the display screen loading module comprises: the Ethernet PHY chip set is electrically connected with the media independent interface bus pin; and twenty Ethernet interfaces electrically connected with the Ethernet chip set.
In an embodiment of the present invention, the ethernet PHY chipset includes three first ethernet PHY chips, and the three first ethernet PHY chips are respectively correspondingly connected to eight ethernet interfaces, eight ethernet interfaces and four ethernet interfaces of the twenty ethernet interfaces; or the Ethernet PHY chip set comprises twenty second Ethernet PHY chips which are respectively connected with the twenty Ethernet interfaces in a one-to-one correspondence manner.
In an embodiment of the present invention, the ethernet signal output pin is an SGMII pin; the display screen loading module comprises: twenty optical ports are respectively and electrically connected with the SGMII pin.
In an embodiment of the present invention, the ethernet signal output pin is a media independent interface bus pin; the display screen loading module comprises: the Ethernet PHY chip set is electrically connected with the media independent interface bus pin; and twenty optical ports electrically connected with the Ethernet chip set.
In an embodiment of the present invention, the ethernet PHY chipset includes three first ethernet PHY chips, and the three first ethernet PHY chips are respectively correspondingly connected to eight optical ports, and four optical ports of the twenty optical ports; or the Ethernet PHY chip group comprises twenty second Ethernet PHY chips which are respectively connected with the twenty optical ports in a one-to-one correspondence manner.
On the other hand, the embodiment of the utility model provides a pair of plug-in card formula video concatenation treatment facility includes: the exchange back plate is provided with a second connector; the video input card is electrically connected with the exchange back plate; the video output card is electrically connected with the second connector through the first connector to electrically connect with the switching backplane.
The video output card of this embodiment is through set up display screen area and carry the module in the video output card, through processing chip connection display screen area and carry the module to can carry the module lug connection LED display screen through the display screen, control LED display screen and show, so, need not to use the video interface to change the sending card of net mouth and can realize the control of LED display screen, the cost is reduced has also improved the reliability simultaneously.
In view of the above, the above technical features of the present invention can have one or more of the following advantages: through set up display screen area and carry the module in the video output card, connect display screen area and carry the module through handling chip to can control LED display screen through display screen area and carry module lug connection LED display screen and show, so, need not to use the video interface to change the sending card of net gape and can realize the control of LED display screen, the cost is reduced has also improved the reliability simultaneously.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of the embodiment of the present invention, which provides a plug-in card type video splicing process.
Fig. 2 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 3 is another schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 4 is a circuit diagram of an ethernet PHY chip according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 6 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 8 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 9 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Fig. 10 is a schematic diagram of another structure of a video output card according to an embodiment of the present invention.
Fig. 11 is a schematic structural diagram of a video output card according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
Referring to fig. 1 and fig. 2, an embodiment of the present invention provides a card insertion type video splicing processing device 50, including: a switch backplane 100, a video input card 200, and a video output card 300.
Specifically, the switching backplane 100 may, for example, include a second connector 110, the video input card 200 may be electrically connected to the switching backplane 100, the video output card 300 may, for example, include a first connector 310, and the video output card 300 may be electrically connected to the second connector 110 through the first connector 310 to connect to the switching backplane 100. For example, the first connector 310 may be a female socket, and the second connector 110 may be a mating male socket; alternatively, the first connector 310 may be a male connector and the second connector 110 may be a female connector. Of course, the video input card 200 may also be electrically connected to the switch backplane 100, for example, through a plug-in component (e.g., a male socket, a female socket), and the embodiments of the present invention are not limited thereto. The card-inserted video splicing processing device 50 may further include a main processor, which may be specifically, for example, an ARM (advanced RISC machines) processor, and the ARM processor may be disposed on the switch backplane 100 or the main control board, for example, but not limited thereto.
Referring to fig. 2, video output card 300 may, for example, include a first connector 310, a processing chip 320, and a display screen load module 330. The first connector 310 includes, for example, a data transmission pin and a control signal pin, where the data transmission pin is used to receive data transmitted by the video input card 200, and the control signal pin is used to receive a control signal of the ARM processor; the processing chip 320 may be, for example, a Programmable logic device or a Central Processing Unit (CPU), and the processing chip 320 includes an ethernet signal output pin for outputting an ethernet signal, where the Programmable logic device may be, for example, an FPGA (Field Programmable Gate Array); the display screen loading module 330 is used for directly connecting to a receiving card in the LED display screen, and is electrically connected to the ethernet signal output pin to output the ethernet signal output by the processing chip 320 to the receiving card.
For the card-inserting type video splicing processing device 50 in this embodiment, a video signal from the video input card 200 passes through the switching backplane 100 and then is transmitted to the processing chip 320 of the video output card 300 through the data transmission pins of the second connector 110 and the first connector 310, the main processor for example transmits a control signal to the processing chip 320 of the video output card 300 through the control signal pins of the second connector 110 and the first connector 310 of the switching backplane 100, and the video processing chip 320 performs video splicing and other processing on the video signal and outputs the processed video signal to a receiving card of an LED display screen through a display screen loading module to control the display of the LED display screen. Of course, the embodiments are merely examples, and the invention is not limited thereto.
Referring to fig. 3 and 4, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, an FPGA, and specifically, for example, an XC7K480T chip may be used, and the ethernet signal output pins of the processing chip 320 include, for example, a media independent interface bus pin and a Serdes (serializer deserializer) bus pin, that is, the processing chip 320 may transmit signals through the media independent interface bus and the Serdes bus. The display screen load module 330 includes two optical ports 333, an ethernet PHY chipset 335, and sixteen ethernet interfaces 1-16. Two optical ports 333 are electrically connected to the Serdes bus pins, where the number of the Serdes bus pins may be two, and the two optical ports 333 are respectively connected to the two Serdes bus pins through two Serdes buses, where the optical ports may be SFP optical modules, specifically 1X2SFP optical modules may be adopted; the ethernet PHY chipset 335 includes, for example, two first ethernet PHY chips 332, and the media independent interface bus pins may also include, for example, two, the two first ethernet PHY chips 332 are respectively connected to the two media independent interface bus pins through two media independent interface buses, one first ethernet PHY chip 332 of the two ethernet PHY chips 332 is respectively connected to the eight ethernet interfaces 1 to 8, and the other first ethernet PHY chip is respectively connected to the remaining eight ethernet interfaces 9 to 16. Wherein the media independent interface bus is, for example, SGMII bus, RGMII bus or QSGMII bus, the first ethernet PHY chip may, for example, be an 88E1340 chip, and the ethernet interfaces 1-16 may, for example, be RJ45 interfaces. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 5, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, an FPGA, and specifically, for example, an XC7K480T chip may be used, and the ethernet signal output pins of the processing chip 320 include, for example, a media independent interface bus pin and a Serdes (serializer deserializer) bus pin, that is, the processing chip 320 may transmit signals through the media independent interface bus and the Serdes bus. The display screen load module 330 includes two optical ports 333, an ethernet PHY chipset 335, and sixteen ethernet interfaces 1-16. Two optical ports 333 are electrically connected to the Serdes bus pins, where the number of the Serdes bus pins may be two, and the two optical ports 333 are respectively connected to the two Serdes bus pins through two Serdes buses, where the optical ports may be SFP optical modules, specifically 1X2SFP optical modules may be adopted; the ethernet PHY chipset 335 includes sixteen second ethernet PHY chips 334, for example, and the media independent interface bus pin may also be sixteen SGMII/RGMII bus pins or four QSGMII bus pins, and when the media independent interface bus pin is sixteen SGMII/RGMII bus pins, the sixteen second ethernet PHY chips 334 are respectively connected to the sixteen SGMII/RGMII bus pins through sixteen SGMII/RGMII buses; when the media independent interface bus pin is four QSGMII bus pins, the sixteen second ethernet PHY chips 334 are respectively connected to the four QSGMII bus pins through four QSGMII buses (this scheme is not shown in the figure); sixteen second ethernet PHY chips 334 are connected to the sixteen ethernet interfaces 1-16, respectively, in a one-to-one correspondence. The second ethernet PHY chip 334 may be, for example, an AR8033 chip or an 88E1340 chip, and the ethernet interfaces 1-16 may be, for example, RJ45 interfaces. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 6, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, a CPU, and may specifically adopt, for example, a BCM56224 chip, and an ethernet signal output pin of the processing chip 320 is, for example, an MDI (Medium Dependent Interface) pin, that is, the processing chip 320 may transmit a signal through the MDI. The display screen load module 330 includes twenty ethernet interfaces 1-20. The twenty ethernet interfaces 1 to 20 are respectively electrically connected to the MDI pins, where the MDI pins may include twenty, and the twenty ethernet interfaces 1 to 20 are respectively connected to the twenty MDI pins through 20 MDI lines, where the ethernet interfaces 1 to 20 may adopt RJ45 interfaces, for example, and specifically may adopt 10 1X2RJ45 interfaces, or 5 2X2RJ45 interfaces, or 2X4RJ45 interfaces, and 1X2RJ45 interface, for example. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 7, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, an FPGA, and specifically, for example, an XC7K480T chip may be used, and the ethernet signal output pin of the processing chip 320 is, for example, a media independent interface bus pin, that is, the processing chip 320 may transmit signals through the media independent interface bus. The display screen loading module 330 includes an ethernet PHY chipset 335 and twenty ethernet interfaces 1 to 20, where the ethernet PHY chipset 335 includes, for example, three first ethernet PHY chips 332, and the media independent interface bus pins may also include, for example, three, the three first ethernet PHY chips 332 are respectively connected to the three media independent interface bus pins through three media independent interface buses, one first ethernet PHY chip 332 of the three ethernet PHY chips 332 is respectively connected to eight ethernet interfaces 1 to 8, another first ethernet PHY chip is respectively connected to eight ethernet interfaces 9 to 16, and another first ethernet PHY chip is respectively connected to four ethernet interfaces 17 to 20. The first ethernet PHY chip may be, for example, an 88E1340 chip, the ethernet interfaces 1 to 20 may be, for example, gigabit ethernet interfaces, may be downward compatible with one hundred gigabit ethernet interfaces and ten gigabit ethernet interfaces, and may be, for example, RJ45 interfaces, specifically, 10 1X2RJ45 interfaces, or 5 2X2RJ45 interfaces, or 2X4RJ45 interfaces and 1X2RJ45 interfaces. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 8, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, an FPGA, and specifically, for example, an XC7K480T chip may be used, and the ethernet signal output pin of the processing chip 320 is, for example, a media independent interface bus pin, that is, the processing chip 320 may transmit signals through the media independent interface bus. The display screen load module 330 includes an ethernet PHY chipset 335 and twenty ethernet interfaces 1-20. The ethernet PHY chipset 335 includes twenty second ethernet PHY chips 334, for example, and the media independent interface bus pin may also be twenty SGMII/RGMII bus pins or five QSGMII bus pins, and when the media independent interface bus pin is twenty SGMII/RGMII bus pins, the twenty second ethernet PHY chips 334 are respectively connected to the twenty SGMII/RGMII bus pins through twenty SGMII/RGMII buses; when the media independent interface bus pin is five QSGMII bus pins, the twenty second ethernet PHY chips 334 are respectively connected to the five QSGMII bus pins through five QSGMII buses (this scheme is not shown in the figure); twenty second ethernet PHY chips 334 are connected to the twenty ethernet interfaces 1-20, respectively, in a one-to-one correspondence. The second ethernet PHY chip 334 may employ, for example, an AR8033 chip and an 88E1340 chip, and the ethernet interfaces 1 to 20 may employ, for example, an RJ45 interface, and may employ, for example, an RJ45 interface, specifically, 10 1X2RJ45 interfaces, or 5 2X2RJ45 interfaces, or 2X4RJ45 interfaces and 1X2RJ45 interface. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 9, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, a CPU, and may specifically adopt, for example, a BCM56224 chip, and the ethernet signal output pin of the processing chip 320 is, for example, an SGMII pin, that is, the processing chip 320 may transmit signals through the SGMII. The display screen loading module 330 includes twenty optical ports 301 and 320. The twenty optical ports 301-320 are electrically connected to the SGMII pins respectively, where the SGMII pins may include twenty for example, and the twenty optical ports 301-320 are connected to the twenty SGMII pins through 20 SGMII lines respectively, where the optical ports 301-320 may adopt SFP optical modules, specifically, 10 1X2SFP optical modules, or 5 2X2SFP optical modules, or 2X4SFP optical modules and 1X2SFP optical module, for example. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 10, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, an FPGA, and specifically, for example, an XC7K480T chip may be used, and the ethernet signal output pin of the processing chip 320 is, for example, a media independent interface bus pin, that is, the processing chip 320 may transmit signals through the media independent interface bus. The display screen loading module 330 includes an ethernet PHY chipset 335 and twenty optical ports 301-. The media independent interface bus is, for example, an SGMII bus, an RGMII bus, or a QSGMII bus, the first ethernet PHY chip may, for example, adopt an 88E1340 chip, and the optical port 301-320 may, for example, adopt an SFP optical module, specifically, 10 1X2SFP optical modules, or 5 2X2SFP optical modules, or 2X4SFP optical modules and 1X2SFP optical module. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
Referring to fig. 11, in a specific implementation manner of the embodiment of the present invention, the processing chip 320 may be, for example, an FPGA, and specifically, for example, an XC7K480T chip may be used, and the ethernet signal output pin of the processing chip 320 is, for example, a media independent interface (media independent interface) bus pin, that is, the processing chip 320 may transmit signals through a media independent interface bus. Display screen tape load module 330 includes ethernet PHY chipset 335 and twenty optical ports 301-320. The ethernet PHY chipset 335 includes twenty second ethernet PHY chips 334, for example, and the media independent interface bus pin may also be twenty SGMII/RGMII bus pins or five QSGMII bus pins, and when the media independent interface bus pin is twenty SGMII/RGMII bus pins, the twenty second ethernet PHY chips 334 are respectively connected to the twenty SGMII/RGMII bus pins through twenty SGMII/RGMII buses; when the media independent interface bus pin is five QSGMII bus pins, the twenty second ethernet PHY chips 334 are respectively connected to the five QSGMII bus pins through five QSGMII buses (this scheme is not shown in the figure); the twenty second ethernet PHY chips 334 are respectively connected to the twenty optical ports 301-320 in a one-to-one correspondence. The second ethernet PHY chip 334 may adopt, for example, an AR8033 chip and an 88E1340 chip, and the optical port 301-320 may adopt, for example, an SFP optical module, which may specifically be, for example, 10 1X2SFP optical modules, or 5 2X2SFP optical modules, or 2X4SFP optical modules and 1X2SFP optical module. Of course, the specific types of the devices such as the chip and the interface in this embodiment may be selected according to actual requirements, which is only an example herein, and this embodiment is not limited thereto.
To sum up, the embodiment of the utility model provides a through set up display screen area and carry the module in the video output card, connect display screen area and carry the module through handling the chip to can carry module lug connection LED display screen through the display screen, control the LED display screen and show, so, need not to use the sending card of video interface switching network mouth can realize the control of LED display screen, the cost is reduced has also improved the reliability simultaneously. In addition, the maximum loading of the video output card is realized through the arrangement of twenty optical ports or twenty Ethernet interfaces in the display screen loading module, and the loading capacity of the video output card is further improved.
In addition, it should be understood that the foregoing embodiments are merely exemplary of the present invention, and the technical solutions of the embodiments can be arbitrarily combined and collocated without conflict between technical features and structures, and not departing from the purpose of the present invention.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and the actual implementation may have another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (10)

1. A video output card is applied to a card-inserting type video splicing processing device and comprises a switching back plate; wherein the video output card comprises:
the first connector is connected with the exchange backboard;
the processing chip is electrically connected with the first connector and comprises an Ethernet signal output pin; and
and the display screen loading module is electrically connected with the Ethernet signal output pin.
2. A video output card in accordance with claim 1, wherein said ethernet signal output pins comprise a media independent interface bus pin and a Serdes bus pin, said display screen loading module comprising:
the two optical ports are electrically connected with the Serdes bus pins;
the Ethernet PHY chip set is electrically connected with the media independent interface bus pin; and
sixteen Ethernet interfaces electrically connected with the Ethernet PHY chip group.
3. The video out card of claim 2, wherein the ethernet PHY chipset comprises two first ethernet PHY chips, each of the first ethernet PHY chips being connected to eight of the sixteen ethernet interfaces, respectively; or
The Ethernet PHY chip group comprises sixteen second Ethernet PHY chips which are respectively connected with the sixteen Ethernet interfaces in a one-to-one correspondence mode.
4. The video output card of claim 1, wherein said ethernet signal output pin is an MDI pin; the display screen loading module comprises:
twenty Ethernet interfaces which are respectively and electrically connected with the MDI pins.
5. A video output card in accordance with claim 1, wherein said ethernet signal output pin is a media independent interface bus pin; the display screen loading module comprises:
the Ethernet PHY chip set is electrically connected with the media independent interface bus pin; and
twenty Ethernet interfaces electrically connected with the Ethernet chip set.
6. The video output card of claim 5, wherein the Ethernet PHY chipset comprises three first Ethernet PHY chips respectively connected to eight Ethernet interfaces, and four Ethernet interfaces of the twenty Ethernet interfaces; or
The Ethernet PHY chip group comprises twenty second Ethernet PHY chips which are respectively connected with the twenty Ethernet interfaces in a one-to-one correspondence manner.
7. A video output card according to claim 1, wherein said ethernet signal output pin is an SGMII pin; the display screen loading module comprises:
twenty optical ports are respectively and electrically connected with the SGMII pin.
8. A video output card in accordance with claim 1, wherein said ethernet signal output pin is a media independent interface bus pin; the display screen loading module comprises:
the Ethernet PHY chip set is electrically connected with the media independent interface bus pin; and
twenty optical ports electrically connected with the Ethernet chip set.
9. The video out card of claim 8, wherein the ethernet PHY chipset comprises three first ethernet PHY chips respectively connected to eight, and four of the twenty optical ports; or
The Ethernet PHY chip group comprises twenty second Ethernet PHY chips which are respectively connected with the twenty optical ports in a one-to-one correspondence manner.
10. A card-inserted video stitching processing apparatus, comprising:
the exchange back plate is provided with a second connector;
the video input card is electrically connected with the exchange back plate;
a video output card as claimed in any one of claims 1 to 9, said second connector being electrically connected through said first connector to said switching backplane.
CN202022764554.2U 2020-11-25 2020-11-25 Video output card and card insertion type video splicing processing equipment Active CN213586010U (en)

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Application Number Priority Date Filing Date Title
CN202022764554.2U CN213586010U (en) 2020-11-25 2020-11-25 Video output card and card insertion type video splicing processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202022764554.2U CN213586010U (en) 2020-11-25 2020-11-25 Video output card and card insertion type video splicing processing equipment

Publications (1)

Publication Number Publication Date
CN213586010U true CN213586010U (en) 2021-06-29

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Application Number Title Priority Date Filing Date
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