CN212278332U - Backboard and card-inserting type video processing equipment - Google Patents

Backboard and card-inserting type video processing equipment Download PDF

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Publication number
CN212278332U
CN212278332U CN202020426298.3U CN202020426298U CN212278332U CN 212278332 U CN212278332 U CN 212278332U CN 202020426298 U CN202020426298 U CN 202020426298U CN 212278332 U CN212278332 U CN 212278332U
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signal pin
connector
card
pin area
video
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任江
刘荣学
周晶晶
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Xian Novastar Electronic Technology Co Ltd
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Xian Novastar Electronic Technology Co Ltd
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Abstract

The embodiment of the utility model discloses backplate and plug-in card formula video processing equipment, the backplate for example includes: a plurality of mixed slots, each mixed slot comprising: a first signal pin area, a second signal pin area and a third signal pin area which are mutually spaced; the first signal pin area and the second signal pin area are combined and connected with a video input card in the card-inserting type video processing equipment, and the first signal pin area and the third signal pin area are combined and connected with a video output card in the card-inserting type video processing equipment. The embodiment of the utility model provides a mix the slot position in the backplate disclosed and both can connect the video input card and also can connect the video output card, realize the form that video input card and video output card mixed the insertion, satisfy the customer requirement in a flexible way.

Description

Backboard and card-inserting type video processing equipment
Technical Field
The utility model relates to a show technical field, especially relate to a backplate and a card insertion type video processing equipment.
Background
The slot position of the back plate in the traditional card-inserting type video processing equipment is often fixed, namely the back plate is provided with a slot position fixedly connected with a video input card, a slot position fixedly connected with a video output card and a slot position fixedly connected with a main control card, wherein the quantity of each slot position is fixed, the slot position fixedly connected with the video input card can not be connected with the video output card, and the slot position fixedly connected with the video output card can not be connected with the video input card. Therefore, under the conditions that the required quantity of the video input cards is large and the required quantity of the video output cards is small, or the required quantity of the video output cards is large and the required quantity of the video input cards is small, the slot position corresponding to the video input card (or the video output card) is free due to the fact that the slot position connected with the video input card cannot be connected with the video output card and the slot position connected with the video output card cannot be connected with the video input card, and the slot position corresponding to the video output card (or the video input card) is not enough, the customer requirements cannot be met, and the flexibility and the market competitiveness of the product are reduced.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a backplate and plug-in card formula video processing equipment can solve above-mentioned current relevant technical scheme's not enough, realizes that the mixed draw-in groove position of backplate can support the form that video input card and video output card mixed and insert, satisfies the customer requirement in a flexible way.
Specifically, the embodiment of the utility model provides a backplate is applicable to card insertion type video processing equipment, card insertion type video processing equipment includes video input card and video output card, the backplate includes: a plurality of mixed slots, each mixed slot comprising: a first signal pin area, a second signal pin area and a third signal pin area which are mutually spaced; the first signal pin area and the second signal pin area are connected with the video input card in a combined mode, and the first signal pin area and the third signal pin area are connected with the video output card in a combined mode.
The slot position of the back plate in the traditional card-inserting type video processing equipment is often fixed, under the conditions that the required quantity of video input cards is large, the required quantity of video output cards is small, or the required quantity of video output cards is large, and the required quantity of video input cards is small, the slot position connected with the video input card can not be connected with the video output card and the slot position connected with the video output card can not be connected with the video input card, so that the slot position corresponding to the video input card (or the video output card) is free, and the slot position corresponding to the video output card (or the video input card) is not enough, so that the requirement of a client can not be met, and the flexibility and the market competitiveness of a product are reduced; the embodiment of the utility model discloses mix slot position in backplate includes the first signal pin district of mutual interval, second signal pin district and third signal pin district, video input card can be connected in first signal pin district and the combination of second signal pin district, video output card can be connected in the combination of first signal pin district and third signal pin district, video input card also can be connected to same mixing slot position promptly, realize the form that video input card and video output card mixed the inserting, customer requirement to video input card and video output card quantity in the satisfying practical application that can be nimble, satisfy customer's requirement, improve the flexibility ratio and the market competition of product.
In an embodiment of the present invention, the plurality of mixed slots include a first mixed slot, the first mixed slot includes a fourth connector, and the first signal pin area, the second signal pin area and the third signal pin area are located on the same first connector.
In an embodiment of the present invention, the plurality of mixed slots include a second mixed slot, the second mixed slot includes a fifth connector and a sixth connector which are adjacent to each other, the first signal pin area is located on the fifth connector, and the second signal pin area and the third signal pin area are located on the sixth connector which is different from the fifth connector.
In an embodiment of the present invention, the plurality of mixed slots include a third mixed slot, the third mixed slot includes a first connector, a second connector and a third connector adjacent to each other, the first signal pin area is located on the first connector, the second signal pin area is located on the second connector different from the first connector, and the third signal pin area is located on the third connector different from the first connector and the second connector.
In an embodiment of the present invention, the first mixed slot is provided with a fool-proof structure, and the fool-proof structure is located outside the first connector.
In an embodiment of the present invention, the fool-proof structure is a circular groove.
In an embodiment of the present invention, the first signal pin area includes: the circuit comprises a power supply signal pin, a hot plug signal pin, a reset signal pin, a clock signal pin, a hundred meganet signal pin and a GPIO pin.
In an embodiment of the present invention, the second signal pin area includes: a plurality of first SerDes pins, the third signal pin region comprising: a plurality of second SerDes pins; and/or the first connector, the second connector and the third connector each have 40 pins.
In one embodiment of the present invention, the second signal pin area is disposed between the first signal pin area and the third signal pin area; or the third signal pin area is arranged between the first signal pin area and the second signal pin area.
Furthermore, an embodiment of the present invention provides a card insertion type video processing device, including: a backsheet as in any one of the preceding; the master control card is connected with the master control slot position of the backboard; the video output card is connected with the first signal pin area and the second signal pin area of any one of the mixed insertion slot positions of the backboard; and the video input card is connected with the first signal pin area and the second signal pin area of any other one of the mixed insertion slot positions of the backboard.
The technical scheme in the embodiment has the following advantages or beneficial effects: the same mixed insertion slot position in the back plate can be connected with a video input card and also can be connected with a video output card, the mixed insertion form of the video input card and the video output card is realized, the use requirements of customers on the number of the video input card and the video output card in practical application can be flexibly met, the customer requirements are met, and the flexibility and the market competitiveness of products are improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1a is a schematic structural diagram of a back plate disclosed in the first embodiment of the present invention.
Fig. 1b is a schematic structural diagram of a hybrid slot in the backplane shown in fig. 1 a.
Fig. 2 is a schematic structural diagram of the first signal pin area in the hybrid slot shown in fig. 1 b.
Fig. 3a and 3b are schematic structural diagrams of a second signal pin region and a third signal pin region in the mixed slot shown in fig. 1b, respectively.
Fig. 4 is a schematic structural view of a first mixed slot in a backplane according to a first embodiment of the present invention.
Fig. 5 is another schematic structural diagram of the first mixed slot in the backplane disclosed in the first embodiment of the present invention.
Fig. 6 is a schematic structural view of a second mixed slot in a backplane according to the first embodiment of the present invention.
Fig. 7 is a schematic structural view of a third mixed slot in a backplane according to the first embodiment of the present invention.
Fig. 8 is a schematic structural diagram of a card-insertion type video processing device according to a second embodiment of the present invention.
Fig. 9 is a schematic diagram of a structure of a main control card in the card-inserted video processing device shown in fig. 8.
Fig. 10 is a schematic diagram showing a structure of a video input card in the card-insertion type video processing device shown in fig. 8.
Fig. 11 is a schematic diagram showing a structure of a video output card in the card-insertion type video processing apparatus shown in fig. 8.
Fig. 12 is a schematic view showing another structure of a video output card in the card-insertion type video processing apparatus shown in fig. 8.
Fig. 13 is a schematic diagram of a pin connection between a gigabit PHY chip and an FPGA according to a second embodiment of the present invention.
[ brief description of the drawings ]
10: a back plate; 11: a mixed slot position; 111: a first signal pin area; 112: a second signal pin area; 113: a third signal pin area; 1111: a power signal pin; 1112: a hot plug signal pin; 1113: a reset signal pin; 1114: a clock signal pin; 1115: a hundred million network signal pin; 1116: a GPIO signal pin; 1121: a first SerDes pin; 1131: a second SerDes pin; 101: a first connector; 102: a second connector; 103: a third connector; 104: a fool-proof structure; 105: a fourth connector; 106: a fifth connector; 107: a sixth connector;
30: a card-insertion type video processing device; 31: a back plate; 311: a master control slot position; 312: a mixed slot position; 3121: a first signal pin area; 3122: a second signal pin area; 3123: a third signal pin area; 32: a master control card; 321: an ARM processor; 322: a programmable logic device; 323: a memory; 324: a connector; 33: a video input card; 331: a video source input interface; 332: a programmable logic device; 333: a microcontroller; 334a, 334 b: a connector; 34: a video output card; 341a, 341 b: a connector; 342: a programmable logic device; 343: a microcontroller; 344: a video source output interface; 345: a programmable logic device; 346: a network PHY chip; 347: a network transformer; 348: an Ethernet interface; 349: an optical module; 350: an optical fiber interface.
Detailed Description
It should be noted that, in the present invention, the embodiments and features of the embodiments may be combined with each other without conflict. The invention will be described with reference to the accompanying drawings in conjunction with embodiments.
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be noted that the division of the embodiments in the present invention is only for convenience of description and should not be construed as a limitation, and features in various embodiments may be combined and referred to each other without contradiction.
[ first embodiment ] A method for manufacturing a semiconductor device
Referring to fig. 1a and 1b, a first embodiment of the present invention discloses a backplane suitable for use in a card-insertable video processing device, wherein the card-insertable video processing device includes, for example, a video input card and a video output card. As shown in fig. 1a, the back plate 10 includes, for example: a plurality of hybrid slots 11. Fig. 1a illustrates four hybrid slots 11, but the present invention is not limited thereto.
As shown in fig. 1b, each hybrid slot 11 includes, for example: a first signal pin area 111, a second signal pin area 112, and a third signal pin area 113 spaced apart from each other. The first signal pin area 111 and the second signal pin area 112 are connected to a video input card, and the first signal pin area 111 and the third signal pin area 113 are connected to a video output card. The spacing therebetween is understood to mean that a blank area, i.e., an area without leads, is left between the first signal lead area 111, the second signal lead area 112, and the third signal lead area 113.
Further, the second signal pin area 112 is disposed between the first signal pin area 111 and the third signal pin area 113, or the third signal pin area 113 is disposed between the first signal pin area 111 and the second signal pin area 112.
Further, as shown in fig. 2, the first signal pin area 111 includes, for example: a power signal pin 1111, a hot plug signal pin 1112, a reset signal pin 1113, a clock signal pin 1114, a hundred mega grid signal pin 1115 and a GPIO pin 1116 which are arranged at intervals. It should be noted that the power signal pin 1111, the hot plug signal pin 1112, the reset signal pin 1113, the clock signal pin 1114, the tera signal pin 1115 and the GPIO pin 1116 are all low-speed signal pins, so the first signal pin area 111 can be understood as a low-speed signal pin area, and these low-speed signal pins are commonly used by the video input card and the video output card.
Further, as shown in fig. 3a, the second signal pin area 112 includes, for example: a plurality of first SerDes pins 1121. As shown in fig. 3b, the third signal pin area 113 includes, for example: a plurality of second SerDes pins 1131. It should be noted that the first SerDes pin 1121 and the second SerDes pin 1131 are both high-speed signal pins, and the first SerDes pin 1121 corresponds to a pin connected to a video input card for transmitting image data, and the second SerDes pin 1131 corresponds to a pin connected to a video output card for transmitting image data.
In prior art, the trench of backplate is fixed, connects the trench of video input card promptly and can only connect the video input card, and the trench of connecting the video output card can only connect the video output card, the embodiment of the utility model provides an in 11 equipment of mixed slot position of backplate 10 be three signal pin district: the mixed insertion slot comprises a first signal pin area 111, a second signal pin area 112 and a third signal pin area 113, wherein signal pins shared by a video input card and a video output card are arranged in the first signal pin area 111, pins for transmitting image data of the video input card are arranged in the second signal pin area 112, and pins for transmitting image data of the video output card are arranged in the third signal pin area 113, so that the mixed insertion slot 11 can be connected with the video input card, and the video output card can be connected when the video input card is not connected, and the mixed insertion of the video input card and the video output card is realized.
Further, as shown in fig. 4, the plurality of mixed slot 11 includes, for example, a first mixed slot 11a, the first mixed slot 11a includes, for example, a fourth connector 105, and the first signal pin area 111, the second signal pin area 112, and the third signal pin area 113 are located on the same fourth connector 105. That is, when the number of required signal lines is small, the first signal pin area 111, the second signal pin area 112, and the third signal pin area 113 are disposed on the same connector, and the first mixed slot 11a corresponds to one connector, so that the number of connectors disposed on the backplane 10 is reduced, and the cost is saved.
Specifically, the video input card or the video output card is generally provided with two connectors, one connector is used for transmitting image data, the other connector is used for transmitting low-speed signals, when the video input card or the video output card is connected with the first mixed insertion slot 11a of the backplane 10, the connector used for transmitting the low-speed signals by the video input card or the video output card is connected with the first signal pin area 111 of the fourth connector 105, and the connector used for transmitting the image data is correspondingly connected with the second signal pin area 112 or the third signal pin area 113 of the fourth connector 105.
Further, as shown in fig. 5, the first mixed slot 11a is provided with a fool-proof structure 104, for example, and the fool-proof structure 104 is located outside the fourth connector 105, for example. By arranging the fool-proof structure 104, the wrong insertion position of the video input card or the video output card when the connector of the video input card or the video output card is inserted into the first mixed insertion slot 11a of the backplane 10 can be prevented, and the accuracy of the video input card or the video output card when the connector of the video input card or the video output card is connected with the first mixed insertion slot 11a of the backplane 10 is improved.
Further, the fool-proof structure 104 is, for example, a circular groove, and a protrusion is disposed on the connector of the corresponding video input card or video output card to match the circular groove. It should be noted that, in this embodiment, the specific position of the fool-proof structure 104 in the first mixed slot 11a is not limited, and it may be located on the upper side shown in fig. 5, or may be located in the lower side or the areas on both sides, and of course, the number of the fool-proof structures 104 is, for example, 1, and may be set as many as necessary.
Further, as shown in fig. 6, the plurality of mixed slot positions 11 includes, for example, a second mixed slot position 11b, the second mixed slot position 11b includes, for example, a fifth connector 106 and a sixth connector 107 which are adjacent to each other, the first signal pin area 111 is located on the fifth connector 106, and the second signal pin area 112 and the third signal pin area 113 are located on the sixth connector 107 which is different from the fifth connector 106. It is understood that when the number of signal lines is large and the number of connector pins is limited, the high-speed signal and the low-speed signal can be respectively placed in different connectors based on cost considerations, i.e., the first signal pin area 111 is located in the fifth connector 106, and the second signal pin area 112 and the third signal pin area are located in the sixth connector 107.
Specifically, the video input card or the video output card is generally provided with two connectors, one connector is used for transmitting image data, the other connector is used for transmitting low-speed signals, when the video input card or the video output card is connected with the second mixed insertion slot 11b of the backplane 10, the connector used for transmitting low-speed signals of the video input card or the video output card is connected with the fifth connector 106, and the connector used for transmitting image data is correspondingly connected with the second signal pin area 112 or the third signal pin area 113 of the sixth connector 107. After the video input card or the video output card is connected to the backplane, the main control card connected to the backplane can communicate with the MCU of the video input card or the video output card through the GPIO pin in the first signal pin area 111 to read the corresponding ID information, so that the main control card can determine whether the daughter card connected to the backplane is a video input card or a video output card according to the ID information, and can determine the type of the daughter card connected to the backplane.
Further, as shown in fig. 7, the plurality of mixed slot positions 11 includes, for example, a third mixed slot position 11c, the third mixed slot position 11c includes, for example, a first connector 101, a second connector 102, and a third connector 103 adjacent to each other, the first signal pin area 111 is located on the first connector 101, the second signal pin area 112 is located on the second connector 102 different from the first connector 101, and the third signal pin area 113 is located on the third connector 103 different from the first connector 101 and the second connector 102. It is understood that when the number of high-speed signal pins is large and the number of connectors cannot meet the requirement, three different signal pin areas, i.e., the first signal pin area 111, the second signal pin area 112, and the third signal pin area 113, are disposed on different connectors.
Specifically, the video input card or the video output card is generally provided with two connectors, one connector is used for transmitting image data, the other connector is used for transmitting low-speed signals, when the video input card is to be connected with the third mixed slot position 11c of the backplane 10, the connector used by the video input card for transmitting low-speed signals is connected with the first connector 101, and the connector used by the video input card for transmitting image data is connected with the second connector 102. When a video output card is to be connected to the third shuffle slot 11c of the backplane 10, the connector for the video output card to transmit low-speed signals is connected to the first connector 101, and the connector for the video output card to transmit image data is connected to the third connector 103. After the video input card or the video output card is connected to the backplane, the main control card connected to the backplane may communicate with the MCU of the connected daughter card through the GPIO pin in the first signal pin zone 111 of the first connector 101, and read the corresponding ID information, so that the main control card may determine whether the daughter card connected to the backplane is a video input card or a video output card according to the ID information, and may determine the type of the daughter card connected to the backplane.
It should be noted that the aforementioned first mixed slot 11a, second mixed slot 11b, and third mixed slot 11c may be set according to actual needs, and the backplane 10 includes, for example, any one or any combination of the first mixed slot 11a, the second mixed slot 11b, and the third mixed slot 11 c.
Further, the first connector 101, the second connector 102, and the third connector 103 each have, for example, 40 pins. Only one connector may be provided when there are fewer signal lines, for example, less than 40. When there are more signal lines, for example, more than 40, two, three or more connectors may be provided as necessary. Of course, the number of pins of the connector is not limited to 40, and when the number of pins is large, the number of idle pins and ground pins may be increased appropriately.
The first connector 101, the second connector 102, and the third connector 103 are, for example, female connectors, and the connectors included in the video input card and the video output card are pin header connectors, respectively.
The pin header connector mentioned herein is, for example, a simple ox horn pin header connector, which is abbreviated as "simple ox" connector and consists of a square plastic socket and a plurality of regularly arranged square pins. The video input card mentioned is, for example, a daughter card that inputs a video source to the card-insertion video processing apparatus, and the video output card mentioned is, for example, a daughter card that outputs a video source from the card-insertion video processing apparatus.
In addition, the backplane 10 further includes a module for data exchange, such as a matrix switch chip, for example, a Crosspoint chip, which is a mimo matrix switch chip using SerDes communication channels.
To sum up, the utility model discloses the same mixed slot position both can connect the video input card and also can connect the video output card in the backplate that the first embodiment is disclosed, realizes the form that video input card and video output card mixed and insert, and customer to the operation requirement of video input card and video output card quantity in satisfying practical application that can be nimble satisfies the customer requirement, improves the flexibility ratio and the market competition of product.
[ second embodiment ]
Referring to fig. 8, a second embodiment of the present invention discloses a card-insertion type video processing apparatus. As shown in fig. 8, the card-inserted video processing device 30 includes, for example: a back panel 31, a host card 32, a video input card 33, and a video output card 34. Fig. 8 illustrates a video input card 33 and a video output card 34, but the present invention is not limited thereto, and the number of the video input card 33 and the video output card 34 may be set according to actual needs.
Specifically, the host card 32 is connected to the host slot 311 of the backplane 31. The video output card 34 is connected to the first signal pin area 3121 and the second signal pin area 3122 of any one of the plurality of mix slot slots 312 of the backplane 31. The video input card 35 is connected to the first signal pin area 3121 and the second signal pin area 3123 of any other one of the plurality of mix slot slots 312 of the backplane 31.
The backplane 31 is, for example, the backplane 10 disclosed in the foregoing first embodiment, the mixed slot 312 is the mixed slot 11 mentioned in the first embodiment, and the first signal pin area 3121, the second signal pin area 3122, and the third signal pin area 3123 are the first signal pin area 111, the second signal pin area 112, and the third signal pin area 113 mentioned in the first embodiment. For a detailed description of the back plate 31, reference may be made to the foregoing first embodiment, and for brevity, no further description is provided herein.
The card-insertion type video processing device 30 disclosed in the present embodiment is, for example, a card-insertion type device having a video processing function, such as a video processor, a video splicer, or the like.
Further, as shown in fig. 9, the main control card 32 includes, for example: ARM processor 321, programmable logic device 322, memory 323, and connector 324. The programmable logic device 322 is connected to the ARM processor 321. Memory 323 is coupled to ARM processor 321 and programmable logic device 322. The connector 324 connects the ARM processor 321 and the programmable logic device 322, and the connector 324 is also connected to the master socket 311.
Further, as shown in fig. 10, the video input card 33 includes, for example: a video source input interface 331, a programmable logic device 332, a microcontroller 333, and connectors 334a, 334 b. The programmable logic device 332 is connected to the video source input interface 331. The microcontroller 333 is connected to the programmable logic device 332. Connectors 334a and 334b connect programmable logic device 332 and microcontroller 333. Where the connector 334a is, for example, a connector for transmitting low-speed signals, and the connector 334b is, for example, a connector for transmitting image data, the connector 334a is connected to the first signal pin area 3121, and the connector 334b is connected to the second signal pin area 3122.
Further, as shown in fig. 11, the video input card 34 includes, for example, a connector 341a, a connector 341b, a programmable logic device 342, a microcontroller 343, and a video source output interface 344. The programmable logic device 342 is connected to the microcontroller 343 and the video source output interface 344, and the connectors 341a and 341b are connected to the programmable logic device 342 and the microcontroller 343. Where the connector 341a is, for example, a connector for transmitting a low-speed signal, and the connector 341b is, for example, a connector for transmitting image data, the connector 341a is connected to the first signal pin area 3121, and the connector 341b is connected to the third signal pin area 3123.
Further, the video output card 34 may also be a two-in-one output card, as shown in fig. 12, the video output card 34 includes, for example: connector 341a, connector 341b, programmable logic device 342, microcontroller 343, programmable logic device 345, network PHY chip 346, network transformer 347, ethernet interface 348, optical module 349, and fiber optic interface 350.
The programmable logic device 342 is connected with the microcontroller 343 and the video source output interface 344, the connector 341a and the connector 341b are connected with the programmable logic device 342 and the microcontroller 343, the programmable logic device 345 is connected with the programmable logic device 342, the network PHY chip 346 is connected with the programmable logic device 345, the network transformer 347 is connected with the network PHY chip 346, the ethernet interface 348 is connected with the network transformer 347, the optical module 349 is connected with the programmable logic device 345, and the optical fiber interface 350 is connected with the optical module 349. Where the connector 341a is, for example, a connector for transmitting a low-speed signal, and the connector 341b is, for example, a connector for transmitting image data, the connector 341a is connected to the first signal pin area 3121, and the connector 341b is connected to the third signal pin area 3123.
Specifically, the aforementioned Programmable logic devices 322, 332, 342 and 345 are, for example, FPGAs (Field-Programmable Gate arrays) or other similar logic devices. For example, the model number of the FPGA is 410TFFG900, for example. The Microcontroller 343 and the Microcontroller 333 are, for example, an MCU (Microcontroller Unit), also called a Single Chip Microcomputer (Single Chip Microcomputer) or a Single Chip Microcomputer; or other microprocessors with certain data processing and computing capabilities, such as ARM processors and DSP processors, for example, of the type STM32F 207. The memory 323 is, for example, a DDR memory. The connectors 324, 334a, 334b, 341a and 341b are, for example, pin header connectors, such as simple pin header connectors, which are simply called "simple" connectors, and are composed of square plastic sockets and a plurality of regularly arranged square pins, and of course, other types of connectors are also possible. The video source input interface 331 and the video source output interface 344 are, for example, HDMI interfaces, DVI interfaces, SDI interfaces, DP interfaces, or the like. Network PHY chip 346 is, for example, a hundred mega network PHY chip model such as LAN8720 or LAN8211, where the pin connections of LAN8211 to programmable logic device 345, such as an FPGA, can be seen in fig. 13. Ethernet interface 348 is, for example, a hundred megabyte or gigabit port, such as an RJ45 port. The optical module 349 is, for example, an SFP optical module. The fiber optic interface 350 is, for example, a 10G fiber optic interface, a 20G fiber optic interface, or a 40G fiber optic interface.
It should be noted that the difference between the video output card shown in fig. 11 and the video output card shown in fig. 12 is that the video output card shown in fig. 12 can be directly connected to the LED display screen, and the video output card shown in fig. 11 needs to be connected to the sending card in order to connect to the LED display screen. The mentioned LED display screen includes, for example, a display control card and an LED display screen body connected to the display control card, where the display control card is also called as a receiving card or a scanning card in the LED display screen control system.
To sum up, the utility model discloses the same mixed draw-in groove position on the backplate among the card insertion type video processing equipment that the second embodiment discloses both can connect the video input card and also can connect the video output card, realizes the form that video input card and video output card mixed and insert, and customer to the operation requirement of video input card and video output card quantity in the satisfying practical application that can be nimble satisfies the customer requirement, improves the flexibility ratio and the market competition of product.
In the several embodiments provided in the present disclosure, it should be understood that the disclosed system, apparatus, and method may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and the actual implementation may have another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (10)

1. A backplane adapted for use with a card-insertable video processing device, the card-insertable video processing device including a video input card and a video output card, the backplane comprising:
a plurality of mixed slots, each mixed slot comprising: a first signal pin area, a second signal pin area and a third signal pin area which are mutually spaced; the first signal pin area and the second signal pin area are connected with the video input card in a combined mode, and the first signal pin area and the third signal pin area are connected with the video output card in a combined mode.
2. The backplane of claim 1, wherein the plurality of mixed slot locations comprises a first mixed slot location comprising a fourth connector, the first signal pin field, the second signal pin field, and the third signal pin field being located on the same fourth connector.
3. The backplane of claim 1, wherein the plurality of hybrid slots comprises a second hybrid slot comprising adjacent fifth and sixth connectors, the first signal pin field being located on the fifth connector, the second and third signal pin fields being located on the sixth connector different from the fifth connector.
4. The backplane of claim 1, wherein the plurality of hybrid slots comprises a third hybrid slot comprising a first connector, a second connector, and a third connector adjacent to each other, the first signal pin field being located on the first connector, the second signal pin field being located on the second connector different from the first connector, and the third signal pin field being located on the third connector different from the first connector and the second connector.
5. The backplane according to claim 2, wherein the first mixed slot is provided with a fool-proof structure, and the fool-proof structure is located outside the first connector.
6. The backplate of claim 5, wherein the fool-proofing structure is a circular groove.
7. The backplane of claim 1, wherein the first signal pin field comprises: the circuit comprises a power supply signal pin, a hot plug signal pin, a reset signal pin, a clock signal pin, a hundred meganet signal pin and a GPIO pin.
8. The backplane of claim 4, wherein the second signal pin field comprises: a plurality of first SerDes pins, the third signal pin region comprising: a plurality of second SerDes pins; and/or
The first connector, the second connector and the third connector each have 40 pins.
9. The backplane of claim 1, wherein the second signal pin field is disposed between the first signal pin field and the third signal pin field; or
The third signal pin area is arranged between the first signal pin area and the second signal pin area.
10. A card-insertion type video processing apparatus, comprising:
the backing sheet of any one of claims 1-9;
the master control card is connected with the master control slot position of the backboard;
the video output card is connected with the first signal pin area and the second signal pin area of any one of the mixed insertion slot positions of the backboard;
and the video input card is connected with the first signal pin area and the second signal pin area of any other one of the mixed insertion slot positions of the backboard.
CN202020426298.3U 2020-03-27 2020-03-27 Backboard and card-inserting type video processing equipment Active CN212278332U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202020426298.3U CN212278332U (en) 2020-03-27 2020-03-27 Backboard and card-inserting type video processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202020426298.3U CN212278332U (en) 2020-03-27 2020-03-27 Backboard and card-inserting type video processing equipment

Publications (1)

Publication Number Publication Date
CN212278332U true CN212278332U (en) 2021-01-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202020426298.3U Active CN212278332U (en) 2020-03-27 2020-03-27 Backboard and card-inserting type video processing equipment

Country Status (1)

Country Link
CN (1) CN212278332U (en)

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