CN110708324A - Method and system for realizing point-to-point communication between FPGA (field programmable Gate array) board cards - Google Patents
Method and system for realizing point-to-point communication between FPGA (field programmable Gate array) board cards Download PDFInfo
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- CN110708324A CN110708324A CN201910971317.2A CN201910971317A CN110708324A CN 110708324 A CN110708324 A CN 110708324A CN 201910971317 A CN201910971317 A CN 201910971317A CN 110708324 A CN110708324 A CN 110708324A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/26—Special purpose or proprietary protocols or architectures
Abstract
The invention relates to the field of FPGA application, and particularly provides a method and a system for realizing point-to-point communication between FPGA boards. Compared with the prior art, the method for realizing the point-to-point communication between the FPGA boards comprises the steps that the plurality of FPGA boards and the FPGA data exchange module are arranged in the PXI/PXIE case, the plurality of FPGA boards are connected with the FPGA data exchange module through signals, and the point-to-point communication and data transmission between the FPGA data exchange module and the FPGA boards are realized by formulating a private communication protocol between the FPGA boards and the FPGA data exchange module. The characteristics of transferring and transmitting by using the FPGA data exchange module are utilized, the data communication and transmission efficiency is improved, and the method has good popularization value.
Description
Technical Field
The invention relates to the field of FPGA application, and particularly provides a method and a system for realizing point-to-point communication between FPGA boards.
Background
With the increasingly wide application field of FPGA chips, more and more application scenes are provided, some scenes need a plurality of FPGA board cards to work in a cooperative mode, and particularly more requirements are required for the function among multi-slot complete machine systems.
In the prior art, communication and data transmission between boards in a PXI/PXIE-based chassis are performed based on a PCIE bus, but since PCIE bus equipment can only be used as slave equipment, the slave equipment cannot directly perform communication and data transmission, and transfer needs to be performed through a host, communication efficiency is greatly reduced, and the host can recognize that the number of the slave equipment is limited, so that cascade communication between a few chassis can be realized only during cascade communication of the chassis. How to solve the problems in the prior art is a problem to be solved urgently by the technical personnel in the field.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a system for realizing point-to-point communication between FPGA board cards, which has reasonable design and is safe and applicable.
The invention further aims to provide a method which is strong in practicability and can realize point-to-point communication between FPGA board cards.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a plurality of FPGA board cards and FPGA data exchange modules are arranged in a PXI/PXIE case, signal connection is arranged between each FPGA board card and each FPGA data exchange module, and point-to-point communication and data transmission between each FPGA data exchange module and each FPGA board card are achieved by formulating a private communication protocol between each FPGA board card and each FPGA data exchange module.
Preferably, the FPGA data exchange module is in signal connection with the FPGA board card through a GTH/GTX signal channel.
Furthermore, a plurality of GTH/GTX signal channels are arranged on the FPGA board cards, and each GTH/GTX signal is connected with the FPGA data exchange module for mutual communication.
Furthermore, the FPGA data exchange module is a data exchange board card of a PXI/PXIE bus of the FPGA designed based on the FPGA board card, and a GTH/GTX signal channel is arranged in the data exchange board card and is communicated with the GTH/GTX signal channel in the FPGA board card.
Furthermore, the data exchange board card is also provided with two external GTH/GTX communication interfaces for connecting with other external PXI/PXIE chassis to realize the cascade connection between different chassis.
Further, formulating a private communication protocol meeting the requirements, wherein the private communication protocol comprises a data frame header, a transmitted data format and content, a verification method and a data frame tail format;
the data frame head also comprises a case number and a single in-case board card slot number besides a data starting mark, and the data frame head is used for judging whether the communication is the current time or not and responding by the target board card according to the case number and the slot number.
A point-to-point communication system among FPGA board cards is provided, wherein each PXI/PXIE case comprises a plurality of FPGA board cards and a data exchange board card, and a private communication protocol is arranged between the FPGA board cards and the data exchange board cards;
the FPGA board card is provided with a plurality of GTH/GTX signal channels, the data exchange board card pair is internally provided with the GTH/GTX signal channels, the data exchange board card is also provided with two external GTH/GTX communication interfaces, and the GTH/GTX communication interfaces are used for being connected with the data exchange board cards in other PXI/PXIE cabinets. .
Preferably, the data exchange board card is designed based on an FPGA board card, and the FPGA board card is used for the PXI/PXIE bus of the FPGA.
Further, the private communication protocol refers to formulating a private communication protocol data frame format, including a data frame header, a transmitted data format and content, a verification method and a data frame tail format;
the data frame head also comprises a case number and a single in-case board card slot number besides a data starting mark, and the data frame head is used for judging whether the communication is the current time or not and responding by the target board card according to the case number and the slot number.
Compared with the prior art, the method and the system for realizing the point-to-point communication between the FPGA board cards have the following outstanding beneficial effects:
through the invention, the FPGA board cards in the chassis and among the chassis can directly realize point-to-point communication without depending on a system host to transfer communication data, thereby improving the data communication and transmission efficiency, saving the time and improving the working efficiency.
Meanwhile, as the PCIE communication mode is adopted in the prior art, PCIE equipment which can be identified by the host is limited by a bus protocol and a BIOS, and only a few cases can be cascaded.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of a system for implementing point-to-point communication between FPGA boards;
fig. 2 is a schematic structural diagram of a plurality of FPGA board cards connected to an FPGA data exchange board in a PXI/PXIE chassis according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific embodiments in order to better understand the technical solutions of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
A preferred embodiment is given below:
as shown in fig. 1 and 2, in the method for implementing point-to-point communication between FPGA boards in this embodiment, 5 FPGA boards and an FPGA data exchange module are arranged in a PXI/PXIE chassis, signal connection is provided between the 5 FPGA boards and the FPGA data exchange module, and point-to-point communication and data transmission between the FPGA data exchange module and the FPGA boards are implemented by formulating a private communication protocol between the FPGA boards and the FPGA data exchange module.
The number of the FPGA board cards which can be connected by each FPGA data exchange board is related to the number of the used FPGA chip GTH/GTX signal channels, the number of the connectable board cards is large due to the fact that the number of the FPGA chip GTH/GTX resources is large, and the number of the data exchange board cards which can be cascaded is related to the number of the reserved cascading function interfaces in design.
Wherein, the signal channel adopts GTH/GTX signal channel to complete transmission and exchange data. Both GTX and GTH are documented as UG476, so the basic structures of the two GTs are largely the same, but the highest line rate is slightly higher than GTX, which can improve the transmission efficiency.
And formulating a proprietary communication protocol meeting the requirements, wherein the proprietary communication protocol comprises a data frame header, a transmitted data format and content, a verification method and a data frame tail format. The data frame head also comprises a case number and a single in-case board card slot number besides a data starting mark, and the data frame head is used for judging whether the communication is the current time or not and responding by the target board card according to the case number and the slot number.
Each of the 5 FPGA board cards is provided with a plurality of GTH/GTX signal channels, and each GTH/GTX signal channel is communicated with the FPGA data exchange module.
The FPGA data exchange module is an FPGA data exchange board card of a PXI/PXIE bus of the FPGA designed based on the FPGA board card, a GTH/GTX signal channel is arranged in the data exchange board card pair, and the data exchange board card is also provided with two external GTH/GTX communication interfaces to finish data transmission and exchange. And only one FPGA data exchange board card is arranged in each PXI/PXIE case.
Two external GTH/GTX communication interfaces are also arranged on the FPGA data exchange board card and are used for being connected with other external PXI/PXIE chassis to realize the cascade connection among different chassis. The cascade connection of a plurality of PXI/PXIE machine boxes is realized, and the communication and data transmission are improved.
When the method is realized, the adopted system comprises 5 FPGA board cards and 1 FPGA data exchange board card for each PXI/PXIE case, and a private communication protocol is arranged between each FPGA board card and the FPGA data exchange board card;
a plurality of GTH/GTX signal channels are arranged in each FPGA board card, and the number of the GTH/GTX signal channels can be designed according to specific practical conditions. And a GTH/GTX signal channel is also arranged in the FPGA data exchange board card, two external GTH/GTX communication interfaces are also arranged outside the FPGA data exchange board card, and the GTH/GTX communication interfaces are used for being connected with the FPGA data exchange board cards in other PXI/PXIE cabinets, so that cascade connection of different cabinets can be realized. The device is connected with a plurality of PXI/PXIE boxes, and solves the problem that the prior art can only be cascaded and communicated with a few PXI/PXIE boxes.
The FPGA data exchange board card is designed based on the FPGA board card and is a data exchange board card of a PXI/PXIE bus of the FPGA.
In the traditional method, a host module is required to be inserted into a PXI/PXIE case I, the host module identifies other FPGA board cards in the PXI/PXIE case through a PCIE bus, the PXI/PXIE case is connected with other PXI/PXIE case through PCIE cables during cascade connection, and the host of the PXI/PXIE case I identifies PCIE devices in other PXI/PXIE case through the PCIE bus.
The private communication protocol refers to the formulation of a private communication protocol data frame format, including a data frame header, a transmitted data format and content, a verification method and a data frame tail format. The data frame head also comprises a case number and a single in-case board card slot number besides a data starting mark, and the data frame head is used for judging whether the communication is the current time or not and responding by the target board card according to the case number and the slot number.
The above embodiments are only specific cases of the present invention, and the scope of the present invention includes but is not limited to the above embodiments, and any suitable changes or substitutions that are consistent with the claims of the method and system for implementing peer-to-peer communication between FPGA boards and are made by those skilled in the art should fall within the scope of the present invention.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (9)
1. A method for realizing point-to-point communication among FPGA board cards is characterized by comprising the following steps: the method comprises the steps that a plurality of FPGA board cards and FPGA data exchange modules are arranged in a PXI/PXIE case, signal connection is arranged between each FPGA board card and each FPGA data exchange module, and point-to-point communication and data transmission between the FPGA data exchange modules and the FPGA board cards are achieved by formulating a private communication protocol between the FPGA board cards and the FPGA data exchange modules.
2. The method for realizing point-to-point communication among FPGA boards according to claim 1, characterized in that: the FPGA data exchange module is in signal connection with the FPGA board card through a GTH/GTX signal channel.
3. The method for realizing point-to-point communication among FPGA boards according to claim 2, characterized in that: and a plurality of GTH/GTX signal channels are arranged on the FPGA board cards, and each GTH/GTX signal is connected with the FPGA data exchange module for mutual communication.
4. The method for realizing point-to-point communication among FPGA boards according to claim 3, characterized in that: the FPGA data exchange module is a data exchange board card of a PXI/PXIE bus of the FPGA designed based on the FPGA board card, and a GTH/GTX signal channel is arranged in the data exchange board card and is communicated with the GTH/GTX signal channel in the FPGA board card.
5. The method for realizing point-to-point communication among FPGA boards according to claim 4, characterized in that: the data exchange board card is also provided with two external GTH/GTX communication interfaces for connecting with other external PXI/PXIE chassis to realize the cascade connection among different chassis.
6. The method for realizing point-to-point communication among FPGA boards according to claim 5, characterized in that: formulating a private communication protocol meeting requirements, wherein the private communication protocol comprises a data frame header, a transmitted data format and content, a verification method and a data frame tail format;
the data frame head also comprises a case number and a single in-case board card slot number besides a data starting mark, and the data frame head is used for judging whether the communication is the current time or not and responding by the target board card according to the case number and the slot number.
7. The utility model provides a realize point-to-point communication system between FPGA integrated circuit board which characterized in that: each PXI/PXIE case comprises a plurality of FPGA board cards and a data exchange board card, and a private communication protocol is arranged between the FPGA board cards and the data exchange board cards;
the FPGA board card is provided with a plurality of GTH/GTX signal channels, the data exchange board card pair is internally provided with the GTH/GTX signal channels, the data exchange board card is also provided with two external GTH/GTX communication interfaces, and the GTH/GTX communication interfaces are used for being connected with the data exchange board cards in other PXI/PXIE cabinets.
8. The system for realizing point-to-point communication among FPGA boards according to claim 8, characterized in that: the data exchange board card is designed based on the FPGA board card and is used for a PXI/PXIE bus of the FPGA.
9. The system for realizing point-to-point communication among FPGA boards according to claim 9, characterized in that: the private communication protocol refers to formulating a private communication protocol data frame format, including a data frame head, a transmitted data format and content, a verification method and a data frame tail format;
the data frame head also comprises a case number and a single in-case board card slot number besides a data starting mark, and the data frame head is used for judging whether the communication is the current time or not and responding by the target board card according to the case number and the slot number.
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| CN112597097A (en) * | 2020-12-28 | 2021-04-02 | 济南浪潮高新科技投资发展有限公司 | ADC data acquisition card of PXIE interface, application method and medium thereof |
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