CN212625544U - Semiconductor packaging unit - Google Patents
Semiconductor packaging unit Download PDFInfo
- Publication number
- CN212625544U CN212625544U CN202021280509.3U CN202021280509U CN212625544U CN 212625544 U CN212625544 U CN 212625544U CN 202021280509 U CN202021280509 U CN 202021280509U CN 212625544 U CN212625544 U CN 212625544U
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- CN
- China
- Prior art keywords
- undersetting
- semiconductor
- supporting legs
- recess
- groove
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model discloses a semiconductor packaging unit, including semiconductor and undersetting, first recess is installed to the undersetting upside, the second recess has been seted up on the lateral wall of undersetting, the draw-in groove has been seted up to second recess inboard, semiconductor lower part card is established inside first recess, the pin is installed at the semiconductor both ends, and the pin card establishes in the draw-in groove, undersetting downside mid-mounting has first supporting legs, the second supporting legs is installed to first supporting legs one side, the utility model discloses an establish semiconductor lower part card inside the first recess of undersetting, be convenient for support the protection in the semiconductor lower part outside to have first supporting legs and second supporting legs through undersetting downside mid-mounting, be convenient for support the protection to the undersetting downside, be favorable to improving the stability that the pin installation was used.
Description
Technical Field
The utility model relates to a semiconductor package technical field specifically is a semiconductor package unit.
Background
The semiconductor packaging refers to a process of processing a wafer passing a test according to a product model and a functional requirement to obtain an independent chip. The packaging process comprises the following steps: the wafer from the previous process of the wafer is cut into small chips through a scribing process, then the cut chips are pasted on the corresponding small islands of the substrate frame through glue, and then the bonding pads of the chips are connected to the corresponding pins of the substrate through superfine metal wires or conductive resin to form a required circuit; and then packaging and protecting the independent wafer by using a plastic shell, carrying out a series of operations after plastic packaging, carrying out finished product testing after packaging, generally carrying out procedures such as inspection, Test, packaging and the like, and finally warehousing and shipping.
The existing semiconductor packaging unit has poor lower part supporting stability of a semiconductor and is inconvenient to mount, fix and use.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a semiconductor package unit to solve current semiconductor package unit, the lower part of semiconductor supports stability relatively poor, is not convenient for install fixed use problem moreover.
In order to achieve the above object, the utility model provides a following technical scheme: the utility model provides a semiconductor packaging unit, includes semiconductor and undersetting, first recess is installed to the undersetting upside, the second recess has been seted up on the lateral wall of undersetting, the draw-in groove has been seted up to second recess inboard, semiconductor lower part card is established inside first recess, the pin is installed at the semiconductor both ends, and the pin card establishes in the draw-in groove, undersetting downside mid-mounting has first supporting legs, the second supporting legs is installed to first supporting legs one side.
Furthermore, the second groove upper side cover is provided with a pressing plate, and the pressing plate is arranged into a long strip shape.
Furthermore, the pressing plate is fixedly connected with the second groove through screws, and the number of the screws is multiple.
Furthermore, a heat dissipation hole is formed in the middle of the lower support, and a dust filter screen is installed in the heat dissipation hole.
Furthermore, first supporting legs one end passes through connecting seat and bottom suspension fixed connection, the supporting disk is installed to second supporting legs downside.
Furthermore, an inner threaded hole is formed in the first supporting leg, and one end of the second supporting leg is in threaded connection with the first supporting leg.
Compared with the prior art, the beneficial effects of the utility model are that:
1. the utility model discloses an establish semiconductor lower part card inside the first recess of undersetting, be convenient for support the protection in the semiconductor lower part outside to have first supporting legs and second supporting legs through undersetting downside mid-mounting, can support the protection to the undersetting downside, the fixed use of installation of the pin of being convenient for is favorable to improving the stability of pin installation use moreover.
2. The utility model discloses a louvre has been seted up at the middle part in the undersetting, installs the dirt screen in the louvre, is convenient for carry out ventilation cooling to the middle part in the undersetting and handles.
3. The utility model discloses because connecting seat and undersetting fixed connection are passed through to first supporting legs one end, the supporting disk is installed to second supporting legs downside, is convenient for stabilize the support to second supporting legs downside, and second supporting legs one end and first supporting legs threaded connection are convenient for adjust the support use height of first supporting legs and second supporting legs, satisfy not semiconductor and pin installation fixed use of co-altitude.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic view of the overall structure of the present invention;
FIG. 2 is a schematic view of the lower support structure of the present invention;
fig. 3 is a front view of the overall structure of the present invention.
In the figure: 1. a lower support; 2. a semiconductor; 3. a terminal pin; 4. pressing a plate; 5. a second groove; 6. a card slot; 7. a second support leg; 9. a screw; 10. a first groove; 11. heat dissipation holes; 12. a dust filter screen; 13. a support disc; 14. a connecting seat; 15. a first supporting leg.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Please refer to fig. 1, fig. 2, fig. 3, in an embodiment of the present invention, a semiconductor package unit, including a semiconductor 2 and a lower support 1, a first groove 10 is installed on an upper side of the lower support 1, a second groove 5 is opened on a side wall of the lower support 1, a clamping groove 6 is opened on an inner side of the second groove 5, a lower portion card of the semiconductor 2 is installed inside the first groove 10, terminal pins 3 are installed at two ends of the semiconductor 2, and the terminal pins 3 are clamped and installed in the clamping groove 6, so as to support and protect an outer side of a lower portion of the semiconductor 2, a first supporting pin 15 is installed at a middle portion of a lower side of the lower support 1, a second supporting pin 7 is installed at one side of the first supporting pin 15, so as to support and protect a lower side of the lower support 1, so that the lead.
Preferably, the pressing plate 4 is arranged on the side cover on the second groove 5, and the pressing plate 4 is arranged into a long strip shape, so that the upper part of the lead pin 3 clamped in the clamping groove 6 can be positioned conveniently.
Preferably, the pressing plate 4 is fixedly connected with the second groove 5 through a plurality of screws 9, and the screws 9 are provided for facilitating the connection and fixation between the pressing plate 4 and the second groove 5.
Preferably, the middle part in the lower support 1 is provided with a heat dissipation hole 11, and a dust filter 12 is installed in the heat dissipation hole 11, so that the middle part in the lower support 1 can be conveniently ventilated and radiated.
Preferably, 15 one ends of first supporting legs pass through connecting seat 14 and lower support 1 fixed connection, and supporting disk 13 is installed to second supporting legs 7 downside, is convenient for stabilize the support to second supporting legs 7 downside and handles.
Preferably, an inner threaded hole is formed in the first supporting leg 15, one end of the second supporting leg 7 is in threaded connection with the first supporting leg 15, the supporting use heights of the first supporting leg 7 and the second supporting leg 15 are convenient to adjust, and the requirements for installation and fixation of the semiconductor 2 and the lead pins 3 with different heights are met.
The utility model discloses a theory of operation and use flow: establish inside the first recess 10 of undersetting 1 through 2 lower part cards of semiconductor, and 3 cards of terminal pin establish in draw-in groove 6, be convenient for support the protection in the 2 lower part outsides of semiconductor to through 1 downside mid-mounting of undersetting there are first supporting legs 15 and second supporting legs 7, be convenient for support the protection to the 1 downside of undersetting, the fixed use of installation of the terminal pin 3 of being convenient for is favorable to improving the stability of terminal pin 3 installation and use moreover.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
1. A semiconductor package unit comprising a semiconductor (2) and a lower support (1), characterized in that: first recess (10) are installed to undersetting (1) upside, second recess (5) have been seted up on the lateral wall of undersetting (1), draw-in groove (6) have been seted up to second recess (5) inboard, semiconductor (2) lower part card is established inside first recess (10), pin (3) are installed at semiconductor (2) both ends, and pin (3) card establishes in draw-in groove (6), undersetting (1) downside mid-mounting has first supporting legs (15), second supporting legs (7) are installed to first supporting legs (15) one side.
2. A semiconductor package unit according to claim 1, wherein: the pressing plate (4) is arranged on the upper side cover of the second groove (5), and the pressing plate (4) is arranged into a long strip shape.
3. A semiconductor package unit according to claim 2, wherein: the pressing plate (4) is fixedly connected with the second groove (5) through screws (9), and the screws (9) are provided with a plurality of screws.
4. A semiconductor package unit according to claim 1, wherein: the middle part in the lower support (1) is provided with a heat dissipation hole (11), and a dust filtering net (12) is installed in the heat dissipation hole (11).
5. A semiconductor package unit according to claim 1, wherein: first supporting legs (15) one end passes through connecting seat (14) and undersetting (1) fixed connection, supporting disk (13) are installed to second supporting legs (7) downside.
6. A semiconductor package unit according to claim 1, wherein: an inner threaded hole is formed in the first supporting leg (15), and one end of the second supporting leg (7) is in threaded connection with the first supporting leg (15).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202021280509.3U CN212625544U (en) | 2020-07-04 | 2020-07-04 | Semiconductor packaging unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202021280509.3U CN212625544U (en) | 2020-07-04 | 2020-07-04 | Semiconductor packaging unit |
Publications (1)
Publication Number | Publication Date |
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CN212625544U true CN212625544U (en) | 2021-02-26 |
Family
ID=74758274
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202021280509.3U Expired - Fee Related CN212625544U (en) | 2020-07-04 | 2020-07-04 | Semiconductor packaging unit |
Country Status (1)
Country | Link |
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CN (1) | CN212625544U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113851447A (en) * | 2021-09-23 | 2021-12-28 | 先之科半导体科技(东莞)有限公司 | Schottky diode without gold wire and manufacturing method thereof |
-
2020
- 2020-07-04 CN CN202021280509.3U patent/CN212625544U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113851447A (en) * | 2021-09-23 | 2021-12-28 | 先之科半导体科技(东莞)有限公司 | Schottky diode without gold wire and manufacturing method thereof |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20210226 Termination date: 20210704 |