CN211830745U - Differential sampling circuit - Google Patents
Differential sampling circuit Download PDFInfo
- Publication number
- CN211830745U CN211830745U CN202020822412.4U CN202020822412U CN211830745U CN 211830745 U CN211830745 U CN 211830745U CN 202020822412 U CN202020822412 U CN 202020822412U CN 211830745 U CN211830745 U CN 211830745U
- Authority
- CN
- China
- Prior art keywords
- resistor
- subtracter
- voltage
- circuit
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Measurement Of Current Or Voltage (AREA)
Abstract
The utility model provides a differential sampling circuit, it includes: the input circuit comprises a first subtractor, a first input circuit and a second input circuit which is connected with the first input circuit in parallel; the first input loop includes: the first voltage limiting and shunting unit is connected with a first subtracter through the first filtering unit, and a first sampling point is arranged between the first filtering unit and the first subtracter; the second input loop includes: the second voltage limiting and shunting unit is connected with the first subtracter through the second filtering unit, and a second sampling point is arranged between the second filtering unit and the first subtracter; the output end of the first subtracter outputs a voltage difference value between the first sampling point and the second sampling point. The utility model discloses based on subtracter and first input loop and second input loop, through the four-point resistance voltage of feedback, realize the collection of voltage difference between the sampling point, this circuit structure is simple, the debugging of being convenient for, with low costs.
Description
Technical Field
The utility model relates to a voltage sampling technical field especially relates to a differential sampling circuit.
Background
Currently, in a working circuit of an electronic device or the like, it is necessary to realize functions such as ac voltage sampling and dc voltage sampling. In order to meet the above requirements, the existing voltage sampling circuit mainly depends on a sensor to realize voltage sampling. However, the sampling method is complicated in circuit structure due to the dependence on the sensor, is not convenient for debugging of the circuit, and has high cost. Therefore, it is necessary to provide a further solution to the above problems.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a differential sampling circuit to overcome the not enough that exists among the prior art.
In order to solve the technical problem, the technical scheme of the utility model is that:
a differential sampling circuit, comprising: the input circuit comprises a first subtractor, a first input circuit and a second input circuit which is connected with the first input circuit in parallel;
the first input loop comprises: the first voltage limiting and shunting unit is connected with the first subtracter through the first filtering unit, and a first sampling point is arranged between the first filtering unit and the first subtracter;
the second input circuit includes: the second voltage limiting and shunting unit is connected with the first subtracter through the second filtering unit, and a second sampling point is arranged between the second filtering unit and the first subtracter;
and the output end of the first subtracter outputs a voltage difference value between the first sampling point and the second sampling point.
As the utility model discloses a differential sampling circuit's improvement, first voltage limiting shunt unit includes: the filter circuit comprises a resistor R1, a resistor R2, a resistor R3, a resistor R11 and a resistor R12 connected in series in sequence and connected between the resistor R11 and the first filter unit in a bridging mode.
As the utility model discloses a differential sampling circuit's improvement, it has voltage follower U1A still to establish ties between first voltage limiting reposition of redundant personnel unit and the first filtering unit.
As the utility model discloses a differential sampling circuit's improvement, first filtering unit includes: a resistor R10 and a capacitor C1, the resistor R10 is directly electrically connected to the first subtracter, one end of the capacitor C1 is connected between the resistor R10 and the first subtracter, the other end is grounded, and the first sampling point is defined by a connection point between one end of the capacitor C1 and the resistor R10 and the first subtracter.
As the utility model discloses a differential sampling circuit's improvement, second voltage limiting shunting unit includes: the resistor R4, the resistor R5, the resistor R6, the resistor R21 and the resistor R23 are connected in series in sequence and are connected between the resistor R21 and the second filtering unit in a bridging mode.
As the utility model discloses a differential sampling circuit's improvement, it has voltage follower U1B still to establish ties between second voltage limiting reposition of redundant personnel unit and the second filtering unit.
As the utility model discloses a differential sampling circuit's improvement, second filtering unit includes: a resistor R20 and a capacitor C4, the resistor R20 is directly electrically connected to the first subtracter, one end of the capacitor C4 is connected between the resistor R20 and the first subtracter, the other end is grounded, and the second sampling point is defined by a connection point between one end of the capacitor C4 and the resistor R20 and the first subtracter.
As an improvement of the differential sampling circuit of the present invention, the first subtractor includes: a resistor R15, a resistor R13, a resistor R17, a resistor R19 and an amplifier U2A;
the first filtering unit is connected with the inverting input end of an amplifier U2A through the resistor R15, one end of the resistor R13 is connected between the resistor R15 and the first subtracter, and the other end of the resistor R13 is connected to the output end of the first subtracter;
the second filter unit is connected with the non-inverting input end of an amplifier U2A through the resistor R17, one end of the resistor R19 is connected between the resistor R17 and the first subtracter, and the other end of the resistor R19 is grounded.
As the utility model discloses an improvement of difference sampling circuit, when the voltage of resistance R15 the voltage of resistance R13, the voltage of resistance R17 the voltage of resistance R19, the voltage of then output of first subtracter is the difference of first sampling point and second sampling point voltage promptly.
As an improvement of the differential sampling circuit of the present invention, the differential sampling circuit further includes a third input circuit and a second subtractor;
the third input loop is connected with the first input loop and the second input loop in parallel, the second input loop and the third input loop are connected with the second subtracter, a third sampling point is arranged between the third input loop and the second subtracter, and the output end of the second subtracter outputs the voltage difference value between the second sampling point and the third sampling point.
Compared with the prior art, the beneficial effects of the utility model are that: the utility model discloses a difference sampling circuit is based on subtracter and first input circuit and second input circuit, through the four-point resistance voltage of feedback, realizes the collection of voltage difference between the sampling point, has this circuit structure simply, be convenient for debug, advantage with low costs.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a circuit diagram of a differential sampling circuit according to a first embodiment of the present invention;
fig. 2 is a circuit diagram of a differential sampling circuit according to a second embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
As shown in fig. 1, a first embodiment of the present invention provides a differential sampling circuit, which is a two-level sampling circuit. The differential sampling circuit includes: a first subtractor 1, a first input circuit 2, and a second input circuit 3 provided in parallel with the first input circuit 2.
The second input loop 3 is identical in circuit structure to the first input loop 2. Specifically, the second input circuit 3 includes: the second voltage limiting and shunting unit is connected with the first subtracter 1 through the second filtering unit, and a second sampling point is arranged between the second filtering unit and the first subtracter 1.
In one embodiment, the first voltage limiting and shunting unit includes: the filter circuit comprises a resistor R1, a resistor R2, a resistor R3, a resistor R11 and a resistor R12 connected in series in sequence and connected between the resistor R11 and the first filter unit in a bridging mode. In addition, a voltage follower U1A is also connected in series between the first voltage limiting and shunting unit and the first filtering unit.
The first filtering unit includes: the circuit comprises a resistor R10 and a capacitor C1, wherein the resistor R10 is directly electrically connected to the first subtracter 1, one end of the capacitor C1 is connected between the resistor R10 and the first subtracter 1, the other end of the capacitor C1 is grounded, and a first sampling point is defined by a connection point between one end of the capacitor C1 and the resistor R10 and the first subtracter 1.
Similarly, the second voltage limiting and shunting unit includes: the resistor R4, the resistor R5, the resistor R6, the resistor R21 and the resistor R23 are connected in series in sequence and are connected between the resistor R21 and the second filtering unit in a bridging mode. In addition, a voltage follower U1B is also connected in series between the second voltage limiting and shunting unit and the second filtering unit.
The second filtering unit includes: the resistor R20 and the capacitor C4, the resistor R20 is directly electrically connected to the first subtracter 1, one end of the capacitor C4 is connected between the resistor R20 and the first subtracter 1, the other end of the capacitor C4 is grounded, and a second sampling point is defined by a connection point between one end of the capacitor C4 and the resistor R20 and the first subtracter 1.
The output of the first subtractor 1 outputs a voltage difference between the first sampling point and the second sampling point.
In one embodiment, the first subtractor 1 includes: a resistor R15, a resistor R13, a resistor R17, a resistor R19, and an amplifier U2A.
The first filter unit is connected with the inverting input end of the amplifier U2A through a resistor R15, one end of the resistor R13 is connected between the resistor R15 and the first subtracter 1, and the other end of the resistor R13 is connected to the output end of the first subtracter 1; the second filter unit is connected with the non-inverting input end of the amplifier U2A through a resistor R17, one end of the resistor R19 is connected between the resistor R17 and the first subtracter 1, and the other end of the resistor R3526 is grounded. At this time, when the voltage of the resistor R15 is equal to the voltage of the resistor R13, and the voltage of the resistor R17 is equal to the voltage of the resistor R19, the voltage output by the output end of the first subtractor 1 is the difference between the voltages at the first sampling point and the second sampling point.
In the differential sampling circuit of this embodiment, the principle of voltage sampling of "+" pair "N" is as follows:
for a '+' input loop, a current-limiting voltage-dividing loop is formed by a resistor R1, a resistor R2, a resistor R3, a resistor R11 and a resistor R12, and the voltage drop of the resistor R12 is sent to a lower-stage amplifier U2A through a voltage follower U1A and a filter circuit formed by the resistors R10 and C1; the "N" input circuit is the same as the "+" input circuit, the resistor R15, the resistor R13, the resistor R17, the resistor R19, and the resistor U2A constitute a subtractor, and if the voltage of the resistor R15 is equal to the voltage of the resistor R13 and the voltage of the resistor R17 is equal to the voltage of the resistor R19, the voltage at the point D is the difference between the voltages at the point a and the point B (UD is UA-UB). U2B is an inverting amplifier for adjusting the output amplitude and positive and negative; and sending the output Vdc + signal into an analog-to-digital converter or a digital processor DSP to finish accurate sampling.
As shown in fig. 2, a second embodiment of the present invention provides a differential sampling circuit, which is a three-level sampling circuit. The differential sampling circuit includes: a first subtractor 1, a first input circuit 2, and a second input circuit 3 provided in parallel with the first input circuit 2.
In addition, the differential sampling circuit further comprises a third input circuit 4 and a second subtractor 5. The third input circuit 4 has the same circuit configuration as the first input circuit 2 and the second input circuit 3, and the second subtractor 5 has the same circuit configuration as the first subtractor 1.
Based on the same working principle, the third input loop 4 is connected in parallel with the first input loop 2 and the second input loop 3, the second input loop 3 and the third input loop 4 are connected with the second subtracter 5, a third sampling point is arranged between the third input loop 4 and the second subtracter 5, and the output end of the second subtracter 5 outputs a voltage difference value between the second sampling point and the third sampling point.
To sum up, the utility model discloses a differential sampling circuit has a plurality of transfer unit and a plurality of correction station, can realize once getting the multi-disc to the dress piece of chip is realized to the mode of continuous dress multi-disc, is showing dress piece efficiency and the productivity that has improved the chip.
It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (10)
1. A differential sampling circuit, comprising: the input circuit comprises a first subtractor, a first input circuit and a second input circuit which is connected with the first input circuit in parallel;
the first input loop comprises: the first voltage limiting and shunting unit is connected with the first subtracter through the first filtering unit, and a first sampling point is arranged between the first filtering unit and the first subtracter;
the second input circuit includes: the second voltage limiting and shunting unit is connected with the first subtracter through the second filtering unit, and a second sampling point is arranged between the second filtering unit and the first subtracter;
and the output end of the first subtracter outputs a voltage difference value between the first sampling point and the second sampling point.
2. The differential sampling circuit of claim 1, wherein the first voltage limiting shunt unit comprises: the filter circuit comprises a resistor R1, a resistor R2, a resistor R3, a resistor R11 and a resistor R12 connected in series in sequence and connected between the resistor R11 and the first filter unit in a bridging mode.
3. The differential sampling circuit according to claim 2, wherein a voltage follower U1A is further connected in series between the first voltage limiting and shunting unit and the first filtering unit.
4. The differential sampling circuit of claim 1, wherein the first filtering unit comprises: a resistor R10 and a capacitor C1, the resistor R10 is directly electrically connected to the first subtracter, one end of the capacitor C1 is connected between the resistor R10 and the first subtracter, the other end is grounded, and the first sampling point is defined by a connection point between one end of the capacitor C1 and the resistor R10 and the first subtracter.
5. The differential sampling circuit of claim 1, wherein the second voltage limiting shunt unit comprises: the resistor R4, the resistor R5, the resistor R6, the resistor R21 and the resistor R23 are connected in series in sequence and are connected between the resistor R21 and the second filtering unit in a bridging mode.
6. The differential sampling circuit according to claim 5, wherein a voltage follower U1B is further connected in series between the second voltage limiting and shunting unit and the second filtering unit.
7. The differential sampling circuit of claim 1, wherein the second filtering unit comprises: a resistor R20 and a capacitor C4, the resistor R20 is directly electrically connected to the first subtracter, one end of the capacitor C4 is connected between the resistor R20 and the first subtracter, the other end is grounded, and the second sampling point is defined by a connection point between one end of the capacitor C4 and the resistor R20 and the first subtracter.
8. The differential sampling circuit of claim 1, wherein the first subtractor comprises: a resistor R15, a resistor R13, a resistor R17, a resistor R19 and an amplifier U2A;
the first filtering unit is connected with the inverting input end of an amplifier U2A through the resistor R15, one end of the resistor R13 is connected between the resistor R15 and the first subtracter, and the other end of the resistor R13 is connected to the output end of the first subtracter;
the second filter unit is connected with the non-inverting input end of an amplifier U2A through the resistor R17, one end of the resistor R19 is connected between the resistor R17 and the first subtracter, and the other end of the resistor R19 is grounded.
9. The differential sampling circuit of claim 8, wherein when the voltage across the resistor R15 is equal to the voltage across the resistor R13, and the voltage across the resistor R17 is equal to the voltage across the resistor R19, the voltage output by the output of the first subtractor is the difference between the voltages at the first and second sampling points.
10. The differential sampling circuit of claim 1, further comprising a third input loop and a second subtractor;
the third input loop is connected with the first input loop and the second input loop in parallel, the second input loop and the third input loop are connected with the second subtracter, a third sampling point is arranged between the third input loop and the second subtracter, and the output end of the second subtracter outputs the voltage difference value between the second sampling point and the third sampling point.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020822412.4U CN211830745U (en) | 2020-05-18 | 2020-05-18 | Differential sampling circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020822412.4U CN211830745U (en) | 2020-05-18 | 2020-05-18 | Differential sampling circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211830745U true CN211830745U (en) | 2020-10-30 |
Family
ID=73021898
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202020822412.4U Active CN211830745U (en) | 2020-05-18 | 2020-05-18 | Differential sampling circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211830745U (en) |
-
2020
- 2020-05-18 CN CN202020822412.4U patent/CN211830745U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN211830745U (en) | Differential sampling circuit | |
| CN1087122C (en) | Subscriber's line interface circuit capable of realizing by CMOS circuit | |
| CN111446956A (en) | Differential sampling circuit | |
| CN103439556A (en) | Optical coupling isolation linear detection circuit and implementation method thereof | |
| CN203761123U (en) | UPS parallel operation current sampling and converting control system | |
| CN104181383A (en) | Three-phase power grid voltage synchronous detection circuit | |
| CN206041965U (en) | High -precision 4~20mA converts 10V's current -voltage conversion module to | |
| CN217112504U (en) | Time-sharing multiplexing multi-level circuit | |
| CN215641494U (en) | High-voltage isolation sampling circuit | |
| CN210720628U (en) | Direct current insulation monitoring circuit | |
| CN207114615U (en) | A kind of new-energy automobile charging box input voltage detection circuit | |
| CN208458665U (en) | A kind of Precision positioning circuit | |
| CN101447807B (en) | High-efficient two-wire system power modulation bus and implementing method thereof | |
| CN206611386U (en) | A kind of building element prestressing force measure signal amplifier process circuit | |
| CN206556669U (en) | The digital integrator of data collection station | |
| CN213661908U (en) | Stereo set PWM signal changes analog level display circuit | |
| CN218352397U (en) | Circuit for solving EMC through current compensation | |
| CN102201836A (en) | High-efficiency two-wire system power supply modulation bus and realization method thereof | |
| CN201312308Y (en) | High-efficiency two-wire system power modulation bus | |
| CN216718535U (en) | Direct current quantity acquisition circuit with isolation for power system | |
| CN209878878U (en) | AC/DC signal power integrated measuring device | |
| CN204517686U (en) | Voltage stabilizing full-wave rectifying circuit | |
| CN220367346U (en) | Positive and negative voltage detection circuit realized by single-ended AD | |
| CN206865464U (en) | A kind of rural power grids engineering multimode fibre receiving circuit | |
| CN210376505U (en) | Acquisition circuit of battery pack current |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |