CN217112504U - Time-sharing multiplexing multi-level circuit - Google Patents
Time-sharing multiplexing multi-level circuit Download PDFInfo
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- CN217112504U CN217112504U CN202123445592.2U CN202123445592U CN217112504U CN 217112504 U CN217112504 U CN 217112504U CN 202123445592 U CN202123445592 U CN 202123445592U CN 217112504 U CN217112504 U CN 217112504U
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Abstract
The utility model discloses a multiplexing multi-level circuit of timesharing, including switch tube, impedance network, detection and the control unit, generating line, the switch tube is respectively: the first switching tube, the second switching tube, the third switching tube, the fourth switching tube and the fifth switching tube; the impedance networks are respectively: a first impedance network, a second impedance network, a third impedance network, a fourth impedance network; the time-division multiplexing multilevel circuit can improve the precision of an insulation impedance detection range in a wider range, reduce the impedance networks which are artificially added for calculating the insulation impedance in the current market, reduce the switching tubes for impedance switching, and realize the reduction of the system cost while improving the performance.
Description
Technical Field
The utility model relates to a wind-powered electricity generation photovoltaic power generation system technical field especially relates to a multiplexing multilevel circuit of timesharing.
Background
In a photovoltaic system, the safety and the stability of the system must be guaranteed, considering from the safety perspective, the electric shock prevention is the most basic requirement, insulation impedance detection is taken as a simple and feasible electric shock prevention detection scheme, and the national energy agency makes hard requirements for an inverter, the core component of the photovoltaic system, from the standard level: each photovoltaic system must have an insulation resistance detection function, and for this reason, various photovoltaic system insulation resistance detection schemes are developed.
Prior art scheme 1: as shown in fig. 1, fig. 1 is a circuit for detecting insulation resistance by a dual-switch switching method in the prior art, and the scheme is as follows: the method comprises the steps that the direct-current insulation resistance of a positive bus to the ground is Rx, the direct-current insulation resistance of a negative bus to the ground is Ry, S1 and S2 are in an off state, the resistance of an external ubus +/-pair PF is R1+ R3 and R2+ R4 respectively, and then the voltage of the ubus +/-pair PF is obtained through a sampling circuit and is marked as u11 and u 12; closing switches S1 and S2, wherein the impedances of external ubus +/-to PF are R1 and R2 respectively, and acquiring the voltages of ubus +/-to PF, which are recorded as u21 and u22, through a sampling circuit; by detecting the voltage change of the bus to ground before and after the switch is closed and the KCL and KVL principles, the impedance of the system to ground can be obtained, and whether the standard requirement is met or not is further judged.
Prior art scheme 2: fig. 2 is a diagram that omits a change-over switch on the basis of the scheme 1.
Prior art scheme 3: fig. 3 is a diagram that a change-over switch is added on the basis of the scheme 2, and the newly added switch is used for cutting off the connection relationship between the change-over resistor and the PF.
Other similar prior art schemes exist, but the basic idea is to add a switch device, add external impedance between a positive bus and a negative bus, realize the change of impedance to ground through the switching of the switch device, and calculate the system insulation impedance according to the basic circuit theory by combining the change of the voltage to ground.
The above solutions have several common disadvantages as follows:
for the switching devices introduced for insulation resistance calculation, in order to ensure the accuracy of resistance detection, two switching devices are generally required, as in scheme 1; due to the safety problem, the requirement on the insulation and voltage resistance of the switch is high, and if the scheme 3 is adopted, the increase of the number of the switches and the improvement of the requirement on the voltage resistance level of the device can both bring about the increase of the system cost;
the positive bus and the negative bus are grounded by artificial additional impedance to ground, the number of required resistors is large due to high sampling voltage, the power consumption problem of the resistors also needs to be considered, and the additional switching resistor increases the system cost;
as shown in schemes 1 and 2, although the system insulation impedance detection is realized, after the insulation impedance detection is completed, an additional resistor for impedance change is always applied between a positive bus and a negative bus and a PF, when the PF is dirty, the PF is easy to influence the system control through the circuit, so that other detection signals of the system are interfered, and the stability of the system is caused;
due to the limitation of the number of switches, the current scheme can only ensure that the insulation impedance detection of the system to the ground is accurate within a certain range (generally, the insulation impedance detection is only performed within a lower impedance range), and when the insulation impedance detection exceeds the certain range, the impedance detection precision is poor.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is to provide a time sharing multiplexing multilevel circuit and insulation resistance detection method, this time sharing multiplexing multilevel circuit can improve the precision of insulation resistance detection range at wideer within range, can reduce and be used for calculating insulation resistance and the artificial impedance network that adds on the current market, and the reducible switch tube that is used for the impedance to switch over, when improving the performance, realizes the reduction of system cost.
In order to solve the technical problem, the utility model provides a time-sharing multiplexing multilevel circuit, which comprises 2n +5 switching tubes, 2n +4 impedance networks and a detection and control unit; the 2n +5 switching tubes are respectively: a first switch tube T0, a second switch tube T1 …, a 2n +4 th switch tube T2n +3 and a 2n +5 th switch tube T2n + 4; the 2n +4 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, …, a 2n +3 impedance network Z2n +3, a 2n +4 impedance network Z2n +4, a second switch tube T1 connected with the first impedance network Z1 in parallel, a third switch tube T2 connected with the second impedance network Z2 in parallel, and so on, a 2n +4 switch tube T2n +3 connected with the 2n +3 impedance network Z2n +3 in parallel, a 2n +5 switch tube T2n +4 connected with the 2n +4 impedance network Z2n +4 in parallel, one end of the second switch tube T1 connected with a positive bus, the other end of the second switch tube T1 connected with one end of the third switch tube T2, and so on, the other end of the 2n +4 switch tube T2n +3 connected with one end of the 2n +5 switch tube T2n +4, and the other end of the third switch tube T2n +5 switch tube T2n + 2n connected with a negative bus; the other end of the 2n +3 th switch tube T2n +2 is connected to the 2n +4 th switch tube T2n +3 and also connected to the AC output and one end of the first switch tube T0; the other end of the first switch tube T0 is connected with the PF end; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is also connected with the driving ends of a first switch tube T0, a second switch tube T1, a third switch tube T2, …, a 2n +4 switch tube T2n +3 and a 2n +5 switch tube T2n +4, and is used for controlling the switching state of each switch tube; wherein n is a natural number.
Preferably, each of the switch tubes is a Mos tube, an IGBT, an IGCT, or a thyristor.
Preferably, each impedance network is a network of one or more of resistors, capacitors and inductors.
Preferably, n is zero, and the 5 switching tubes are respectively: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 4 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4; the second switching tube T1 is connected in parallel with the first impedance network Z1, the third switching tube T2 is connected in parallel with the second impedance network Z2, the fourth switching tube T3 is connected in parallel with the third impedance network Z3, the fifth switching tube T4 is connected in parallel with the fourth impedance network Z4, one end of the second switching tube T1 is connected with a positive bus, and the other end of the second switching tube T1 is connected with one end of a third switching tube T2; the other end of the third switching tube T2 is connected with one end of a fourth switching tube T3, and is simultaneously connected with an alternating current output and one end of a first switching tube T0; the other end of the first switching tube T0 is connected with a PF end, the other end of the fourth switching tube T3 is connected with one end of the fifth switching tube T4, and the other end of the fifth switching tube T4 is connected with a negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the second switch tube T1, the third switch tube T2, the fourth switch tube T3 and the fifth switch tube T4, and is used for controlling the switching state of each switch tube.
In order to solve the above technical problem, the utility model also provides a time-sharing multiplexing multilevel circuit, which comprises 5 switching tubes, 5 impedance networks and a detection and control unit; the 5 switch tubes are respectively as follows: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 5 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4, and a fifth impedance network Z5; the second switching tube T1 is connected with the first impedance network Z1 in parallel, and the third switching tube T2 is connected with the second impedance network Z2 in parallel; the third impedance network Z3 and the fourth impedance network Z4 are connected in series and then connected in parallel with the fourth switching tube T3; the fifth switching tube T4 is connected in parallel with a fourth impedance network Z4; one end of the second switching tube T1 is connected to the positive bus, the other end of the second switching tube T1 is connected to one end of a third switching tube T2, the other end of the third switching tube T2 is connected to one end of a fourth switching tube T3, and one end of the third impedance network Z3 is connected to the third switching tube T2; the other end of the third impedance network Z3 is connected with one end of a fourth impedance network Z4, and is also connected with an alternating current output end and one end of a first switch tube T0; the other end of the first switching tube T0 is connected with a PF end, the other end of the fourth switching tube T3 is connected with one end of a fifth switching tube T4, and the other end of the fifth switching tube T4 is connected with a negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for detecting the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the first switch tube T1, the second switch tube T2, the third switch tube T3 and the fourth switch tube T4, and is used for controlling the switching state of each switch tube.
In order to solve the above technical problem, the utility model also provides a time-sharing multiplexing multilevel circuit, which comprises 5 switching tubes, 5 impedance networks and a detection and control unit; the 5 switch tubes are respectively as follows: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 5 impedance networks are respectively: a first impedance network Z0, a second impedance network Z1, a third impedance network Z2, a fourth impedance network Z3, and a fifth impedance network Z4; the second switch tube T1 is connected in parallel with the second impedance network Z1, the third switch tube T2 is connected in parallel with the third impedance network Z2, the fourth switch tube T3 is connected in parallel with the fourth impedance network Z3, the fifth switch tube T4 is connected in parallel with the fifth impedance network Z4, one end of the second switch tube T1 is connected to the positive bus, and the other end of the second switch tube T1 is connected to one end of the third switch tube T2; the other end of the third switching tube T2 is connected to one end of the fourth switching tube T3, and also connected to the ac output terminal and one end of the first impedance network Z0; the other end of the first impedance network Z0 is connected with one end of a first switch tube T0, the other end of the first switch tube T0 is connected with the PF end, the other end of a fourth switch tube T3 is connected with one end of a fifth switch tube T4, and the other end of the fifth switch tube T4 is connected with the negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for detecting the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the first switch tube T1, the second switch tube T2, the third switch tube T3 and the fourth switch tube T4, and is used for controlling the switching state of each switch tube.
After the circuit is adopted, the time-sharing multiplexing multilevel circuit comprises 2n +5 switching tubes, 2n +4 impedance networks and a detection and control unit; the 2n +5 switching tubes are respectively: a first switch tube T0, a second switch tube T1 …, a 2n +4 th switch tube T2n +3 and a 2n +5 th switch tube T2n + 4; the 2n +4 impedance networks are respectively: a first impedance network Z1, second impedance networks Z2 and Z …, a 2n +3 impedance network Z2n +3, a 2n +4 impedance network Z2n +4, a second switch tube T1 and a first impedance network Z1 are connected in parallel, a third switch tube T2 and a second impedance network Z2 are connected in parallel, …, a 2n +4 switch tube T2n +3 and a 2n +3 impedance network Z2n +3 are connected in parallel, a 2n +5 switch tube T2n +4 and a 2n +4 impedance network Z2n +4 are connected in parallel, one end of the second switch tube T1 is connected with a positive bus, the other end of the second switch tube T1 is connected with one end … of the third switch tube T2, the other end of the 2n +4 switch tube T2n +3 is connected with one end of a 2n +5 switch tube T2n +4, and the other end of the 2n +5 switch tube T2n + 56 +4 is connected with a negative bus 82 n + 4; the other end of the 2n +3 th switch tube T2n +2 is connected to the 2n +4 th switch tube T2n +3 and also connected to the AC output and one end of the first switch tube T0; the other end of the first switch tube T0 is connected with the PF end; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is also connected with the driving ends of a first switch tube T0, a second switch tube T1, a third switch tube T2 …, a 2n +4 switch tube T2n +3 and a 2n +5 switch tube T2n +4, and is used for controlling the switching state of each switch tube; the time-sharing multiplexing multilevel circuit can improve the precision of the insulation impedance detection range in a wider range, can reduce the impedance network which is artificially added for calculating the insulation impedance in the current market, can reduce the switching tubes for impedance switching, and can realize the reduction of the system cost while improving the performance.
Drawings
Fig. 1 is a circuit diagram of a first prior art solution;
FIG. 2 is a circuit diagram of a second prior art solution;
FIG. 3 is a circuit diagram of a third prior art solution;
FIG. 4 is a circuit diagram of a second embodiment of the time-division multiplexing multi-level circuit of the present invention;
FIG. 5 is a circuit diagram of a fourth embodiment of the time-division multiplexing multi-level circuit of the present invention;
fig. 6 is a circuit diagram of a fifth embodiment of the time-division multiplexing multilevel circuit of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example one
Referring to fig. 4, fig. 4 is a circuit diagram of a second embodiment of the time-division multiplexing multilevel circuit of the present invention; the embodiment discloses a time-division multiplexing multi-level circuit, which comprises 2n +5 switching tubes, 2n +4 impedance networks and a detection and control unit; the 2n +5 switching tubes are respectively: a first switch tube T0, a second switch tube T1 …, a 2n +4 th switch tube T2n +3 and a 2n +5 th switch tube T2n + 4; the 2n +4 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, …, a 2n +3 impedance network Z2n +3, a 2n +4 impedance network Z2n +4, a first switch tube T1 is connected in parallel with the first impedance network Z1, a second switch tube T2 is connected in parallel with the second impedance network Z2, and so on, a 2n +4 switch tube T2n +3 is connected in parallel with the 2n +3 impedance network Z2n +3, a 2n +5 switch tube T2n +4 is connected in parallel with the 2n +4 impedance network Z2n +4, one end of the second switch tube T1 is connected with a positive bus, the other end of the second switch tube T1 is connected with one end of the third switch tube T2, and so on, the other end of the 2n +4 switch tube T2n +3 is connected with one end of the 2n +5 switch tube T2n +4, and the other end of the second switch tube T2n +4 is connected with a negative bus 2 n; the other end of the 2n +3 th switch tube T2n +2 is connected to the 2n +4 th switch tube T2n +3 and also connected to the AC output and one end of the first switch tube T0; the other end of the first switch tube T0 is connected with the PF end; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is also connected with the driving ends of a first switch tube T0, a second switch tube T1, a third switch tube T2, and so on, a 2n +4 switch tube T2n +3 and a 2n +5 switch tube T2n +4, and is used for controlling the switching state of each switch tube; wherein n is a natural number.
In this embodiment, each of the switching tubes is a Mos tube, an IGBT, an IGCT, or a thyristor.
In this embodiment, each impedance network is a network formed by one or more devices of a resistor, a capacitor and an inductor.
Example two
In this embodiment, on the basis of the first embodiment, n is zero, and the 5 switching tubes are respectively: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 4 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4; the second switching tube T1 is connected in parallel with the first impedance network Z1, the third switching tube T2 is connected in parallel with the second impedance network Z2, the fourth switching tube T3 is connected in parallel with the third impedance network Z3, the fifth switching tube T4 is connected in parallel with the fourth impedance network Z4, one end of the second switching tube T1 is connected with a positive bus, and the other end of the second switching tube T1 is connected with one end of a third switching tube T2; the other end of the third switching tube T2 is connected with one end of a fourth switching tube T3, and is simultaneously connected with an alternating current output and one end of a first switching tube T0; the other end of the first switching tube T0 is connected with a PF end, the other end of the fourth switching tube T3 is connected with one end of the fifth switching tube T4, and the other end of the fifth switching tube T4 is connected with a negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the second switch tube T1, the third switch tube T2, the fourth switch tube T3 and the fifth switch tube T4, and is used for controlling the switching state of each switch tube.
EXAMPLE III
The embodiment discloses an insulation impedance detection method of a time-division multiplexing multi-level circuit, which comprises the following steps:
the detection and control unit calculates at least two groups of positive and negative bus-to-ground impedance values according to the voltage change of the positive and negative buses to the ground detected when the state of the switching tube is switched;
the step of calculating to obtain at least two groups of impedance values of the positive bus and the negative bus to the ground by the detection and control unit according to the voltage change of the positive bus and the negative bus to the ground detected when the state of the switching tube is switched specifically comprises the following steps: the detection and control unit performs voltage-sharing control by switching the states of a second switching tube T1 and a first switching tube T0 and matching with a first impedance network Z1, a second impedance network Z2, a third impedance network Z3 and a fourth impedance network Z4, and calculates a first group of positive and negative bus-to-ground impedance value Rx according to the voltage change of the positive and negative buses to the ground before and after the switching of the switching tube;
the detection and control unit performs voltage-sharing control by switching the states of the third switch tube T2, the second switch tube T1 and the first switch tube T0 in cooperation with the first impedance network Z1, the second impedance network Z2, the third impedance network Z3 and the fourth impedance network Z4, and calculates a second group of impedance value Ry of the positive bus bar and the negative bus bar to the ground according to the voltage change of the positive bus bar and the negative bus bar to the ground before and after the switching of the switch tube on and off states.
The specific implementation process comprises the following steps:
the detection and control unit controls the closing of the switch tube T0, voltage values of each point are respectively obtained through the detection and control unit, the voltage of the positive bus line to the PF is respectively recorded as u11, the voltage of the PF to the negative bus line is recorded as u12, and at the moment:
the detection and control unit controls the closing of the switch tube T1, the detection and control unit reads the voltage of each point again, the voltage of the positive bus line to the PF is recorded as u21, the voltage of the negative bus line to the PF is recorded as u22, and at this moment:
this time is:
according to the impedance transformation characteristic of the positive and negative buses which are put in before and after the switch is switched to the ground, Rx and Ry which can be obtained through calculation are compared with the impedance threshold value of the positive and negative buses of all the groups; selecting an impedance value to ground according to the comparison result; after the detection is completed, all the switches are turned off, and the first impedance network Z1, the second impedance network Z2, the third impedance network Z3 and the fourth impedance network Z4 have a voltage-sharing effect on the first switch tube T0, the first switch tube T1, the second switch tube T2, the third switch tube T3 and the fourth switch tube T4.
Example four
Referring to fig. 5, fig. 5 is a circuit diagram of a fourth embodiment of the time-division multiplexing multi-level circuit of the present invention, in this embodiment, on the basis of the first embodiment, n is 1, and the 7 switching tubes are respectively: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3, a fifth switching tube T4 and a sixth switching tube T5; the 6 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4, a fifth impedance network Z5, a sixth impedance network Z6; the input end of the time-sharing multiplexing multilevel circuit is connected with the photovoltaic cell panel, the output end of the time-sharing multiplexing multilevel circuit is connected with the inverter alternating current filtering unit, Rx and Ry are equivalent impedance of a positive bus and a negative bus to PF, and the specific implementation process is the same as the embodiment.
EXAMPLE five
Referring to fig. 6, fig. 6 is a circuit diagram of a fifth embodiment of the time-division multiplexing multi-level circuit of the present invention; the embodiment discloses a time-sharing multiplexing multi-level circuit, which comprises 5 switching tubes, 5 impedance networks and a detection and control unit; the 5 switch tubes are respectively as follows: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 5 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4, and a fifth impedance network Z5; the input end of the time-sharing multiplexing multilevel circuit is connected with the photovoltaic cell panel, and the output end of the time-sharing multiplexing multilevel circuit is connected with the inverter alternating current filtering unit; the second switching tube T1 is connected with the first impedance network Z1 in parallel, and the third switching tube T2 is connected with the second impedance network Z2 in parallel; the third impedance network Z3 and the fourth impedance network Z4 are connected in series and then connected in parallel with the fourth switching tube T3; the fifth switching tube T4 is connected in parallel with a fourth impedance network Z4; one end of the second switching tube T1 is connected to the positive bus, the other end of the second switching tube T1 is connected to one end of a third switching tube T2, the other end of the third switching tube T2 is connected to one end of a fourth switching tube T3, and one end of the third impedance network Z3 is connected to the third switching tube T2; the other end of the third impedance network Z3 is connected with one end of a fourth impedance network Z4, and is also connected with an alternating current output end and one end of a first switch tube T0; the other end of the first switching tube T0 is connected with a PF end, the other end of the fourth switching tube T3 is connected with one end of a fifth switching tube T4, and the other end of the fifth switching tube T4 is connected with a negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for detecting the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the first switch tube T1, the second switch tube T2, the third switch tube T3 and the fourth switch tube T4, and is used for controlling the switching state of each switch tube, Rx and Ry are equivalent impedance of the positive and negative bus bars to the PF, and the specific implementation process is the same as that in the embodiment.
The time-sharing multiplexing multilevel circuit can improve the precision of the insulation impedance detection range in a wider range, can reduce the impedance network which is artificially added for calculating the insulation impedance in the current market, can reduce the switching tubes for impedance switching, and can realize the reduction of the system cost while improving the performance.
It should be understood that the above is only a preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, and all the equivalent structures or equivalent flow changes made by the contents of the specification and the drawings or directly or indirectly applied to other related technical fields are also included in the scope of the present invention.
Claims (6)
1. A time-division multiplexing multi-level circuit is characterized by comprising 2n +5 switching tubes, 2n +4 impedance networks and a detection and control unit; the 2n +5 switching tubes are respectively: a first switch tube T0, a second switch tube T1 …, a 2n +4 th switch tube T2n +3 and a 2n +5 th switch tube T2n + 4; the 2n +4 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, …, a 2n +3 impedance network Z2n +3, a 2n +4 impedance network Z2n +4, a second switch tube T1 connected with the first impedance network Z1 in parallel, a third switch tube T2 connected with the second impedance network Z2 in parallel, and so on, a 2n +4 switch tube T2n +3 connected with the 2n +3 impedance network Z2n +3 in parallel, a 2n +5 switch tube T2n +4 connected with the 2n +4 impedance network Z2n +4 in parallel, one end of the second switch tube T1 connected with a positive bus, the other end of the second switch tube T1 connected with one end of the third switch tube T2, and so on, the other end of the 2n +4 switch tube T2n +3 connected with one end of the 2n +5 switch tube T2n +4, and the other end of the third switch tube T2n +5 switch tube T2n + 2n connected with a negative bus; the other end of the 2n +3 th switch tube T2n +2 is connected to the 2n +4 th switch tube T2n +3 and also connected to the AC output and one end of the first switch tube T0; the other end of the first switch tube T0 is connected with the PF end; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is also connected with the driving ends of a first switch tube T0, a second switch tube T1, a third switch tube T2, …, a 2n +4 switch tube T2n +3 and a 2n +5 switch tube T2n +4, and is used for controlling the switching state of each switch tube; wherein n is a natural number.
2. The time-division multiplexing multilevel circuit according to claim 1, wherein each of the switching tubes is a Mos tube or an IGBT or an IGCT or a thyristor.
3. The time multiplexed, multilevel circuit of claim 1, wherein each impedance network is a network of one or more of resistors, capacitors, and inductors.
4. The time-multiplexed multi-level circuit of claim 1, wherein n is zero, and the 5 switching tubes are respectively: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 4 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4; the second switching tube T1 is connected in parallel with the first impedance network Z1, the third switching tube T2 is connected in parallel with the second impedance network Z2, the fourth switching tube T3 is connected in parallel with the third impedance network Z3, the fifth switching tube T4 is connected in parallel with the fourth impedance network Z4, one end of the second switching tube T1 is connected with a positive bus, and the other end of the second switching tube T1 is connected with one end of a third switching tube T2; the other end of the third switching tube T2 is connected with one end of a fourth switching tube T3, and is simultaneously connected with an alternating current output and one end of a first switching tube T0; the other end of the first switching tube T0 is connected with a PF end, the other end of the fourth switching tube T3 is connected with one end of the fifth switching tube T4, and the other end of the fifth switching tube T4 is connected with a negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for acquiring the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the second switch tube T1, the third switch tube T2, the fourth switch tube T3 and the fifth switch tube T4, and is used for controlling the switching state of each switch tube.
5. A time-division multiplexing multi-level circuit is characterized by comprising 5 switching tubes, 5 impedance networks and a detection and control unit; the 5 switch tubes are respectively as follows: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 5 impedance networks are respectively: a first impedance network Z1, a second impedance network Z2, a third impedance network Z3, a fourth impedance network Z4, and a fifth impedance network Z5; the second switching tube T1 is connected with the first impedance network Z1 in parallel, and the third switching tube T2 is connected with the second impedance network Z2 in parallel; the third impedance network Z3 and the fourth impedance network Z4 are connected in series and then connected in parallel with the fourth switching tube T3; the fifth switching tube T4 is connected in parallel with a fourth impedance network Z4; one end of the second switching tube T1 is connected to the positive bus, the other end of the second switching tube T1 is connected to one end of a third switching tube T2, the other end of the third switching tube T2 is connected to one end of a fourth switching tube T3, and one end of the third impedance network Z3 is connected to the third switching tube T2; the other end of the third impedance network Z3 is connected with one end of a fourth impedance network Z4, and is also connected with an alternating current output end and one end of a first switch tube T0; the other end of the first switching tube T0 is connected with a PF end, the other end of the fourth switching tube T3 is connected with one end of a fifth switching tube T4, and the other end of the fifth switching tube T4 is connected with a negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for detecting the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the first switch tube T1, the second switch tube T2, the third switch tube T3 and the fourth switch tube T4, and is used for controlling the switching state of each switch tube.
6. A time-division multiplexing multi-level circuit is characterized by comprising 5 switching tubes, 5 impedance networks and a detection and control unit; the 5 switch tubes are respectively as follows: a first switching tube T0, a second switching tube T1, a third switching tube T2, a fourth switching tube T3 and a fifth switching tube T4; the 5 impedance networks are respectively: a first impedance network Z0, a second impedance network Z1, a third impedance network Z2, a fourth impedance network Z3, and a fifth impedance network Z4; the second switch tube T1 is connected in parallel with the second impedance network Z1, the third switch tube T2 is connected in parallel with the third impedance network Z2, the fourth switch tube T3 is connected in parallel with the fourth impedance network Z3, the fifth switch tube T4 is connected in parallel with the fifth impedance network Z4, one end of the second switch tube T1 is connected to the positive bus, and the other end of the second switch tube T1 is connected to one end of the third switch tube T2; the other end of the third switching tube T2 is connected to one end of the fourth switching tube T3, and also connected to the ac output terminal and one end of the first impedance network Z0; the other end of the first impedance network Z0 is connected with one end of a first switch tube T0, the other end of the first switch tube T0 is connected with the PF end, the other end of a fourth switch tube T3 is connected with one end of a fifth switch tube T4, and the other end of the fifth switch tube T4 is connected with the negative bus; the detection and control unit is simultaneously connected with the positive bus, the negative bus and the PF end and is used for detecting the voltage of the bus to the ground; the detection and control unit is further connected with the driving ends of the first switch tube T0, the first switch tube T1, the second switch tube T2, the third switch tube T3 and the fourth switch tube T4, and is used for controlling the switching state of each switch tube.
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