CN204517686U - Voltage stabilizing full-wave rectifying circuit - Google Patents
Voltage stabilizing full-wave rectifying circuit Download PDFInfo
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- CN204517686U CN204517686U CN201520237528.0U CN201520237528U CN204517686U CN 204517686 U CN204517686 U CN 204517686U CN 201520237528 U CN201520237528 U CN 201520237528U CN 204517686 U CN204517686 U CN 204517686U
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Abstract
A kind of voltage stabilizing full-wave rectifying circuit, the resistance R0, voltage stabilizing didoe D, triode Q, homophase input amplifier and the anti-phase input amplifier that comprise input voltage port, be connected in series between input voltage port; Wherein, input voltage port comprises input voltage port 1 and input voltage port 2; Described triode Q is NPN type, and triode Q base stage is connected with the negative pole of voltage stabilizing didoe D, and triode Q collector electrode connects input voltage port 1, triode Q emitter and connects Wiring port 3; Described voltage stabilizing didoe D shunt capacitance C, voltage stabilizing didoe D positive pole connects input voltage port 2 and Wiring port 4 simultaneously; The left end of described Wiring port 3 electric connection resistance R1, resistance R3, the left side of Wiring port 4 electric connection resistance R6; The utility model can filtering, eliminate coupling by power supply, voltage is become more steady; Integral transformation precision is high, adopts full linear circuit, and minimum commutation voltage can be low to 0.01V.
Description
Technical field
The utility model relates to a kind of voltage stabilizing full-wave rectifying circuit, specifically a kind of voltage stabilizing full-wave rectifying circuit.
Background technology
Can be used for driving corresponding load just electric main all needs to become suitable direct current through the multistep treatment such as over commutation, filtering in use, in order to obtain more stable VD, before direct current exports, carry out voltage stabilizing to it is necessary; Market there is the voltage stabilizing IC of the integrated circuit of specialty; can protect output short-circuit; but price is higher and will change different voltage stabilizing IC as will be exported different magnitudes of voltage; and adopt triode to build voltage stabilizing circuit advantage of lower cost; during as there is output short-circuit; triode and outlet line can be burnt, there is security risk.
Utility model content
The purpose of this utility model be to provide a kind of can filtering, eliminate coupling by power supply, voltage is steady, and the voltage stabilizing full-wave rectifying circuit that integral transformation precision is high, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of voltage stabilizing full-wave rectifying circuit, the resistance R0, voltage stabilizing didoe D, triode Q, homophase input amplifier and the anti-phase input amplifier that comprise input voltage port, be connected in series between input voltage port; Wherein, input voltage port comprises input voltage port 1 and input voltage port 2; Described triode Q is NPN type, and triode Q base stage is connected with the negative pole of voltage stabilizing didoe D, and triode Q collector electrode connects input voltage port 1, triode Q emitter and connects Wiring port 3; Described voltage stabilizing didoe D shunt capacitance C, voltage stabilizing didoe D positive pole connects input voltage port 2 and Wiring port 4 simultaneously; The left end of described Wiring port 3 electric connection resistance R1, resistance R3, the left side of Wiring port 4 electric connection resistance R6; The structure of described homophase input amplifier is that the right-hand member of resistance R1 is connected with the in-phase input end of operational amplifier A 1, the inverting input of operational amplifier A 1 is connected with the output of operational amplifier A 1, and the output of operational amplifier A 1 connects the positive port of VOUT by resistance R2; The concrete structure of described anti-phase input amplifier is that the right-hand member of resistance R3 is connected with the inverting input of operational amplifier A 2, the inverting input of operational amplifier A 2 is connected with the output of operational amplifier A 2 through resistance R4, and the output of operational amplifier A 2 connects the positive port of VOUT by resistance R5, and the right-hand member of the in-phase input end contact resistance R6 of operational amplifier A 2, and the in-phase input end of operational amplifier A 2 connects VOUT negative terminal mouth, the in-phase input end ground connection simultaneously of operational amplifier A 2.
Further: described electric capacity C is tantalum electric capacity.
Further: the voltage between described Wiring port 3 and Wiring port 4 is Ui.
Further: the output voltage between the positive port of described VOUT, VOUT negative terminal mouth is Uo.
Further: described homophase input amplifier output voltage is U1.
Further: described reverse input amplifier output voltage is U2.
Compared with prior art, the beneficial effects of the utility model are:
1, in the utility model, electric capacity C plays filtering, eliminate the effect by the coupling of power supply, voltage is become more steady, electric current provides bias current through resistance R0 to voltage stabilizing didoe D, make voltage stabilizing didoe D reverse-conducting and terminal voltage is constant in voltage stabilizing value, the base stage of triode Q also accesses this voltage stabilizing point simultaneously, so the base voltage of Q " is stablized ", because the base-penetrate conducting voltage of triode Q is also a steady state value, and emitter voltage controls by base stage, therefore emitter voltage is stablized: voltage stabilizing didoe D voltage stabilizing value deducts triode Q base and penetrates in the stationary value of conducting voltage,
2, the utility model obtains output voltage Uo, if resistance R2 resistance equals resistance R5, then Uo=U1+U2 according to voltage superposition principle output voltage U1, output voltage U2 respectively by resistance R2, resistance R5 superposition; When input signal is at T0 ~ T1, Ui >=0, the output voltage U1=Ui of operational amplifier A 1, and the output voltage U2=0 of operational amplifier A 2, Uo=U1; When input signal is at T1 ~ T2, Ui≤0, the output voltage U1=0 of operational amplifier A 1, resistance R3 resistance equals R4, then the output voltage U2=-Ui of operational amplifier A 2, Uo=U2;
3, the utility model integral transformation precision is high, adopts full linear circuit, and minimum commutation voltage can be low to 0.01V.
Accompanying drawing explanation
Fig. 1 is the structural representation of voltage stabilizing full-wave rectifying circuit.
Fig. 2 is voltage input-output schematic diagram in voltage stabilizing full-wave rectifying circuit.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1 ~ 2, in the utility model embodiment, a kind of voltage stabilizing full-wave rectifying circuit, the resistance R0, voltage stabilizing didoe D, triode Q, homophase input amplifier and the anti-phase input amplifier that comprise input voltage port, be connected in series between input voltage port; Wherein, input voltage port comprises input voltage port 1 and input voltage port 2; Described triode Q is NPN type, and triode Q base stage is connected with the negative pole of voltage stabilizing didoe D, and triode Q collector electrode connects input voltage port 1, triode Q emitter and connects Wiring port 3; Described voltage stabilizing didoe D shunt capacitance C, electric capacity C is tantalum electric capacity, and voltage stabilizing didoe D positive pole connects input voltage port 2 and Wiring port 4 simultaneously; Voltage between described Wiring port 3 and Wiring port 4 is Ui; The left end of described Wiring port 3 electric connection resistance R1, resistance R3, the left side of Wiring port 4 electric connection resistance R6; In work, electric capacity C plays filtering, eliminates the effect of the coupling by power supply, voltage is become more steady, electric current provides bias current through resistance R0 to voltage stabilizing didoe D, make voltage stabilizing didoe D reverse-conducting and terminal voltage is constant in voltage stabilizing value, the base stage of triode Q also accesses this voltage stabilizing point simultaneously, so the base voltage of Q " is stablized ", because the base-penetrate conducting voltage of triode Q is also a steady state value, and emitter voltage controls by base stage, therefore emitter voltage is stablized: voltage stabilizing didoe D voltage stabilizing value deducts triode Q base and penetrates in the stationary value of conducting voltage; The structure of described homophase input amplifier is that the right-hand member of resistance R1 is connected with the in-phase input end of operational amplifier A 1, the inverting input of operational amplifier A 1 is connected with the output of operational amplifier A 1, and the output of operational amplifier A 1 connects the positive port of VOUT by resistance R2; The concrete structure of described anti-phase input amplifier is that the right-hand member of resistance R3 is connected with the inverting input of operational amplifier A 2, the inverting input of operational amplifier A 2 is connected with the output of operational amplifier A 2 through resistance R4, and the output of operational amplifier A 2 connects the positive port of VOUT by resistance R5, and the right-hand member of the in-phase input end contact resistance R6 of operational amplifier A 2, and the in-phase input end of operational amplifier A 2 connects VOUT negative terminal mouth, the in-phase input end ground connection simultaneously of operational amplifier A 2; Output voltage between the positive port of described VOUT, VOUT negative terminal mouth is Uo; Described homophase input amplifier (or voltage follower), its output voltage is U1; Described reverse input amplifier, its output voltage is U2; In work, obtain output voltage Uo, if resistance R2 resistance equals resistance R5, then Uo=U1+U2 according to voltage superposition principle output voltage U1, output voltage U2 respectively by resistance R2, resistance R5 superposition; When input signal is at T0 ~ T1, Ui >=0, the output voltage U1=Ui of operational amplifier A 1, and the output voltage U2=0 of operational amplifier A 2, Uo=U1; When input signal is at T1 ~ T2, Ui≤0, the output voltage U1=0 of operational amplifier A 1, resistance R3 resistance equals R4, then the output voltage U2=-Ui of operational amplifier A 2, Uo=U2; The utility model integral transformation precision is high, adopts full linear circuit, and minimum commutation voltage can be low to 0.01V.
To those skilled in the art, obvious the utility model is not limited to the details of above-mentioned one exemplary embodiment, and when not deviating from spirit of the present utility model or essential characteristic, can realize the utility model in other specific forms.Therefore, no matter from which point, all should embodiment be regarded as exemplary, and be nonrestrictive, scope of the present utility model is limited by claims instead of above-mentioned explanation, and all changes be therefore intended in the implication of the equivalency by dropping on claim and scope are included in the utility model.Any Reference numeral in claim should be considered as the claim involved by limiting.
In addition, be to be understood that, although this specification is described according to execution mode, but not each execution mode only comprises an independently technical scheme, this narrating mode of specification is only for clarity sake, those skilled in the art should by specification integrally, and the technical scheme in each embodiment also through appropriately combined, can form other execution modes that it will be appreciated by those skilled in the art that.
Claims (6)
1. a voltage stabilizing full-wave rectifying circuit, the resistance R0, voltage stabilizing didoe D, triode Q, homophase input amplifier and the anti-phase input amplifier that comprise input voltage port, be connected in series between input voltage port; It is characterized in that, wherein, input voltage port comprises input voltage port 1 and input voltage port 2; Described triode Q is NPN type, and triode Q base stage is connected with the negative pole of voltage stabilizing didoe D, and triode Q collector electrode connects input voltage port 1, triode Q emitter and connects Wiring port 3; Described voltage stabilizing didoe D shunt capacitance C, voltage stabilizing didoe D positive pole connects input voltage port 2 and Wiring port 4 simultaneously; The left end of described Wiring port 3 electric connection resistance R1, resistance R3, the left side of Wiring port 4 electric connection resistance R6; The structure of described homophase input amplifier is that the right-hand member of resistance R1 is connected with the in-phase input end of operational amplifier A 1, the inverting input of operational amplifier A 1 is connected with the output of operational amplifier A 1, and the output of operational amplifier A 1 connects the positive port of VOUT by resistance R2; The concrete structure of described anti-phase input amplifier is that the right-hand member of resistance R3 is connected with the inverting input of operational amplifier A 2, the inverting input of operational amplifier A 2 is connected with the output of operational amplifier A 2 through resistance R4, and the output of operational amplifier A 2 connects the positive port of VOUT by resistance R5, and the right-hand member of the in-phase input end contact resistance R6 of operational amplifier A 2, and the in-phase input end of operational amplifier A 2 connects VOUT negative terminal mouth, the in-phase input end ground connection simultaneously of operational amplifier A 2.
2. voltage stabilizing full-wave rectifying circuit according to claim 1, is characterized in that, described electric capacity C is tantalum electric capacity.
3. voltage stabilizing full-wave rectifying circuit according to claim 1, is characterized in that, the voltage between described Wiring port 3 and Wiring port 4 is Ui.
4. voltage stabilizing full-wave rectifying circuit according to claim 1, is characterized in that, the output voltage between the positive port of described VOUT, VOUT negative terminal mouth is Uo.
5. voltage stabilizing full-wave rectifying circuit according to claim 1, is characterized in that, described homophase input amplifier output voltage is U1.
6. voltage stabilizing full-wave rectifying circuit according to claim 1, is characterized in that, described reverse input amplifier output voltage is U2.
Priority Applications (1)
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CN201520237528.0U CN204517686U (en) | 2015-04-17 | 2015-04-17 | Voltage stabilizing full-wave rectifying circuit |
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CN201520237528.0U CN204517686U (en) | 2015-04-17 | 2015-04-17 | Voltage stabilizing full-wave rectifying circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114156966A (en) * | 2021-10-29 | 2022-03-08 | 科华数据股份有限公司 | Multistage power conversion circuit voltage stabilization method and device and power conversion system |
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2015
- 2015-04-17 CN CN201520237528.0U patent/CN204517686U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114156966A (en) * | 2021-10-29 | 2022-03-08 | 科华数据股份有限公司 | Multistage power conversion circuit voltage stabilization method and device and power conversion system |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150729 Termination date: 20160417 |