CN211045416U - Microelectronic chip packaging structure - Google Patents
Microelectronic chip packaging structure Download PDFInfo
- Publication number
- CN211045416U CN211045416U CN201921575287.5U CN201921575287U CN211045416U CN 211045416 U CN211045416 U CN 211045416U CN 201921575287 U CN201921575287 U CN 201921575287U CN 211045416 U CN211045416 U CN 211045416U
- Authority
- CN
- China
- Prior art keywords
- heat
- chip
- heat dissipation
- conducting plate
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a microelectronic chip packaging structure, which comprises a chip protective layer, a circuit board, a chip, a heat conducting plate, a heat dissipation groove and a rubber protective sleeve; the heat-conducting plate is welded at the top of the heat-conducting plate, heat-conducting columns are vertically welded at the top of the heat-conducting plate, welding points are arranged on the left side and the right side of the top of the circuit board, and the circuit board is located inside a chip protective layer; the chip protection layer left and right sides all is fixed the embedding has the stitch, the radiating groove has been seted up at chip protection layer top middle part. The utility model discloses the chip during operation, heat conduction silicone grease can give the heat-conducting plate with the heat conduction that the chip gived off, then the heat-conducting plate gives the heating panel through the heat conduction post with the heat conduction again, and heating panel rethread heat radiation fins distributes away the heat at last, and for traditional electronic chip packaging structure, this device makes electronic chip can obtain better heat dissipation at the during operation, and then has avoided electronic chip's overheated damage.
Description
Technical Field
The utility model relates to an electronic chip packaging technology field specifically is microelectronic chip packaging structure.
Background
The electronic chip is formed by welding a large number of miniature electronic elements on a circuit board to form an integrated circuit, and then implanting the integrated circuit board into a plastic substrate to finally form a highly integrated electronic chip.
However, the conventional package structure of the electronic chip, i.e. the plastic substrate, cannot help the chip to dissipate heat well in the actual working process of the electronic chip, and the package structure cannot protect the pins, so that the electronic chip is very easy to be damaged in the transportation process.
In order to solve the above problems, the present invention provides a microelectronic chip package structure.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a microelectronic chip packaging structure has solved the problem that proposes among the background art.
In order to achieve the above object, the utility model provides a following technical scheme: the microelectronic chip packaging structure comprises a chip protective layer, a circuit board, a chip, a heat conducting plate, a heat dissipation groove and a rubber protective sleeve;
the heat-conducting plate is welded at the top of the heat-conducting plate, heat-conducting columns are vertically welded at the top of the heat-conducting plate, welding points are arranged on the left side and the right side of the top of the circuit board, and the circuit board is located inside a chip protective layer;
pins are fixedly embedded in the left side and the right side of the chip protective layer, a heat dissipation groove is formed in the middle of the top end of the chip protective layer, a heat dissipation plate is fixedly embedded in the bottom of an inner cavity of the heat dissipation groove, heat dissipation fins are integrally formed at the top of the heat dissipation plate, and the top of each heat conduction column is vertically welded to the bottom of the heat dissipation plate;
the rubber protective sleeve is characterized in that a clamping groove is formed in the top of the rubber protective sleeve, the bottom of the chip protective layer is inserted into the clamping groove, pin grooves are symmetrically formed in the left side and the right side of an inner cavity of the clamping groove, and the pins are inserted into the two pin grooves respectively.
As a preferred embodiment of the present invention, a heat conductive silicone grease is coated between the heat conductive plate and the chip.
As a preferred embodiment of the present invention, the chip, the heat conductive silicone grease and the heat conductive plate are all located inside the chip protective layer.
As an embodiment of the present invention, the heat dissipation plate and the heat dissipation fins are both located in the inner cavity of the heat dissipation groove, and the heat dissipation plate and the heat dissipation fins are made of copper.
As an embodiment of the present invention, it is two sets of the stitch is connected with the welding point electric connection through the wiring.
Compared with the prior art, the beneficial effects of the utility model are as follows:
1. the utility model discloses microelectronic chip packaging structure, chip during operation, heat conduction silicone grease can give the heat-conducting plate with the heat conduction that the chip gived off, then the heat-conducting plate gives the heating panel through the heat conduction post with the heat conduction again, and heating panel rethread heat radiation fins distributes away the heat at last, and for traditional electronic chip packaging structure, this device makes electronic chip can obtain better heat dissipation at the during operation, and then has avoided electronic chip's overheated damage.
2. The utility model discloses microelectronic chip packaging structure, when electronic chip transports, the rubber protective sheath can be protected chip protective layer and stitch, receives the fracture that the extrusion caused the chip protective layer and the damage of stitch in avoiding the electronic chip transportation, has ensured the security of electronic chip transportation, has reduced the possibility of damage when electronic chip transports.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a front sectional view of a microelectronic chip package structure according to the present invention;
fig. 2 is a top view of the circuit board of the microelectronic chip package structure of the present invention.
In the figure: the heat dissipation structure comprises a rubber protective sleeve 1, pin grooves 2, pins 3, a clamping groove 4, a wiring 5, a heat dissipation plate 6, a heat dissipation fin 7, a heat conduction column 8, a heat conduction plate 9, heat conduction silicone grease 10, a chip 11, a circuit board 12, a welding point 13, a heat dissipation groove 14 and a chip protective layer 15.
Detailed Description
In order to make the technical means, creation features, achievement purposes and functions of the present invention easy to understand, the present invention is further described below with reference to the following embodiments.
Referring to fig. 1-2, the present invention provides a technical solution: the microelectronic chip packaging structure comprises a chip protective layer 15, a circuit board 12, a chip 11, a heat conducting plate 9, a heat dissipation groove 14 and a rubber protective sleeve 1;
a chip 11 is welded in the middle of the top end of the circuit board 12, a heat conducting plate 9 is arranged on the top of the chip 11, heat conducting columns 8 are vertically welded on the top of the heat conducting plate 9, welding points 13 are arranged on the left side and the right side of the top of the circuit board 12, and the circuit board 12 is located inside a chip protective layer 15;
pins 3 are fixedly embedded in the left side and the right side of the chip protective layer 15, a heat dissipation groove 14 is formed in the middle of the top end of the chip protective layer 15, a heat dissipation plate 6 is fixedly embedded in the bottom of an inner cavity of the heat dissipation groove 14, heat dissipation fins 7 are integrally formed on the top of the heat dissipation plate 6, and the top of the heat conduction column 8 is vertically welded to the bottom of the heat dissipation plate 6;
a clamping groove 4 is formed in the top of the rubber protective sleeve 1, the bottom of the chip protective layer 15 is inserted into the clamping groove 4, pin grooves 2 are symmetrically formed in the left side and the right side of an inner cavity of the clamping groove 4, and the pins 3 are inserted into the two pin grooves 2 respectively.
Wherein, heat conduction silicone grease 10 is coated between the heat conduction plate 9 and the chip 11.
The chip 11, the heat-conducting silicone grease 10 and the heat-conducting plate 9 are all located inside the chip protection layer 15.
The heat dissipation plate 6 and the heat dissipation fins 7 are both located in the inner cavity of the heat dissipation groove 14, and the heat dissipation plate 6 and the heat dissipation fins 7 are both made of copper.
Wherein, two sets of stitch 3 all through wiring 5 and welding point 13 electric connection.
It should be noted that, the utility model discloses a microelectronic chip packaging structure, including rubber protective sheath 1, stitch groove 2, stitch 3, draw-in groove 4, wiring 5, heating panel 6, heat radiation fin 7, heat conduction post 8, heat-conducting plate 9, heat conduction silicone grease 10, chip 11, circuit board 12, welding point 13, radiating groove 14, chip protective layer 15, the part is the general standard part or the part that technical staff in the field knows, and its structure and principle all can learn through the technical manual or learn through conventional experimental method for this technical staff.
The theory of operation, chip 11 during operation, heat conduction silicone grease 10 can give heat-conducting plate 9 with the heat conduction that chip 11 gived off, then heat-conducting plate 9 rethread heat conduction column 8 gives heating panel 6 with the heat conduction, heating panel 6 rethread heat radiation fins 7 distributes away the heat at last, for traditional electronic chip packaging structure, this device makes electronic chip can obtain better heat dissipation at the during operation, and then avoided electronic chip's overheated damage, when electronic chip transports, rubber protective cover 1 can protect chip protective layer 15 and stitch 2, avoid receiving the fracture and the damage of stitch 2 that the extrusion led to the fact chip protective layer 15 in the electronic chip transportation, the security of electronic chip transportation has been ensured, the possibility of damage when having reduced electronic chip transports.
The basic principles and the main features of the invention and the advantages of the invention have been shown and described above, it will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, but that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (5)
1. The microelectronic chip packaging structure is characterized by comprising a chip protection layer (15), a circuit board (12), a chip (11), a heat conduction plate (9), a heat dissipation groove (14) and a rubber protective sleeve (1);
the heat-conducting module is characterized in that a chip (11) is welded in the middle of the top end of the circuit board (12), a heat-conducting plate (9) is arranged at the top of the chip (11), heat-conducting columns (8) are vertically welded at the top of the heat-conducting plate (9), welding points (13) are arranged on the left side and the right side of the top of the circuit board (12), and the circuit board (12) is located inside a chip protective layer (15);
pins (3) are fixedly embedded in the left side and the right side of the chip protective layer (15), a heat dissipation groove (14) is formed in the middle of the top end of the chip protective layer (15), a heat dissipation plate (6) is fixedly embedded in the bottom of an inner cavity of the heat dissipation groove (14), heat dissipation fins (7) are integrally formed on the top of the heat dissipation plate (6), and the top of the heat conduction column (8) is vertically welded to the bottom of the heat dissipation plate (6);
draw-in groove (4) have been seted up at rubber protective sheath (1) top, insert in draw-in groove (4) chip protective layer (15) bottom, pin groove (2) have been seted up to draw-in groove (4) inner chamber left and right sides symmetry, and are two sets of pin (3) insert respectively in two sets of pin groove (2).
2. The microelectronic chip package structure according to claim 1, wherein: and heat-conducting silicone grease (10) is coated between the heat-conducting plate (9) and the chip (11).
3. The microelectronic chip package structure according to claim 1, wherein: the chip (11), the heat-conducting silicone grease (10) and the heat-conducting plate (9) are all located inside the chip protective layer (15).
4. The microelectronic chip package structure according to claim 1, wherein: the heat dissipation plate (6) and the heat dissipation fins (7) are both located in the inner cavity of the heat dissipation groove (14), and the heat dissipation plate (6) and the heat dissipation fins (7) are both made of copper.
5. The microelectronic chip package structure according to claim 1, wherein: and the two groups of pins (3) are electrically connected with the welding points (13) through the wiring (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921575287.5U CN211045416U (en) | 2019-09-21 | 2019-09-21 | Microelectronic chip packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921575287.5U CN211045416U (en) | 2019-09-21 | 2019-09-21 | Microelectronic chip packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211045416U true CN211045416U (en) | 2020-07-17 |
Family
ID=71563229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921575287.5U Expired - Fee Related CN211045416U (en) | 2019-09-21 | 2019-09-21 | Microelectronic chip packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211045416U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113130409A (en) * | 2021-04-22 | 2021-07-16 | 牛桂平 | Face detection chip for face recognition device |
-
2019
- 2019-09-21 CN CN201921575287.5U patent/CN211045416U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113130409A (en) * | 2021-04-22 | 2021-07-16 | 牛桂平 | Face detection chip for face recognition device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200717 Termination date: 20210921 |