CN210956633U - 支撑件和用于制造晶片的装置 - Google Patents

支撑件和用于制造晶片的装置 Download PDF

Info

Publication number
CN210956633U
CN210956633U CN201921892292.9U CN201921892292U CN210956633U CN 210956633 U CN210956633 U CN 210956633U CN 201921892292 U CN201921892292 U CN 201921892292U CN 210956633 U CN210956633 U CN 210956633U
Authority
CN
China
Prior art keywords
support
arms
frame
reaction chamber
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201921892292.9U
Other languages
English (en)
Inventor
R·安扎隆
N·法拉泽托
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of CN210956633U publication Critical patent/CN210956633U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/01—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. substrates subsequently removed by etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/32—Carbides
    • C23C16/325—Silicon carbide
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4581—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • C23C16/4585—Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02378—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02529—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

本公开的各实施例涉及支撑件和用于制造晶片的装置。各种实施例提供了用于制造诸如SiC晶片的晶片的装置。装置包括具有多个用于支撑基板的臂的支撑件。臂允许支撑件和基板之间的物理接触最小化。结果，当基板熔化时，臂和所融化的材料之间的表面张力减小，并且所融化的材料将不太可能粘附到支撑件上。

Description

支撑件和用于制造晶片的装置
技术领域
本公开涉及支撑件和用于制造晶片的装置。
背景技术
半导体器件通常在硅晶片中制造。然而，至少部分地由于SiC的化学物理性质，碳化硅(SiC)晶片已经变得越来越流行。例如，SiC通常具有比硅更高的带隙。结果，即使相对薄的厚度，SiC也比硅具有更高的击穿电压。因此，SiC对于具有高电压的应用，例如电力应用是期望的。
SiC可能以多种不同的晶体结构或多型形式出现。最常见的多型是立方多型(3C多型)，六边形多型(4H和6H多型)和菱形多型(15R多型)。3C SiC晶片与其他晶片多型相比具有独特的性能。例如，与4H SiC晶片相比，3C SiC晶片通常具有较低的陷阱密度和/或较高的沟道电子迁移率。
实用新型内容
本公开至少解决了熔化的硅有时有时会粘附或粘着在支撑件本身上的问题。
根据本公开的第一方面，提供了一种用于制造晶片的装置，包括：腔室；在腔室中的容器；在腔室中和容器上的支撑件，支撑件包括：框、框中的开口、和多个臂，多个臂中的每个臂具有固定端和与固定端相对的自由端，固定端被附接到框，自由端延伸进入开口并且被悬挂在容器上。
在一些实施例中，多个臂中的每个臂从框并且朝向开口的中心延伸。
在一些实施例中，多个臂中的每个臂包括主体部分和凸起部分，主体部分具有附接到框的第一端和附接到凸起部分的第二端。
在一些实施例中，凸起部分包括上表面和多个成角度的侧表面。
在一些实施例中，框和开口具有圆形形状。
在一些实施例中，装置还包括：加热器，被配置为加热腔室；输入管道，被配置为将气体引入到腔室中；和输出管道，被配置为从腔室移除气体。
在一些实施例中，容器包括侧壁，并且支撑件被定位在侧壁上。
根据本公开的第二方面，提供了一种支撑件，包括：框；框中的开口；和延伸到开口中的多个臂，多个臂中的每个臂从框被悬臂伸出。
在一些实施例中，多个臂包括具有第一长度的第一组臂、以及具有第二长度的第二组臂，第二长度大于第一长度。
在一些实施例中，多个臂中的每个臂包括：主体部分，被耦合至框；以及凸起部分，被耦合至主体部分。
在一些实施例中，凸起部分包括上表面和多个成角度的侧表面。
在一些实施例中，主体部分包括上表面和多个成角度的侧表面。
在一些实施例中，凸起部分的上表面被定位在主体部分的上表面之上。
在一些实施例中，主体部分的上表面与框的表面基本共面。
本公开的实施例的优点在于，当基板熔化时，臂和所熔化的材料之间的表面张力减小，并且所熔化的材料将不太可能粘附到支撑件本身。
本公开涉及用于制造诸如碳化硅(SiC)晶片的半导体晶片的装置。
根据一个实施例，该装置包括主体、加热器、输入管、输出管道、支撑件和容器。支撑件位于容器上和反应室中。支撑件包括用于支撑诸如硅基板的基板或晶片的多个臂。臂允许支撑件和基板之间的物理接触最小化。结果，当基板熔化时，臂和所熔化的材料之间的表面张力减小，并且所熔化的材料将不太可能粘附到支撑件本身。
附图说明
图1是根据本公开的实施例的装置的截面图。
图2是根据本公开的实施例的支撑件的透视图。
图3是图2的支撑件的平面图。
图4是沿图3所示的轴线的支撑件的截面图。
图5是沿图3所示的轴线的支撑件的截面图。
图6是图2的支撑件的臂的放大透视图。
图7是图6的臂的放大平面图。
图8是臂沿图7所示的轴的放大截面图。
图9至图13是示出根据本文公开的实施例的使用图1的装置制造晶片的方法的各个阶段的截面图。
具体实施方式
在以下描述中，阐述了某些特定细节以便提供对本公开的各种实施例的透彻理解。然而，本领域技术人员将理解，可以在没有这些具体细节的情况下实践本公开。在一些情况下，未描述与例如反应室，制造工艺和/或半导体晶片相关联的众所周知的细节，以避免使本公开的实施例的描述不清楚。
在整个说明书中，对“一个(one)实施例”或“一(a)实施例”的引用意味着结合该实施例描述的特定特征，结构或特性包括在至少一个实施例中。因此，在整个说明书中各处出现的短语“在一个(one)实施例中”或“一(a)实施例中”不一定都指的是同一实施例。此外，在一个或多个实施例中，可以以任何合适的方式组合特定的特征、结构或特性。
在附图中，相同的附图标记表示相似的特征或元件。附图中特征的尺寸和相对位置不必按比例绘制。
在标题为“用于制造碳化硅晶片的装置(APPARATUS FOR MANUFACTURING ASILICON CARBIDE WAFER)”的美国专利申请号15/715,940中公开了一种用于制造碳化硅(SiC)晶片的解决方案。美国专利申请号15/715,940中公开的SiC晶片的制造包括例如将硅基板放置在具有多个条和开口的支撑件上，在硅基板上生长3C-SiC外延层，然后通过熔化硅基板将硅基板与3C-SiC外延层分离。熔化的硅通过支撑体中的多个开口排入容器中。此后，发明人发现美国专利申请号15/715,940中公开的支撑件可能不总是将熔化的硅适当地排入容器中。而是，发明人发现，由于熔化的硅与支撑件之间的表面张力，熔化的硅有时有时会粘附或粘着在支撑件本身上。
本文描述了一种用于制造诸如SiC晶片的晶片的改进的装置和方法。如美国专利申请号15/715,940中所述，该装置可以解决与制造SiC晶片相关的一个或多个问题。
图1是根据一个实施例的装置10的截面图。装置10包括主体12、加热器14、输入管道16、输出管道18、支撑件20和容器22。
主体12形成反应室24。反应室24提供用于发生各种反应的封闭空间。支撑件20和容器22位于反应室24内。在一个实施例中，主体12由绝缘材料制成，该绝缘材料使反应室24与外部环境热绝缘。
加热器14被耦合到主体12。加热器14加热反应室24和反应室24内的任何内容物(例如，支撑件20、容器22、气体、基板、晶片或其他各种物体)。加热设备14可以是任何类型的加热设备。例如，加热器14可以是包括例如多个线圈的感应式加热器；包括例如覆盖有碳化物的电阻器的电阻加热器；等等
输入管道16提供从装置10外部的环境进入反应室24的流体路径。在一个实施例中，如下面将参照图9至图13进一步详细讨论的，输入管道16用于将前体和气体输入到反应室24中。
输出管道18提供从反应室24到反应室24外部的环境的流体路径。在一个实施例中，如下面将参照图9至图13更详细地讨论的，输出管道18为用于从反应室24排出反应气体。
在一个实施例中，装置10是水平通量反应室。在该实施例中，如图1所示，输入管道16和输出管道18彼此水平对准，并且气体沿着例如支撑件20的上表面纵向流动。其他配置也是可能的。例如，在一个实施例中，装置10是竖直通量反应室。在该实施例中，输入管道16和输出管道18彼此竖直对准，并且气体横向于例如支撑件20的上表面横向流动。
支撑件20位于容器22上并且在反应室24中。支撑件20提供了一个平台，以在反应室24内接收和保持各种物体，例如基板或晶片。下面参照图9至图13更详细地描述，在制造SiC晶片期间，将硅基板放置在支撑件20上。支撑件20通常被称为基座。
如将在下面关于图2至图8更详细地讨论的，支撑件20包括框26，该框26定位在容器22上并由容器22支撑；并且框20设置在容器22上。开口28提供排水，材料可在其中流过；多个臂30支撑例如硅基板。
容器22被定位在反应室24中并且直接位于支撑件20的下面。支撑件20搁置在容器22上。容器22收集通过支撑件20的开口28排出的任何材料。容器22包括基座。底部32直接位于支撑件20的开口28和臂30的下面。侧壁34直接位于支撑件20的框26的下面。在一个实施例中，侧壁34与支撑件20的框26直接物理接触。
图2是根据本公开的一实施例的支撑件20的透视图。图3是根据本公开的实施例的支撑件20的平面图。图4是根据本公开的实施例的支撑件20沿图3所示的轴线的截面图。图5是根据本公开的实施例的支撑件20沿图3所示的轴线的截面图。一起回顾图2至5是有益的。支撑件20包括框26、开口28和臂30。
框26将多个臂30物理地耦合在一起。如先前关于图1所论述，框26搁置在容器22的侧壁34上。框26可具有任何形状。例如，框26的形状可以是圆形或矩形。在一个实施例中，如图3最佳所示，支撑件20具有圆形形状。
开口28被形成在框26中。换句话说，开口28被框26围绕和包围。开口28提供排水口，材料可以流过该排水口。例如，如将在下面相对于图9至图13进一步详细讨论的，硅基板被放置在支撑件20上并且被熔化并通过开口28排出。
臂30通过框26彼此物理耦合，并且从框26悬臂伸出。特别地，如图1和图2最佳所示，多个臂中的每个具有固定端，该固定端附接至框26。与固定端相对的自由端悬挂在容器22上。在一个实施例中，如图2至3最佳所示，臂30从框26朝开口28的中心延伸。臂30用于在反应室24内支撑基板或晶片。例如，如将在下面进一步详细讨论的，将硅基板放置在支撑体20上以制造SiC晶片。
在一实施例中，臂30中的所有臂也可具有相同的长度。在另一个实施例中，臂30具有变化的长度。例如，在一个实施例中，臂30包括多组臂，每组臂具有不同的长度。例如，如图2和图3最佳所示，臂30包括两组臂：第一组臂36具有第一长度L1，第二组臂38具有第二长度L2，第二长度L2小于第一长度L1。第一长度L1。通过具有多组具有不同长度的臂，支撑件20能够支撑不同尺寸的晶片。例如，参考图3，第一组臂36被构造成支撑具有轮廓的第一圆形基板40，所述第一轮廓具有第一半径，第二组臂38被构造成支撑具有轮廓42的第二圆形基板，第二半径大于第一半径。
在一个实施例中，臂30中的所有臂均位于同一平面内。例如，如图3至图5所示，第一组臂36和第二组臂38位于同一平面内。在另一个实施例中，臂30可以具有定位在不同的平行平面中的臂。例如，在一个实施例中，第一组臂36位于第一平面中，而第二组臂38位于第二平面中，该第二平面在第一平面之上并与第一平面平行。换句话说，第二组臂38位于第一组臂36的上方。具有位于不同平面中的臂使与定位在支撑件20上的基板接触的臂的数量最小化。轮廓42位于第二组臂38上，第二圆形基板将不与第一组臂36接触，因为第一组臂36位于第二组臂38下方。
在一个实施例中，多组臂中的臂以交替的方式定位。例如，如图2和3最佳所示，第一组臂36与第二组臂38围绕框26交替放置。
尽管第一组臂36和第二组臂38均包括四个臂，但是多组臂中的每组臂可包括任意数目的臂。例如，第一组臂36可以包括3、5、6或8个臂。
在一个实施例中，臂30彼此间隔开。例如，如图2至图3最佳所示，臂30通过开口28彼此间隔开。使臂30彼此间隔开确保了臂30不会阻塞或阻碍通过该开口排出的材料。28。
在一个实施例中，臂30沿着框26彼此间隔基本相等的距离。例如，参考图3，臂30沿着框26彼此间隔开距离D1。
如前所述，在一个实施例中，臂30包括多组臂，每组臂具有不同的长度。在一个实施例中，每组臂的臂沿着框26彼此间隔基本相等的距离。例如，参考图3，第一组臂36可以彼此分开第二距离D2。类似地，第二组臂38可以彼此分开第三距离D3。在一个实施例中，第二距离D2和第三距离D3基本上彼此相等。
如前所述，美国专利申请号15/715,940中公开的支撑件可能不总是将熔化的硅适当地排入容器中。而是，发明人发现，由于熔化的硅与支撑件之间的表面张力，熔化的硅有时会粘附或粘着在支撑件本身上。为了解决这个问题，在一个或多个实施例中，臂30被配置为最小化臂30与放置在臂30上的基板(例如，硅基板)之间的物理接触。通过使臂30与基板30之间的物理接触最小化。放置在臂30上的基板，当基板熔化时，臂30与熔融材料(例如，熔化的硅)之间的表面张力减小。结果，熔融材料将不太可能粘附或粘在臂30上，而是从臂30流出并流入容器22。
图6是根据本公开的实施例的支撑件20的臂30的放大透视图。图7是臂30的放大平面图，图8是臂30沿图7所示的轴线的放大剖视图。将图6至图8一起回顾是有益的。臂30包括主体部分44和凸起部分46。
主体部分44包括物理地耦合到框26的第一端和物理地耦合到凸起部分46的第二端。在一个实施例中，如图2至图3最佳所示，臂30从框26朝着臂26延伸。主体部分44用于将凸起部分46定位成远离框26。这确保了当将基板放置在凸起部分46上然后熔化时，熔化的材料不会流到开口28的中心。框26，并流入容器22。主体部分44包括上表面48和侧面50。
主体部分44的上表面48是平面。在一个实施例中，上表面48与框26的上表面52基本共面。
主体部分44的侧表面50是倾的(slanted)或倾斜的表面。侧表面50向下倾斜或平铺，使得熔化的材料可以容易地从主体部分33滑出，通过开口28滑入容器22。
凸起部分46物理地耦合至主体部分44。凸起部分46用于将基板支撑在反应室24内。凸起部分46包括上表面54和侧面56。
凸起部分46的上表面54提供了平坦的表面，以使基板搁置在其上。例如，如将在下面关于图9更详细地讨论的，在SiC晶片的制造期间，硅基板被定位在上表面54上。在一个实施例中，凸起部分46的上表面54和主体部分44的上表面48基本彼此平行。
上表面54使得支撑件20与放置在支撑件20上的基板(特别是臂30)之间的物理接触最小化。即，当将基板放置在上表面54上时，基板将物理接触上表面54，但是将不物理接触支撑件20的其余部分(例如，框26，臂30的主体部分44和凸起部分46的侧面56等)。因此，当基板熔化时，支撑件20和熔融材料(例如，熔化的硅)之间的表面张力减小。结果，熔融材料不太可能粘附或粘在臂30上，而是从臂30流出并流入容器22。
类似于主体部分44的侧面50的凸起部分46的侧面56向下斜或倾斜，使得熔化的材料可以容易地通过开口46滑出凸起部分46，穿过开口28，并且进入容器22。凸起部分46可包括任意数目的侧表面56(例如，一个、三个、四个、五个侧表面)。例如，在图6至图8所示的实施例中，凸起部分46是金字塔形的，具有四个侧面56和在金字塔的顶点处的上表面54。作为另一个示例，凸起部分46可以是锥形的，具有单个侧面56和在锥的顶点处的上表面54。
凸起部分46将放置在其上表面54上的基板升高或凸起，使其位于主体部分44和/或框26的上方。例如，如图8所示，上表面54凸起到基板46的上表面48的上方距离为D4。在一个实施例中，距离D4在0.5至3毫米之间。如将参考图13更详细地讨论的，使位于凸起部分46上的基板，特别是凸起部分46的上表面54凸起，允许蚀刻气体流动并接触基板的下表面。
支撑件20可以由多种材料制成。例如，支撑件20可以由石墨、铁、铜、铝、镍等制成。在一个实施例中，支撑件20由具有高熔化温度的材料制成，使得支撑件20在加热器14接通时不会熔化。在一个实施例中，支撑件20的熔化温度大于旨在在反应室24中熔化的基板的熔化温度。
在一个实施例中，包括框26和臂30的支撑件20是单个连续件。例如，支撑件20可以由单件材料形成。
可以使用各种制造技术来制造支撑件20。例如，可以通过使用成形压力机冲压材料的平板来制造支撑件20。
图9至图13是示出根据本文公开的实施例的使用图1的装置制造晶片的方法的各个阶段的截面图。在图9至图13所示的实施例中，制造了SiC晶片，例如3C SiC晶片。注意，为了简单起见，在图9至图13中未示出主体12、加热器14、输入导管16和输出导管18。
如图9所示，第一材料的基板放置在支撑体20上，并在反应室24中。在图9所示的实施例中，硅基板58放置在支撑体20上，并在反应室24中。硅基板58位于臂30的凸起部分46的上表面54上。在一个实施例中，硅基板58具有晶体结构。在一个实施例中，当硅基板58位于支撑件20上时，反应室24处于室温。
一旦将硅基板58放置在支撑件20上，就将反应室24密封并由加热器14加热至第一温度。在一个实施例中，第一温度在450至550摄氏度之间。反应室24也被设置为具有第一压力水平。在一个实施例中，第一压力水平在8E-5和12E-5巴之间。
在将反应室24加热到第一温度之后，通过加热器14将反应室24加热到大于第一温度的第二温度。在一个实施例中，第二温度在1050至1150摄氏度之间。反应室24也被设置为具有大于第一压力水平的第二压力水平。在一个实施例中，第二压力水平在75-125mbar之间。
在剩余的过程中，反应室24保持在第二压力水平。
在将反应室24加热到第二温度之后，将硅基板58浸入氢(H2)中。H2通过输入管道16被引入反应室24中。另外，硅基板58通过将氯化氢(HCl)通过输入管道16被引入反应室24中而经受活化操作。
然后通过加热器14将反应室10加热至大于第二温度的第三温度。在一个实施例中，第三温度在1340至1400摄氏度之间。
在将反应室24加热至第三温度时或之后，将碳前体通过输入导管16引入反应室24中。碳前体将硅基板26的表面硅原子碳化以形成例如3C SiC的SiC薄层(例如几纳米的数量级)。这通常称为斜坡碳化。如下所述，SiC薄层充当SiC生长的种子。
一旦反应室24处于第三温度，就将硅前体添加到反应室24中的碳前体中。通过将硅前体引入反应室24中，第二材料层开始生长。特别地，如图10所示，第一SiC层60开始从SiC薄层开始外延生长。这通常被称为异质外延生长。
在保持H2通过输入管道16流入反应室24中的同时，进行熔化过程。特别地，反应室24被加热器14加热到第四温度。第四温度大于硅基板58的熔化温度并且小于第一SiC层60的熔化温度。在一个实施例中，第四温度在1550至1650摄氏度之间。结果，如图11所示，硅基板58熔化并排到容器22中。也就是说，硅基板58的熔化的硅材料66从支撑件20的上侧62穿过开口28流动，硅基板58的熔化的硅材料66被收集在容器22中。
如前所述，上表面54允许支撑件20与放置在支撑件20上的基板之间的物理接触被最小化。在这种情况下，由于将硅基板58放置在臂30的凸起部分46的上表面54上，所以硅基板58将物理接触上表面54，但不会物理接触支撑件20的其余部分(例如，框26，臂30的主体部分44和凸起部分46的侧面56等)。因此，当硅基板58熔化时，支撑件20和熔化的硅材料66之间的表面张力减小。结果，熔化的硅材料66不太可能粘附或粘在臂30上，而是从臂30流出并流入容器22。
此外，如前所述，臂30的主体部分44和凸起部分46分别具有侧表面50和侧表面56，它们分别向下斜或倾斜。结果，熔化的硅材料66可以容易地从臂30滑出，穿过开口28，并滑入容器22中。
在一个实施例中，保持反应室24的第四温度，直到从第一SiC层60移除所有硅基板58为止。
在一个实施例中，保持反应室24的第四温度直到硅基板58基本上熔化并与第一SiC层60分离。例如，如图11所示，反应室24的第四温度可以是保持直到硅基板58的小的残余部分70(例如，硅材料的薄层)保留在支撑件20上。在该实施例中，如将参照图13更详细地讨论的，硅基板58的残余部分70被保留。通过随后的蚀刻工艺移除硅基板58。
如图12所示，硅和碳前驱体的流通过输入导管16被引入反应室24。通过将硅和碳前驱体引入反应室24，第一SiC层60的厚度继续增长。换句话说，第二SiC层68开始在第一SiC层60上生长。这通常被称为同质外延生长。在一个实施例中，硅与碳前驱物的流动与硅基板58的熔化同时进行。在一个实施例中，硅与碳前驱物的流动在硅基板58的熔化过程完成之后执行。
当第二SiC层68达到期望的厚度时，硅和碳前体的流动停止。此外，反应室24中的任何反应气体通过输出管道18从反应室24中移除。
如先前所论述，在一个实施例中，维持反应室24的第四温度，直到从第一SiC层60移除所有硅基板58为止。在该实施例中，在第二SiC层68达到期望的厚度之后，将反应室10关闭，排气并返回较低的温度(例如，室温)。在一个实施例中，随后将所得的SiC晶片72浸入H2或Ar中。
如前所述，在一个实施例中，保持反应室24的第四温度，直到硅基板58基本上熔化并与第一SiC层60分离为止。在该实施例中，在第二SiC层68达到期望的厚度之后，然后通过随后的蚀刻工艺移除硅基板58的残留部分70。如图13所示，通过输入管道16将诸如盐酸(HCl)之类的蚀刻气体引入反应室24中。然后，将仍耦合至第一SiC层60的硅基板58的剩余部分70。通过蚀刻气体移除。移除的硅基板58的残留部分70被收集在容器22中。一旦移除了硅基板58的残留部分70，则将反应室10关闭，排气并返回较低的温度(例如，室内温度)。在一个实施例中，随后将所得的SiC晶片72浸入H2或Ar中。
注意，由于臂30的凸起部分46升高或凸起第一SiC层60、第二SiC层68和残余部分70至主体部分44和/或框26的上方，因此可以通过随后的蚀刻工艺移除硅基板58的残余部分70。通过凸起第一SiC层60、第二SiC层68和残余部分70，蚀刻气体能够流动以接触残余部分70，它们位于第一SiC层60的下方。
尽管已经就制造SiC晶片对装置10进行了较大的讨论，但是装置10可用于第一材料层被融化以及与第二材料层分离的任何工艺中。
各个实施例提供了一种用于制造诸如SiC晶片的晶片的装置和方法。该装置包括具有用于支撑诸如硅基板的基板的多个臂的支撑件。臂被配置为最小化支撑件与基板之间的物理接触。结果，当基板熔化时，臂和所融化的材料之间的表面张力减小，并且所融化的材料将不太可能粘附或粘着到支撑件上。
可以将上述各种实施例组合以提供其他实施例。可以根据以上详细描述对实施例进行这些和其他改变。通常，在以下权利要求中，所使用的术语不应解释为将权利要求限制为说明书和权利要求中公开的特定实施例，而应解释为包括所有可能的实施例以及权利要求所限定的等同物的全部范围。因此，权利要求不受公开内容的限制。

Claims (14)

1.一种用于制造晶片的装置，其特征在于，包括：
腔室；
在所述腔室中的容器；
在所述腔室中和所述容器上的支撑件，所述支撑件包括：框、所述框中的开口、和多个臂，所述多个臂中的每个臂具有固定端和与所述固定端相对的自由端，所述固定端被附接到所述框，所述自由端延伸进入所述开口并且被悬挂在所述容器上。
2.根据权利要求1所述的装置，其特征在于，所述多个臂中的每个臂从所述框并且朝向所述开口的中心延伸。
3.根据权利要求1所述的装置，其特征在于，所述多个臂中的每个臂包括主体部分和凸起部分，所述主体部分具有附接到所述框的第一端和附接到所述凸起部分的第二端。
4.根据权利要求3所述的装置，其特征在于，所述凸起部分包括上表面和多个成角度的侧表面。
5.根据权利要求1所述的装置，其特征在于，所述框和所述开口具有圆形形状。
6.根据权利要求1所述的装置，其特征在于，还包括：
加热器，被配置为加热所述腔室；
输入管道，被配置为将气体引入到所述腔室中；和
输出管道，被配置为从所述腔室移除所述气体。
7.根据权利要求1所述的装置，其特征在于，所述容器包括侧壁，并且所述支撑件被定位在所述侧壁上。
8.一种支撑件，其特征在于，包括：
框；
所述框中的开口；和
延伸到所述开口中的多个臂，所述多个臂中的每个臂从所述框被悬臂伸出。
9.根据权利要求8所述的支撑件，其特征在于，所述多个臂包括具有第一长度的第一组臂、以及具有第二长度的第二组臂，所述第二长度大于所述第一长度。
10.根据权利要求8所述的支撑件，其特征在于，所述多个臂中的每个臂包括：主体部分，被耦合至所述框；以及凸起部分，被耦合至所述主体部分。
11.根据权利要求10所述的支撑件，其特征在于，所述凸起部分包括上表面和多个成角度的侧表面。
12.根据权利要求11所述的支撑件，其特征在于，所述主体部分包括上表面和多个成角度的侧表面。
13.根据权利要求12所述的支撑件，其特征在于，所述凸起部分的所述上表面被定位在所述主体部分的所述上表面之上。
14.根据权利要求12所述的支撑件，其特征在于，所述主体部分的所述上表面与所述框的表面基本共面。
CN201921892292.9U 2018-11-06 2019-11-05 支撑件和用于制造晶片的装置 Active CN210956633U (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/182,050 2018-11-06
US16/182,050 US11309177B2 (en) 2018-11-06 2018-11-06 Apparatus and method for manufacturing a wafer

Publications (1)

Publication Number Publication Date
CN210956633U true CN210956633U (zh) 2020-07-07

Family

ID=70459859

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201911073157.6A Pending CN111146139A (zh) 2018-11-06 2019-11-05 用于制造晶片的装置和方法
CN201921892292.9U Active CN210956633U (zh) 2018-11-06 2019-11-05 支撑件和用于制造晶片的装置

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CN201911073157.6A Pending CN111146139A (zh) 2018-11-06 2019-11-05 用于制造晶片的装置和方法

Country Status (2)

Country Link
US (2) US11309177B2 (zh)
CN (2) CN111146139A (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11309177B2 (en) 2018-11-06 2022-04-19 Stmicroelectronics S.R.L. Apparatus and method for manufacturing a wafer
IT201900015416A1 (it) * 2019-09-03 2021-03-03 St Microelectronics Srl Apparecchio per la crescita di una fetta di materiale semiconduttore, in particolare di carburo di silicio, e procedimento di fabbricazione associato
IT202000028778A1 (it) 2020-11-27 2022-05-27 St Microelectronics Srl Procedimento di fabbricazione di una fetta di sic con controllo dello stress residuo
SE2150284A1 (en) * 2021-03-11 2022-07-19 Kiselkarbid I Stockholm Ab System and method of producing monocrystalline layers on a substrate

Family Cites Families (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3108818A (en) * 1959-12-14 1963-10-29 Felt Products Mfg Co Fluid transfer seal for gasket
US3777009A (en) 1971-08-05 1973-12-04 Little Inc A Method for direct melt synthesis of intermetallic compounds
US3922712A (en) * 1974-05-01 1975-11-25 Gen Motors Corp Plastic power semiconductor flip chip package
US4582561A (en) 1979-01-25 1986-04-15 Sharp Kabushiki Kaisha Method for making a silicon carbide substrate
US4537651A (en) 1981-05-22 1985-08-27 United Technologies Corporation Method for removing semiconductor layers from salt substrates
US4574730A (en) 1984-02-27 1986-03-11 Northern Telecom Limited Melt dispensing liquid phase epitaxy boat
JPS61150366A (ja) 1984-12-25 1986-07-09 Nec Corp Ｍｉｓ型メモリ−セル
IL98530A (en) 1990-06-25 1996-06-18 Lanxide Technology Co Ltd Methods for creating self-supporting compound bodies and objects produced by them using parent metals in the form of vapors and elemental oxidants
US5183529A (en) 1990-10-29 1993-02-02 Ford Motor Company Fabrication of polycrystalline free-standing diamond films
JPH05208900A (ja) 1992-01-28 1993-08-20 Nisshin Steel Co Ltd 炭化ケイ素単結晶の成長装置
US5923408A (en) * 1996-01-31 1999-07-13 Canon Kabushiki Kaisha Substrate holding system and exposure apparatus using the same
FR2775328B1 (fr) * 1998-02-26 2000-04-28 Christian Loth Joint d'etancheite pour bride de tuyauterie
JP3707726B2 (ja) 2000-05-31 2005-10-19 Ｈｏｙａ株式会社 炭化珪素の製造方法、複合材料の製造方法
CA2412853C (en) 2000-06-15 2009-08-25 Geoffrey Alan Scarsbrook Single crystal diamond prepared by cvd
DE50313283D1 (de) * 2002-09-06 2011-01-05 Fraunhofer Ges Forschung Glasartiges flächensubstrat, seine verwendung und verfahren zu seiner herstellung
US8277760B2 (en) 2003-09-19 2012-10-02 Applied Biosystems, Llc High density plate filler
ITMI20050962A1 (it) 2005-05-25 2006-11-26 Lpe Spa Dispositivo per introurre gas di reazione in una camera di reazione e reattore epitassiale che lo utilizza
WO2007022359A2 (en) 2005-08-16 2007-02-22 The Regents Of The University Of California Vertical integrated silicon nanowire field effect transistors and methods of fabrication
US7736528B2 (en) 2005-10-12 2010-06-15 Panasonic Corporation Plasma processing apparatus and plasma processing method
US20070228491A1 (en) 2006-04-04 2007-10-04 Micron Technology, Inc. Tunneling transistor with sublithographic channel
DE102006017621B4 (de) 2006-04-12 2008-12-24 Schott Ag Vorrichtung und Verfahren zur Herstellung von multikristallinem Silizium
US8852349B2 (en) 2006-09-15 2014-10-07 Applied Materials, Inc. Wafer processing hardware for epitaxial deposition with reduced auto-doping and backside defects
JP2010503981A (ja) 2006-09-19 2010-02-04 クナノ アーベー ナノスケール電界効果トランジスタの構体
US8049203B2 (en) 2006-12-22 2011-11-01 Qunano Ab Nanoelectronic structure and method of producing such
US8890103B2 (en) 2007-01-17 2014-11-18 Consiglio Nazionale Delle Ricerche Semiconductor substrate suitable for the realisation of electronic and/or optoelectronic devices and relative manufacturing process
US9461182B2 (en) 2007-05-07 2016-10-04 Infineon Technologies Ag Memory cell
WO2009087623A1 (en) 2008-01-07 2009-07-16 Ramot At Tel Aviv University Ltd. Electric nanodevice and method of manufacturing same
JP5412093B2 (ja) * 2008-11-20 2014-02-12 サンケン電気株式会社 半導体ウェハ製造方法及び半導体装置製造方法
US8405121B2 (en) 2009-02-12 2013-03-26 Infineon Technologies Ag Semiconductor devices
US8829646B2 (en) 2009-04-27 2014-09-09 Macronix International Co., Ltd. Integrated circuit 3D memory array and manufacturing method
US8754401B2 (en) 2009-08-31 2014-06-17 International Business Machines Corporation Impact ionization field-effect transistor
EP2472585B1 (en) 2009-09-30 2022-07-06 National University Corporation Hokkaido University Tunnel field effect transistor and method for manufacturing same
EP2378557B1 (en) 2010-04-19 2015-12-23 Imec Method of manufacturing a vertical TFET
TWI562195B (en) 2010-04-27 2016-12-11 Pilegrowth Tech S R L Dislocation and stress management by mask-less processes using substrate patterning and methods for device fabrication
JP2012069919A (ja) * 2010-08-25 2012-04-05 Toshiba Corp 半導体装置の製造方法
KR101749694B1 (ko) * 2010-12-17 2017-06-22 삼성전자주식회사 반도체 소자 및 그 제조 방법과 상기 반도체 소자를 포함하는 전자 장치
ITMI20111421A1 (it) 2011-07-28 2013-01-29 Consiglio Nazionale Ricerche Fabbricazione di fette di materiale semiconduttore a larga gap energetica per l?integrazione di dispositivi elettronici e/o ottici e/o optoelettronici
ITMI20112273A1 (it) 2011-12-15 2013-06-16 St Microelectronics Srl Metodo per la produzione di una fetta di carburo di silicio e relativa attrezzatura
KR20150036229A (ko) 2012-07-06 2015-04-07 큐나노 에이비 방사상 나노와이어 에사키 다이오드 장치 및 방법
US8916927B2 (en) 2012-07-19 2014-12-23 Taiwan Semiconductor Manufacturing Vertical tunnel field effect transistor (FET)
US20140054549A1 (en) 2012-08-23 2014-02-27 Sematech, Inc. Gated circuit structure with ultra-thin, epitaxially-grown tunnel and channel layer
US9536977B2 (en) 2013-01-18 2017-01-03 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical tunneling field-effect transistor cell and fabricating the same
US9190484B2 (en) 2013-01-18 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical tunneling field-effect transistor cell and fabricating the same
US9029940B2 (en) 2013-01-18 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical tunneling field-effect transistor cell
US9159826B2 (en) 2013-01-18 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical tunneling field-effect transistor cell and fabricating the same
JP6419414B2 (ja) 2013-03-22 2018-11-07 株式会社東芝 ＳｉＣエピタキシャルウェハおよび半導体装置
EP2808897B1 (en) 2013-05-30 2021-06-30 IMEC vzw Tunnel field effect transistor and method for making thereof
WO2015110668A2 (en) 2014-01-27 2015-07-30 Rovalma, S.A. Centrifugal atomization of iron-based alloys
TWI547585B (zh) * 2014-02-14 2016-09-01 國立交通大學 氮化鋁銦薄膜的成長方法
US9798253B2 (en) * 2014-04-30 2017-10-24 Asml Netherlands B.V. Support table for a lithographic apparatus, lithographic apparatus and device manufacturing method
US10475673B2 (en) 2016-09-28 2019-11-12 Stmicroelectronics S.R.L. Apparatus for manufacturing a silicon carbide wafer
US11955362B2 (en) * 2017-09-13 2024-04-09 Applied Materials, Inc. Substrate support for reduced damage substrate backside
JP7142236B2 (ja) * 2018-03-28 2022-09-27 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
US20210233798A1 (en) * 2018-05-29 2021-07-29 Fabworx Solutions, Inc. Degas chamber lift hoop
WO2020020568A1 (en) * 2018-07-27 2020-01-30 Asml Netherlands B.V. Tool for modifying a support surface
US11309177B2 (en) 2018-11-06 2022-04-19 Stmicroelectronics S.R.L. Apparatus and method for manufacturing a wafer
CN111446185A (zh) * 2019-01-17 2020-07-24 Asm Ip 控股有限公司 通风基座
DE102019111985A1 (de) 2019-05-08 2020-11-12 Infineon Technologies Ag Verfahren zum herstellen von siliziumcarbid-vorrichtungen und wafer-verbund, der mit laser modifizierte zonen in einem handhabungssubstrat enthält
IT201900015416A1 (it) 2019-09-03 2021-03-03 St Microelectronics Srl Apparecchio per la crescita di una fetta di materiale semiconduttore, in particolare di carburo di silicio, e procedimento di fabbricazione associato

Also Published As

Publication number Publication date
CN111146139A (zh) 2020-05-12
US20200144047A1 (en) 2020-05-07
US11309177B2 (en) 2022-04-19
US11830724B2 (en) 2023-11-28
US20220208541A1 (en) 2022-06-30

Similar Documents

Publication Publication Date Title
CN210956633U (zh) 支撑件和用于制造晶片的装置
US5074017A (en) Susceptor
US10153207B2 (en) Method for manufacturing a silicon carbide wafer using a susceptor having draining openings
EP1807558A2 (en) 100 mm silicon carbide wafer with low micropipe density
WO2020088233A1 (zh) 无需粘结籽晶的碳化硅单晶生长装置
JPH0948688A (ja) 単結晶製造方法及びその単結晶製造装置
US10475673B2 (en) Apparatus for manufacturing a silicon carbide wafer
US11946158B2 (en) Apparatus for growing a semiconductor wafer and associated manufacturing process
KR102693167B1 (ko) 탄화규소 단결정 성장장치 및 탄화규소 단결정의 제조방법
JP4654030B2 (ja) ＳｉＣウェハおよびその製造方法
JP2006298722A (ja) 単結晶炭化ケイ素基板の製造方法
US11078599B2 (en) Apparatus for producing an ingot comprising a crucible body with a lid assembly having a movable core member and method for producing silicon carbide ingot using the apparatus
KR100675912B1 (ko) 종자정 부착 장치 및 종자정 부착 방법
TWI802616B (zh) 碳化矽單晶的製造方法
KR100548127B1 (ko) 탄화규소 단결정 성장 방법
JP2006103997A (ja) 半導体結晶の製造方法
KR200412992Y1 (ko) 종자정 부착 장치
KR20060095268A (ko) 결함이 적은 고품질의 탄화규소 단결정 성장 방법
JP2009137777A (ja) ＡｌＮ結晶およびその成長方法
JPH10297997A (ja) 炭化珪素単結晶の製造方法
KR101607160B1 (ko) 단결정 성장 장치
CN114561705A (zh) 具有残余应力控制的SiC晶片的制造方法
KR20050083262A (ko) 대구경 탄화규소 단결정 성장법
IT8922871A1 (it) Suscettore
JPH05283347A (ja) 気相成長装置

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant