CN210640257U - Bidirectional transient voltage suppression device - Google Patents

Bidirectional transient voltage suppression device Download PDF

Info

Publication number
CN210640257U
CN210640257U CN201922119672.5U CN201922119672U CN210640257U CN 210640257 U CN210640257 U CN 210640257U CN 201922119672 U CN201922119672 U CN 201922119672U CN 210640257 U CN210640257 U CN 210640257U
Authority
CN
China
Prior art keywords
substrate
conductivity type
epitaxial layer
transient voltage
voltage suppression
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201922119672.5U
Other languages
Chinese (zh)
Inventor
顾兴冲
高超
周继峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Littelfuse Semiconductor (Wuxi) Co Ltd
Original Assignee
Littelfuse Semiconductor (Wuxi) Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Littelfuse Semiconductor (Wuxi) Co Ltd filed Critical Littelfuse Semiconductor (Wuxi) Co Ltd
Priority to CN201922119672.5U priority Critical patent/CN210640257U/en
Application granted granted Critical
Publication of CN210640257U publication Critical patent/CN210640257U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

Disclosed is a bidirectional transient voltage suppression device, including: a substrate having a first surface and a second surface, the substrate being formed of a semiconductor of a first conductivity type; an epitaxial layer formed only on the first surface of the substrate, the epitaxial layer being formed of a semiconductor of a second conductivity type different from the first conductivity type; a diffusion layer formed on a surface of the epitaxial layer remote from the substrate, the diffusion layer being formed of a semiconductor of a third conductivity type different from the second conductivity type; and the groove penetrates through the epitaxial layer from the surface of the diffusion layer far away from the epitaxial layer and extends into the substrate. The bidirectional transient voltage suppression device is simple in structure and convenient to assemble.

Description

Bidirectional transient voltage suppression device
Technical Field
The present disclosure relates to the field of semiconductor technology, and in particular, to a bidirectional transient voltage suppression device.
Background
Transient Voltage Suppression (TVS) devices, known as zener diodes or avalanche diodes, are commonly used in electronic circuits to protect against damage due to transient voltage signals. A Transient Voltage Suppression (TVS) device may be fabricated as a unidirectional device or a bidirectional device. In the case of a bi-directional device, a first device may be fabricated on a first side of a semiconductor die (chip) and a second device may be fabricated on a second side of the semiconductor die (chip) to provide some flexibility in the electrical characteristics of the different devices.
However, such bi-directional devices are typically not flat on both sides of the semiconductor die (chip), thus requiring special care during assembly and special design at the lead frame to protect the passivation layer. In addition, soldering is generally used during assembly, and therefore, it is necessary to prevent solder from overflowing so as not to cause electrical short circuit and reliability problems.
SUMMERY OF THE UTILITY MODEL
An object of the present disclosure is to solve at least one aspect of the above problems and disadvantages in the related art.
According to an embodiment of an aspect of the present disclosure, there is provided a bidirectional transient voltage suppression device including:
a substrate having a first surface and a second surface, the substrate being formed of a semiconductor of a first conductivity type;
an epitaxial layer formed only on the first surface of the substrate, the epitaxial layer being formed of a semiconductor of a second conductivity type different from the first conductivity type;
a diffusion layer formed on a surface of the epitaxial layer remote from the epitaxial layer, the diffusion layer being formed of a semiconductor of a third conductivity type different from the second conductivity type; and
and the groove penetrates through the epitaxial layer from the surface of the diffusion layer far away from the epitaxial layer and extends into the substrate.
In at least one embodiment, the first conductivity type is the same as the third conductivity type.
In at least one embodiment, the first conductivity type is n-type, the second conductivity type is p-type, and the third conductivity type is n-type.
In at least one embodiment, the first conductivity type is p-type, the second conductivity type is n-type, and the third conductivity type is p-type.
In at least one embodiment, the epitaxial layer is between 20 μm and 80 μm thick.
In at least one embodiment, the thickness of the diffusion layer is between 1 μm and 30 μm.
In at least one embodiment, a passivation protection layer is formed within the trench.
In at least one embodiment, the passivation protection layer is made of glass.
In at least one embodiment, the bi-directional transient voltage suppression device further comprises a lead frame coupled to the substrate only on a side of the substrate on which the epitaxial layer is disposed.
In at least one embodiment, the bi-directional transient voltage suppression device further comprises an enclosure for enclosing the bi-directional transient voltage suppression device.
The bi-directional transient voltage suppression device according to the above-mentioned embodiments of the present disclosure is configured such that the epitaxial layer is disposed on only one side of the substrate, and the diffusion layer is disposed on one side of the epitaxial layer away from the substrate, so that one junction is formed between the substrate and the epitaxial layer, and another junction is formed between the epitaxial layer and the diffusion layer, the two junctions are structurally opposite and both located on the same side of the substrate, so that the other side of the substrate can be flat, so as to facilitate assembly of the bi-directional transient voltage suppression device.
Drawings
Fig. 1 is a schematic structural diagram of a bi-directional transient voltage suppression device according to an exemplary embodiment of the present disclosure; and
fig. 2 is a flow chart of a method of manufacturing a bi-directional transient voltage suppression device according to an exemplary embodiment of the present disclosure.
Detailed Description
While the present disclosure will be fully described with reference to the accompanying drawings, which contain preferred embodiments of the disclosure, it is to be understood before this description that one of ordinary skill in the art can, of course, modify the utility model described herein while obtaining the technical effects of the present disclosure. Therefore, it should be understood that the foregoing description is a broad disclosure directed to persons of ordinary skill in the art, and that there is no intent to limit the exemplary embodiments described in this disclosure.
Furthermore, in the following detailed description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the disclosure. It may be evident, however, that one or more embodiments may be practiced without these specific details. In other instances, well-known structures and devices are shown in schematic form in order to simplify the drawing.
According to the general inventive concept of the present disclosure, there is provided a bidirectional transient voltage suppression apparatus, including: a substrate having a first surface and a second surface, the substrate being formed of a semiconductor of a first conductivity type; an epitaxial layer formed only on the first surface of the substrate, the epitaxial layer being formed of a semiconductor of a second conductivity type different from the first conductivity type; a diffusion layer formed on a surface of the epitaxial layer remote from the epitaxial layer, the diffusion layer being formed of a semiconductor of a third conductivity type different from the second conductivity type; and the groove penetrates through the epitaxial layer from the surface of the diffusion layer far away from the epitaxial layer and extends into the substrate.
Fig. 1 is a schematic structural diagram of a bidirectional transient voltage suppression device according to an exemplary embodiment of the present disclosure.
As shown in fig. 1, a TVS device 100 according to an embodiment of the present disclosure may include a substrate 1, the substrate 1 having a first surface and a second surface opposite to the first surface. The substrate 1 may be formed of a semiconductor of the first conductivity type. As shown in fig. 1, the TVS device 100 may further include an epitaxial layer 2, and the epitaxial layer 2 is formed only on the first surface (top side in fig. 1) of the substrate 1, that is, the epitaxial layer 2 is not formed on the second surface of the substrate 1. The epitaxial layer 2 may be formed of a semiconductor of the second conductivity type. For example, when substrate 1 is P-type silicon, epitaxial layer 2 may be N-type silicon. For example, when substrate 1 is N-type silicon, epitaxial layer 2 may be P-type silicon. Thereby, a P/N junction may be formed at the interface 12 between the substrate 1 and the epitaxial layer 2. The TVS device 100 may further include a diffusion layer 3, and the diffusion layer 3 is formed on a surface (top side in fig. 1) of the epitaxial layer 2 remote from the substrate 1. The diffusion layer 3 may be formed of a semiconductor of a third conductivity type different from the second conductivity type, and the third conductivity type may be the same as or different from the first conductivity type. For example, when the epitaxial layer 2 is P-type silicon, the diffusion layer 3 may be N-type silicon. When the epitaxial layer 2 is N-type silicon, the diffusion layer 3 may be P-type silicon. Thereby, another P/N junction can be formed at the interface 23 between the epitaxial layer 2 and the diffusion layer 3. As shown, the TVS device 100 further includes a trench 4, the trench 4 extending through the epitaxial layer 2 and into the substrate 1 from a surface of the diffusion layer 3 away from the epitaxial layer 2.
In one exemplary embodiment, the epitaxial layer 2 has a thickness of between 20 μm and 80 μm, and more preferably between 30 μm and 60 μm, as shown in fig. 1. It should be noted that in other embodiments of the present disclosure, the thickness of the epitaxial layer 2 may be other values, such as 90 μm. In particular, the dopant concentration in the epitaxial layer 2 and the layer thickness of the epitaxial layer 2 may be designed according to the electrical characteristics of the diode to be formed in the substrate 1.
In one exemplary embodiment, the thickness of the diffusion layer 3 is between 1 μm and 30 μm, more preferably 5 μm to 20 μm, as shown in FIG. 1. It should be noted that in other embodiments of the present disclosure, the thickness of the epitaxial layer 3 may be other values, such as 35 μm. Specifically, the dopant concentration in the diffusion layer 3 and the layer thickness of the diffusion layer 3 may be designed according to the electrical characteristics of the diode to be formed in the substrate 1.
In one exemplary embodiment, a passivation layer is formed within trench 4, as shown in fig. 1. The passivation layer is made of glass. It should be noted that in other embodiments of the present disclosure, the passivation layer may be made of other trench insulators.
In an exemplary embodiment, as shown in fig. 1, the bi-directional transient voltage suppression device 100 further comprises a lead frame (not shown) coupled to the substrate 1 only at the side of the substrate 1 where the epitaxial layers are disposed. The lead frame may be conveniently attached to the TVS device 100 by soldering or other bonding methods. Since the lead frame is provided only on the layer of the substrate 1 on which the epitaxial layers are provided, the mounting surface of the substrate 1 (i.e., the surface on which the epitaxial layers are not formed) is not affected when the lead frame is attached to the bidirectional transient voltage suppression device. The bidirectional transient voltage suppression device is convenient to assemble by leading out the lead frame from only one side of the substrate provided with the epitaxial layer, and can prevent the problems of electrical short circuit and reliability caused by overflow of solder when the assembly is carried out by adopting a welding mode.
In an exemplary embodiment, as shown in fig. 1, the bi-directional transient voltage suppression device further comprises an encapsulation (not shown) for encapsulating the bi-directional transient voltage suppression device.
Fig. 2 illustrates a flow chart of a method of manufacturing a bi-directional transient voltage suppression device according to an exemplary embodiment of the present disclosure. At block 302, a substrate 1 is provided, wherein the substrate 1 is made of a semiconductor of a first conductivity type. The substrate 1 may be, for example, a p-type silicon substrate or an n-type silicon substrate. At block 304, an epitaxial layer 2 of a second conductivity type is formed on the substrate according to known deposition methods, wherein the epitaxial layer 2 is formed only on the first surface (i.e., the top side in fig. 1) of the substrate 1. When the substrate 1 is P-type silicon, the epitaxial layer 2 may be N-type silicon, and when the substrate 1 is N-type silicon, the epitaxial layer 2 may be P-type silicon, and thus, a P/N junction may be formed at the interface 12 between the substrate 1 and the epitaxial layer 2. At block 306, a diffusion layer 3 of a third conductivity type different from the second conductivity type is formed on the surface of the epitaxial layer 2 remote from the substrate 1 (i.e., the top side in fig. 1) according to a known deposition method, and when the epitaxial layer 2 may be N-type silicon, the diffusion layer 3 may be N-type silicon, and when the epitaxial layer 2 is N-type silicon, the diffusion layer 3 may be P-type silicon, and thus, another P/N junction may be formed at the interface 23 between the epitaxial layer 2 and the diffusion layer 3.
The bi-directional transient voltage suppression device according to the above-mentioned embodiments of the present disclosure is configured such that the epitaxial layer is disposed on only one side of the substrate, and the diffusion layer is disposed on one side of the epitaxial layer away from the substrate, so that one junction is formed between the substrate and the epitaxial layer, and another junction is formed between the epitaxial layer and the diffusion layer, the two junctions are structurally opposite and are located on one side of the substrate, so that the other side of the substrate can be flat, so as to facilitate the assembly of the bi-directional transient voltage suppression device. In addition, the bidirectional transient voltage suppression device is convenient to assemble by leading out the lead frame from only one side of the substrate provided with the epitaxial layer, and can prevent electrical short circuit and reliability problems caused by overflow of solder when the assembly is carried out in a welding mode.
It will be appreciated by those skilled in the art that the embodiments described above are exemplary and can be modified by those skilled in the art, and that the structures described in the various embodiments can be freely combined without conflict in structure or principle.
Having described preferred embodiments of the present disclosure in detail, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the scope and spirit of the appended claims, and the disclosure is not limited to the exemplary embodiments set forth herein.

Claims (10)

1. A bi-directional transient voltage suppression device, said bi-directional transient voltage suppression device comprising:
a substrate having a first surface and a second surface, the substrate being formed of a semiconductor of a first conductivity type;
an epitaxial layer formed only on the first surface of the substrate, the epitaxial layer being formed of a semiconductor of a second conductivity type different from the first conductivity type;
a diffusion layer formed on a surface of the epitaxial layer remote from the substrate, the diffusion layer being formed of a semiconductor of a third conductivity type different from the second conductivity type; and
and the groove penetrates through the epitaxial layer from the surface of the diffusion layer far away from the epitaxial layer and extends into the substrate.
2. The bi-directional transient voltage suppression device of claim 1, wherein said first conductivity type is the same as said third conductivity type.
3. The bi-directional transient voltage suppression device of claim 2, wherein the first conductivity type is n-type, the second conductivity type is p-type, and the third conductivity type is n-type.
4. The bi-directional transient voltage suppression device of claim 2, wherein said first conductivity type is p-type, said second conductivity type is n-type, and said third conductivity type is p-type.
5. The bi-directional transient voltage suppression device of claim 1, wherein said epitaxial layer has a thickness of between 20 μm and 80 μm.
6. The bi-directional transient voltage suppression device of claim 1, wherein said diffusion layer has a thickness between 1 μm and 30 μm.
7. The bi-directional transient voltage suppression device of claim 1, further comprising a lead frame coupled to the substrate only on a side of the substrate on which the epitaxial layer is disposed.
8. The bi-directional transient voltage suppression device of claim 1, wherein a passivation protection layer is formed within said trench.
9. The bi-directional transient voltage suppression device of claim 8, wherein said passivation protection layer is made of glass.
10. The bi-directional transient voltage suppression device of any of claims 1-9, further comprising an enclosure for enclosing said bi-directional transient voltage suppression device.
CN201922119672.5U 2019-11-29 2019-11-29 Bidirectional transient voltage suppression device Active CN210640257U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201922119672.5U CN210640257U (en) 2019-11-29 2019-11-29 Bidirectional transient voltage suppression device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201922119672.5U CN210640257U (en) 2019-11-29 2019-11-29 Bidirectional transient voltage suppression device

Publications (1)

Publication Number Publication Date
CN210640257U true CN210640257U (en) 2020-05-29

Family

ID=70795932

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201922119672.5U Active CN210640257U (en) 2019-11-29 2019-11-29 Bidirectional transient voltage suppression device

Country Status (1)

Country Link
CN (1) CN210640257U (en)

Similar Documents

Publication Publication Date Title
TWI408814B (en) Bi-directional transient voltage suppression device and forming method thereof
US20130334695A1 (en) Electronic device and method of manufacturing such device
US20110175218A1 (en) Package assembly having a semiconductor substrate
CN108054164B (en) Transient voltage suppressor and manufacturing method thereof
US6630735B1 (en) Insulator/metal bonding island for active-area silver epoxy bonding
US10510741B2 (en) Transient voltage suppression diodes with reduced harmonics, and methods of making and using
CN108063137B (en) Transient voltage suppressor and manufacturing method thereof
CN108063138B (en) Transient voltage suppressor and manufacturing method thereof
CN108063135A (en) Transient Voltage Suppressor and preparation method thereof
KR101592232B1 (en) Method of manufacturing low capacitance TVS and Devices using the method
CN210640257U (en) Bidirectional transient voltage suppression device
US9685396B2 (en) Semiconductor die arrangement
KR101407273B1 (en) Semiconductor Device for Surge Protection and Method for Manufacturing Thereof
US10529644B2 (en) Semiconductor device
EP2851946A1 (en) Surge protection device
CN210778581U (en) High-reliability transient voltage suppression diode
JP7294594B2 (en) Integrated multi-device chips and packages
CN108054165A (en) Transient Voltage Suppressor and preparation method thereof
DE102016101136A1 (en) Method for thinning and burying a semiconductor chip
KR102200785B1 (en) Asymmetric transient voltage suppressor device and methods for formation
JP5836346B2 (en) Wiring board and electronic device
CN108091649A (en) Transient Voltage Suppressor and preparation method thereof
CN108063136A (en) Transient Voltage Suppressor and preparation method thereof
CN209056461U (en) Semiconductor component
JP2017011084A (en) Photocoupler

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant