CN209312744U - 半导体封装 - Google Patents
半导体封装 Download PDFInfo
- Publication number
- CN209312744U CN209312744U CN201821612914.3U CN201821612914U CN209312744U CN 209312744 U CN209312744 U CN 209312744U CN 201821612914 U CN201821612914 U CN 201821612914U CN 209312744 U CN209312744 U CN 209312744U
- Authority
- CN
- China
- Prior art keywords
- substrate
- bushing
- semiconductor packages
- multiple pin
- couple
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 62
- 239000000758 substrate Substances 0.000 claims abstract description 110
- 239000000206 moulding compound Substances 0.000 claims abstract description 23
- 230000008878 coupling Effects 0.000 claims abstract description 6
- 238000010168 coupling process Methods 0.000 claims abstract description 6
- 238000005859 coupling reaction Methods 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 description 39
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 17
- 229910052802 copper Inorganic materials 0.000 description 15
- 239000010949 copper Substances 0.000 description 15
- 238000005538 encapsulation Methods 0.000 description 12
- 238000000465 moulding Methods 0.000 description 11
- 229910000679 solder Inorganic materials 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 7
- 239000004033 plastic Substances 0.000 description 6
- 229920003023 plastic Polymers 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910000831 Steel Inorganic materials 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 239000010959 steel Substances 0.000 description 4
- UDQTXCHQKHIQMH-KYGLGHNPSA-N (3ar,5s,6s,7r,7ar)-5-(difluoromethyl)-2-(ethylamino)-5,6,7,7a-tetrahydro-3ah-pyrano[3,2-d][1,3]thiazole-6,7-diol Chemical compound S1C(NCC)=N[C@H]2[C@@H]1O[C@H](C(F)F)[C@@H](O)[C@@H]2O UDQTXCHQKHIQMH-KYGLGHNPSA-N 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 3
- 229940125936 compound 42 Drugs 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000007639 printing Methods 0.000 description 3
- 238000010992 reflux Methods 0.000 description 3
- WZZBNLYBHUDSHF-DHLKQENFSA-N 1-[(3s,4s)-4-[8-(2-chloro-4-pyrimidin-2-yloxyphenyl)-7-fluoro-2-methylimidazo[4,5-c]quinolin-1-yl]-3-fluoropiperidin-1-yl]-2-hydroxyethanone Chemical compound CC1=NC2=CN=C3C=C(F)C(C=4C(=CC(OC=5N=CC=CN=5)=CC=4)Cl)=CC3=C2N1[C@H]1CCN(C(=O)CO)C[C@@H]1F WZZBNLYBHUDSHF-DHLKQENFSA-N 0.000 description 2
- BVPWJMCABCPUQY-UHFFFAOYSA-N 4-amino-5-chloro-2-methoxy-N-[1-(phenylmethyl)-4-piperidinyl]benzamide Chemical compound COC1=CC(N)=C(Cl)C=C1C(=O)NC1CCN(CC=2C=CC=CC=2)CC1 BVPWJMCABCPUQY-UHFFFAOYSA-N 0.000 description 2
- VKLKXFOZNHEBSW-UHFFFAOYSA-N 5-[[3-[(4-morpholin-4-ylbenzoyl)amino]phenyl]methoxy]pyridine-3-carboxamide Chemical compound O1CCN(CC1)C1=CC=C(C(=O)NC=2C=C(COC=3C=NC=C(C(=O)N)C=3)C=CC=2)C=C1 VKLKXFOZNHEBSW-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- FRWYFWZENXDZMU-UHFFFAOYSA-N 2-iodoquinoline Chemical compound C1=CC=CC2=NC(I)=CC=C21 FRWYFWZENXDZMU-UHFFFAOYSA-N 0.000 description 1
- 229910017083 AlN Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- LTPBRCUWZOMYOC-UHFFFAOYSA-N beryllium oxide Inorganic materials O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 229940125773 compound 10 Drugs 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- ZLVXBBHTMQJRSX-VMGNSXQWSA-N jdtic Chemical compound C1([C@]2(C)CCN(C[C@@H]2C)C[C@H](C(C)C)NC(=O)[C@@H]2NCC3=CC(O)=CC=C3C2)=CC=CC(O)=C1 ZLVXBBHTMQJRSX-VMGNSXQWSA-N 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4885—Wire-like parts or pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/142—Metallic substrates having insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L2021/60285—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the use of mechanical auxiliary parts without the use of an alloying or soldering process, e.g. pressure contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4006—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
- H01L2023/4075—Mechanical elements
- H01L2023/4087—Mounting accessories, interposers, clamping or screwing parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/15322—Connection portion the connection portion being formed on the die mounting surface of the substrate being a pin array, e.g. PGA
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
本实用新型涉及半导体封装。本实用新型公开了半导体封装,所述半导体封装的实施方式可包括:具有第一侧和第二侧的衬底,以及衬底中的孔。孔从衬底的第一侧延伸到第二侧,并且定位在衬底的中心。半导体封装还可包括围绕孔到衬底的第一侧的衬套。半导体封装还可包括布置并耦接在衬底上的多个销保持器。半导体封装还可包括模塑料,所述模塑料至少部分地包封衬底,包封衬套的侧表面,并且包封多个销保持器的多个侧表面。
Description
技术领域
本实用新型整体涉及半导体封装,诸如用于电子控制系统的功率模块。具体的实施方式涉及具有螺孔的功率模块。
背景技术
通常,功率集成模块用刚性塑料盖封装。塑料可以是热塑性塑料,并且夹在衬底周围。当制造盖时,在塑料盖中形成被设计用于将封装耦接到散热器的螺孔。螺孔可在封装的侧面上或者在封装的中间。
实用新型内容
半导体封装的实施方式可包括:具有第一侧和第二侧的衬底,以及衬底中的孔。孔从衬底的第一侧延伸到第二侧,并且定位在衬底的中心。半导体封装还可包括围绕孔到衬底的第一侧的衬套。半导体封装还可包括布置并耦接在衬底上的多个销保持器。半导体封装还可包括模塑料,该模塑料至少部分地包封衬底,包封衬套的侧表面,并且包封多个销保持器的多个侧表面。
半导体封装的实施方式可包括以下各项中的一项、全部或任一项:
多个销保持器可具有与衬套的高度相同的高度。
衬套可包括铜、钢、或它们的任何组合中的一种。
衬套和多个销保持器可各自通过焊料耦接到衬底。
销保持器可包括铜。
半导体封装还可包括耦接到衬底的第一侧的一个或多个管芯。
半导体封装的实施方式可包括:具有第一表面和第二表面的衬底,第二表面可与第一表面相对。封装还可包括定位在衬底的第一边缘中以及第二边缘中的两个或更多个切口。封装还可包括围绕两个或更多个切口中的每一个切口的周边定位的衬套。衬套可耦接在衬底的第一表面上。封装还可包括耦接在衬底的第一表面上的多个销保持器,以及可滑动地耦接到多个销保持器中的多个销。封装还可包括模塑料,该模塑料至少部分地包封衬底、衬套的侧表面、以及多个销保持器的多个侧表面。
半导体封装的实施方式可包括以下各项中的一项、全部或任一项:
多个销保持器可具有与衬套的高度相同的高度。
衬套可包括铜、钢、以及它们的任何组合中的一种。
围绕两个或更多个切口中的每一个切口的周边定位的衬套可被锯切成与衬底的第一边缘和第二边缘齐平。
衬套和多个销保持器可各自通过焊料耦接到衬底。
销保持器可包括铜。
半导体封装还可包括耦接到衬底的第一表面的一个或多个管芯。
对于本领域的普通技术人员而言,通过具体实施方式以及附图并通过权利要求书,上述以及其他方面、特征和优点将会显而易见。
附图说明
将在下文中结合附图来描述各实施方式,其中类似标号表示类似元件,并且:
图1是半导体封装的实施方式的透视图;
图2是图1的半导体封装的实施方式的剖视图;
图3是半导体封装的另一个实施方式的透视图;
图4是图3的半导体器件的实施方式的剖视图;
图5是半导体器件的实施方式的剖视图,示出通过衬套以及通过模塑料的力分布;
图6A-图6D是如本文所述的形成半导体封装的方法的实施方式;并且
图7A-图7D是如本文所述的形成半导体封装的方法的实施方式。
具体实施方式
本公开、其各方面以及实施方式并不限于本文所公开的具体部件、组装工序或方法元素。本领域已知的符合预期半导体封装及相关方法的许多附加部件、组装工序和/或方法要素将显而易见地与本公开的特定实施方式一起使用。因此,例如,尽管本文公开了具体的实施方式,但是此类实施方式和实施部件可包括与预期操作和方法符合的本领域已知用于此类半导体封装以及实施部件和方法的任何形状、尺寸、样式、类型、模型、版本、量度、浓度、材料、数量、方法元素、步骤等。
参见图1,示出了半导体封装2的实施方式。封装包括具有穿过其中的孔的直接接合铜(DBC)衬底4。在各种实施方式中,DBC可带有预切孔。在其他实施方式中,在制造工艺期间可激光切割孔。孔可用于螺钉以将半导体封装安装到印刷电路板、散热器、或被设计成通过螺钉耦接到半导体器件的其他设备。衬底的顶部铜层可在烧制之前预成型,或者其可使用印刷电路板技术进行化学蚀刻。在其他实施方式中,可使用本领域已知的其他合适的衬底,包括层压衬底和陶瓷/有机层压衬底。金属衬套6耦接到DBC衬底中的孔/耦接在DBC衬底中的孔周围。金属衬套6可包括铜、钢、它们的任何组合或本领域已知的任何合适的金属。多个销保持器8也耦接到DBC衬底。如图所示,在本文公开的各种封装实施方式中使用的衬套可包括围绕衬套的端部的凸缘,该端部和与衬底耦接的端部相对。凸缘向外延伸远离衬套中的开口。该凸缘的尺寸可以在各种实施方式中变化。在一些实施方式中,凸缘可被省去。使用凸缘可增加衬套的上表面,这增加了衬套与螺钉或其他紧固件的接触区域,同时使衬套的与衬底接触的下表面区域最小化。如图所示,将多个销12插入多个销保持器8中。在各种实施方式中,销保持器8可包括铜,但在其他实施方式中,它们可由本文所公开的任何金属制成。在各种实施方式中,销保持器8和衬套6可在衬底上方具有相同高度。衬套6和销保持器8可通过焊膏耦接到衬底4,并且在半导体封装的制造期间通过回流固定。如图所示,模塑料10包封衬底。模塑料10覆盖衬套的侧表面和销保持器的侧表面,如图2中可见。如图所示,衬套和销保持器的顶部表面未被模塑料覆盖。在各种实施方式中,顶部表面可与模塑料的顶部表面基本上齐平地坐置。
作为非限制性示例,如本文所述的半导体封装可用于功率模块中。功率模块具有广泛的用途,并且作为非限制性示例可用于电器、电池充电、转换器、电镀、加热器控制、医疗电子器件、电源、反极性保护、开关、三相逆变器、或本领域已知的其他设备中。功率模块包括一个或多个半导体器件,所述半导体器件被设计成处理和加工电功率,作为非限制性示例,诸如整流器、二极管等。
参见图3,示出了半导体封装14的另一种实施方式。半导体封装14包括具有两个或更多个切口或凹入开口18的衬底16,所述切口或凹入开口定位在衬底的第一边缘20和第二边缘22处。衬套24围绕两个或更多个切口18中的每一个切口的周边定位。衬套可由本文所公开的任何材料制成。衬套24的底部表面的一部分通过焊料耦接到衬底的第一侧。然后将模塑材料施加到封装,该封装覆盖衬套的侧表面。在该实施方式中,在模塑后,衬套24被切割或锯切成与衬底的第一边缘20和第二边缘22齐平(如图7D所示)。多个销保持器26在预定位置中耦接到衬底的第一侧,并且多个销28可滑动地耦接到多个销保持器26中。如前所述,衬套24和销保持器26在衬底上方可为相同高度。在各种实施方式中,多个销保持器26在各种实施方式中可包括铜或本领域已知的任何其他合适的材料。模塑料30被示为至少部分地包封衬底16、衬套24的侧表面、以及多个销保持器26的多个侧表面。在图4中,示出了模塑料30,该模塑料包封衬底16的第一表面32以及多个销保持器26的多个侧表面34。如前所述,衬套24和销保持器26的顶部表面未被模塑料覆盖。在特定实施方式中,顶部表面可与模塑料的顶部表面基本上齐平。
参见图5,示出了半导体封装36的实施方式的剖视图。示出了衬底38的各个层。衬套40通过衬底38耦接到切口。模塑料42部分地包封衬底,意味着模塑料42包封衬底38的第一(顶部)表面,而不包封第二(底部)表面。箭头44示出通过衬套40和模塑料42的力分布。这可有助于从封装的其余部分带走有害的力,从而减少衬底、销以及可包括在封装中的任何管芯上的应力。此外,因为使用该文件中公开的衬套允许使用模具阵列工艺(MAP)模塑以用于形成封装,所以衬套的设计还可允许在MAP模塑工艺期间分配施加在衬底上的力以防止损坏衬底和/或耦接到其的部件。
参见图6A-图6D,示出了用于制造半导体封装的方法的实施方式。为了便于说明,示出并描述了仅一个半导体封装的制造。然而,衬底和封装可形成在阵列中并且在处理结束时进行切割。参见图6A,示出了直接接合铜衬底46。DBC衬底46通常用于功率模块中,并且已知具有良好的导热性。在各种实施方式中,DBC衬底包括陶瓷砖,其中铜片通过高温氧化/烧结工艺接合到铜的一侧或两侧。顶部铜层可在烧制之前预成型,或者被化学蚀刻以在其上形成多条迹线(未示出)。陶瓷砖可包括氧化铝、氮化铝、氧化铍、或本领域已知的任何其他合适的材料。衬底包括孔48,该孔定位在衬底的中心并且从衬底的第一侧延伸到第二侧(通过衬底)。可用激光切割孔。在各种实施方式中,在制造半导体封装时,可以预切或切割衬底。
参见图6B,衬套50和多个销保持器52被示为耦接到衬底54。在衬套50、多个销保持器52和任何管芯耦接到衬底54(通过放置操作)之前,可使用焊料印刷系统(例如,丝网印刷)将焊料印刷物印刷到衬底上。然后将衬底放置在回流炉或其他加热装置中以回流焊料、衬套以及衬底的材料,以将衬套、销保持器和管芯固定到衬底。可使用助焊剂清洁工艺从衬底清除过量的焊料和碎屑。在放置衬套和销保持器之前或之后(或同时),一个或多个半导体管芯和/或其他无源电部件可通过引线接合或其他电耦接耦接到衬底。虽然图6B中的示例示出了衬套和多个销保持器两者的放置,但在各种实施方式中,仅可将衬套放置在衬底上(在不需要穿过模制化合物的销的情况下)。
参见图6C,示出了包封衬底的模塑料56。如前所述,模塑料可至少部分地包封衬套的侧表面,以及多个销保持器的多个侧表面。在一些实施方式中,包封工艺可以是膜辅助模塑(FAM)方法。FAM方法包括在模具中施加一个或多个塑料膜。使用真空力将塑料膜向下吸入到模具的内表面中。在特定实施方式中,膜可被施加在销保持器和衬套上,以防止模塑料进入其中的内部空腔。然后使用传递模塑工艺将设备包封在模塑料中。在其他实施方式中,模具阵列工艺(MAP)可用于包封衬底、衬套和销保持器。当使用MAP模塑时,可通过研磨来移除覆盖衬套和/或销保持器的开口的任何剩余模塑材料。在完成模塑工艺之后,可切割半导体封装,其中封装在片材或其他附接衬底组中一起加工。在各种实施方式中,包封工艺可通过使用供应商提供的模塑机完全自动化。
参见图6D,在模塑之后,将多个销62插入多个销保持器64中。在各种实施方式中,可使用销插入工具来执行此操作。也可采用各种夹具和/或其他固定装置,以便能够插入销以避免销的任何损坏或弯曲。
参见图7A-图7D,示出制造半导体封装的另一种实施方式的另一种方法的实施方式。如前所述,示出并描述了仅一个半导体封装的制造。参见图7A,示出了具有第一侧66和第二侧(底侧,未示出)的直接接合铜(DBC)衬底65。在该特定实施方式中,衬底65包括在衬底的第一边缘72和第二边缘74上的两个切口68和70。可使用激光切割孔。在各种实施方式中,在制造半导体封装时,可以预切或切割衬底。
参见图7B,衬套76和78以及多个销保持器80在将其放置在衬底82上之后示出。放置操作可以是该文件中所公开的任何放置操作。如图所示,衬套的一部分围绕两个或更多个切口中的每一个切口的周边定位。衬套的围绕切口延伸的部分在焊料印刷物上方耦接在衬底的第一表面上,该焊料印刷物可使用该文件中公开的任何技术来印刷。多个销保持器84也被放置在衬底上的预定位置中。在衬套的放置之前或之后(或同时),可将一个或多个半导体管芯和/或无源部件放置在衬底上的预定位置中,并且与衬底引线接合或以其他方式电耦接。如前所述,执行回流以将衬套、销保持器和管芯固定到衬底。可使用助焊剂清洁工艺从衬底清除过量的焊料和碎屑。
参见图7C,示出了包封衬底88的模塑料86。如前所述,模塑料86可至少部分地包封衬套90的侧表面,以及多个销保持器92的多个侧表面。包封工艺可以是如前所述的膜辅助模塑(FAM)方法或如前所公开的模具阵列工艺(MAP)。当使用MAP模塑时,可通过研磨来移除衬套和/或销保持器的顶部表面/开口上的任何剩余模塑材料。在将衬底耦接在一起(诸如在片材或面板中)的同时处理衬底的情况下,随后在包封工艺之后切割半导体封装。如图所示,在切割期间,衬套被切割或锯切成与半导体封装的边缘齐平。在锯切之后,衬套可能需要去毛刺以移除任何过量的金属和金属屑。
在切割之后,参见图7D,将多个销94插入多个销保持器92中。本文所公开的销插入工具、固定装置和/或夹具中的任一者都可用于该工艺。
形成如同本文所公开的那些的半导体封装的方法的实施方式可包括:提供衬底,该衬底可包括从衬底的第一侧延伸到第二侧的一个或多个孔。该方法还包括将一个或多个衬套耦接在衬底的第一侧上的一个或多个孔周围,以及将多个销保持器耦接在衬底的第一侧上的预定位置处。该方法包括包封衬底、一个或多个衬套的侧表面以及多个销保持器的多个侧表面。该方法还包括将多个销插入多个销保持器中。
一个或多个衬套和多个销保持器各自通过焊料耦接在衬底上。
衬套可包括铜、钢、以及它们的任何组合中的一种。
该方法还可包括在衬底的第一边缘和第二边缘处锯切一个或多个衬套,并且一个或多个衬套在锯切之后可与衬底的第一边缘和第二边缘齐平。
包封可包括膜辅助模塑(FAM)方法。
包封可包括模具阵列工艺(MAP)。
多个销可通过夹具、机器以及它们的任何组合中的一个插入多个销保持器中。
在以上描述中提到半导体封装的具体实施方式以及实施部件、子部件、方法和子方法的地方,应当显而易见的是,可在不脱离其实质的情况下作出多种修改,并且这些实施方式、实施部件、子部件、方法和子方法可应用于其他半导体封装。
Claims (9)
1.一种半导体封装,其特征在于,所述半导体封装包括:
衬底,所述衬底包括第一侧和第二侧;
所述衬底中的孔,所述孔从所述第一侧延伸到所述第二侧,并且定位在所述衬底的中心;
衬套,所述衬套围绕所述孔到所述衬底的所述第一侧;
多个销保持器,所述多个销保持器布置并耦接在所述衬底上;以及
模塑料,所述模塑料至少部分地包封所述衬底,包封所述衬套的侧表面,并且包封所述多个销保持器的多个侧表面。
2.根据权利要求1所述的半导体封装,其中,所述多个销保持器的高度与所述衬套的高度相同。
3.根据权利要求1所述的半导体封装,其中,所述衬套和所述多个销保持器各自通过焊料耦接到所述衬底。
4.根据权利要求1所述的半导体封装,其中,所述半导体封装还包括耦接到所述衬底的所述第一侧的一个或多个管芯。
5.一种半导体封装,其特征在于,所述半导体封装包括:
衬底,所述衬底包括第一表面和第二表面,所述第二表面与所述第一表面相对;
两个或更多个切口,所述两个或更多个切口定位在所述衬底的第一边缘中以及第二边缘中;
衬套,所述衬套围绕所述两个或更多个切口中的每一个切口的周边定位,所述衬套耦接在所述衬底的所述第一表面上;
多个销保持器,所述多个销保持器耦接在所述衬底的所述第一表面上;
多个销,所述多个销可滑动地耦接到所述多个销保持器中;以及
模塑料,所述模塑料至少部分地包封所述衬底、所述衬套的侧表面、以及所述多个销保持器的多个侧表面。
6.根据权利要求5所述的半导体封装,其中,所述多个销保持器的高度与所述衬套的高度相同。
7.根据权利要求5所述的半导体封装,其中,围绕所述两个或更多个切口中的每一个切口的周边定位的所述衬套被锯切成与所述衬底的所述第一边缘和所述第二边缘齐平。
8.根据权利要求5所述的半导体封装,其中,所述衬套和所述多个销保持器各自通过焊料耦接到所述衬底。
9.根据权利要求5所述的半导体封装,其中,所述半导体封装还包括耦接到所述衬底的所述第一表面的一个或多个管芯。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/783,533 US10319659B2 (en) | 2017-10-13 | 2017-10-13 | Semiconductor package and related methods |
US15/783,533 | 2017-10-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN209312744U true CN209312744U (zh) | 2019-08-27 |
Family
ID=66096083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201821612914.3U Active CN209312744U (zh) | 2017-10-13 | 2018-09-30 | 半导体封装 |
Country Status (2)
Country | Link |
---|---|
US (1) | US10319659B2 (zh) |
CN (1) | CN209312744U (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP4243070A1 (en) | 2022-03-11 | 2023-09-13 | Hitachi Energy Switzerland AG | Power module and method for manufacturing a power module |
WO2023214500A1 (ja) * | 2022-05-02 | 2023-11-09 | ローム株式会社 | 半導体装置 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01217993A (ja) * | 1988-02-26 | 1989-08-31 | Hitachi Ltd | 半導体装置 |
US6892796B1 (en) | 2000-02-23 | 2005-05-17 | General Motors Corporation | Apparatus and method for mounting a power module |
WO2008044485A1 (en) | 2006-10-06 | 2008-04-17 | Kabushiki Kaisha Yaskawa Denki | Mounting structure for power module and motor control device having the same |
KR101391925B1 (ko) * | 2007-02-28 | 2014-05-07 | 페어차일드코리아반도체 주식회사 | 반도체 패키지 및 이를 제조하기 위한 반도체 패키지 금형 |
US8120171B2 (en) | 2007-12-26 | 2012-02-21 | Keihin Corporation | Power drive unit including a heat sink and a fastener |
JP4576448B2 (ja) * | 2008-07-18 | 2010-11-10 | 三菱電機株式会社 | 電力用半導体装置 |
JP4825259B2 (ja) * | 2008-11-28 | 2011-11-30 | 三菱電機株式会社 | 電力用半導体モジュール及びその製造方法 |
EP2833405A4 (en) * | 2012-03-28 | 2016-01-13 | Fuji Electric Co Ltd | SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF |
US9521737B2 (en) * | 2012-11-28 | 2016-12-13 | Mitsubishi Electric Corporation | Power module |
US9305874B2 (en) * | 2014-04-13 | 2016-04-05 | Infineon Technologies Ag | Baseplate for an electronic module and method of manufacturing the same |
DE102014110967B4 (de) * | 2014-08-01 | 2021-06-24 | Infineon Technologies Ag | Verkapselte elektronische Chipvorrichtung mit Befestigungseinrichtung und von außen zugänglicher elektrischer Verbindungsstruktur sowie Verfahren zu deren Herstellung |
JP6623811B2 (ja) * | 2016-02-16 | 2019-12-25 | 富士電機株式会社 | 半導体モジュールの製造方法及び半導体モジュール |
-
2017
- 2017-10-13 US US15/783,533 patent/US10319659B2/en active Active
-
2018
- 2018-09-30 CN CN201821612914.3U patent/CN209312744U/zh active Active
Also Published As
Publication number | Publication date |
---|---|
US20190115275A1 (en) | 2019-04-18 |
US10319659B2 (en) | 2019-06-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2816598B1 (en) | Semiconductor device and method for manufacturing same | |
JP5696780B2 (ja) | 半導体装置およびその製造方法 | |
EP2577726B1 (en) | Stacked interposer leadframes | |
CN109216313A (zh) | 具有包括钎焊的导电层的芯片载体的模制封装 | |
CN208336187U (zh) | 半导体封装 | |
CN209312744U (zh) | 半导体封装 | |
JP2022000871A (ja) | 電気回路基板及びパワーモジュール | |
JP2015527753A (ja) | 印刷形成による端子パッドを有するリードキャリア | |
EP0872886A2 (en) | Plastic-encapsulated semiconductor device and fabrication method thereof | |
JP5125975B2 (ja) | 樹脂ケース製造方法 | |
US20210043548A1 (en) | Electronic device with three dimensional thermal pad | |
CN102376594B (zh) | 电子封装结构及其封装方法 | |
CN216413057U (zh) | 半导体电路 | |
JPH0473297B2 (zh) | ||
CN114038811A (zh) | 半导体电路和半导体电路的制造方法 | |
CN114038812A (zh) | 半导体电路和半导体电路的制造方法 | |
CN216413070U (zh) | 引线框架组件 | |
CN216213385U (zh) | 半导体电路 | |
CN216413052U (zh) | 半导体电路 | |
CN110957283A (zh) | 功率模块和相关方法 | |
CN116314153A (zh) | 用于半导体电路的贴装设备和半导体电路的制造方法 | |
CN216413050U (zh) | 半导体电路 | |
WO2018018849A1 (zh) | 一种智能功率模块及其制造方法 | |
CN216161733U (zh) | 半导体电路 | |
CN216213383U (zh) | 半导体电路 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |