CN209089280U - A kind of printed circuit board based on chip testing - Google Patents
A kind of printed circuit board based on chip testing Download PDFInfo
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- CN209089280U CN209089280U CN201821475165.4U CN201821475165U CN209089280U CN 209089280 U CN209089280 U CN 209089280U CN 201821475165 U CN201821475165 U CN 201821475165U CN 209089280 U CN209089280 U CN 209089280U
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Abstract
The utility model discloses a kind of printed circuit boards based on chip testing, comprising: the first printed board and the second printed board set gradually from top to bottom；First printed board and second printed board form electric path by connection key connection；Capacitor is provided in first printed board；The capacitor includes at least one.By forming printed circuit board by two pieces, and capacitor is arranged on the first most thin printed circuit board, changes the via length of signal lead, make its impedance control in controlled range, further improve the rate of signal.
Description
Technical field
The utility model relates to chip testing field more particularly to a kind of printed circuit boards based on chip testing.
Background technique
During chip production, need to guarantee that the various functions of chip meet design requirement by means of testing.And core
Built-in testing can be divided into two class testings again, and the first kind is the test before die package, and the second class is the test behind die package.This its
In, the first class testing needs to be tested using probe card (probecard), and the second class is needed using support plate
(loadboard) it is tested.
Fig. 1 is the Vertrical probe clasp test structural schematic diagram of current comparative maturity, and Fig. 2 figure is that the structure of mature support plate is shown
Meaning；In chip testing, two ways would generally be used for high speed signal test, the first is chip internal loopback, second
It is signal and board interconnection.For the first test mode, since most of high speed signals are AC coupling, signal loopback mistake
It needs in journey by capacitor.Simultaneously as chipside forbids putting device, therefore the coupled capacitor is to be placed in
testerside.Due to the requirement of tester table, for the plate thickness of PCB generally in 150mil or more, the plate thickness of some designs even can
To reach 300mil or more.
Shown in fig. 3, TX/RX is differential signal: signal issues (TX) from chip (DUT), first passes around on PCB
A pair of of via hole switches to internal layer, then switches to Bot layers (testerside) by via hole after one section of cabling；Then pass through
Capacitor reaches RX signal wire part, switches to internal layer using via hole, then switches to by one section of cabling through via hole
DUTside.Since via hole is very long, the impedance of via hole is difficult to control here, when signal rate is up to 30Gbps or more, via hole
Signal via is influenced very big.
Based on the technical problem present on, this application provides the technical solutions for solving the above technical problem.
Summary of the invention
The purpose of the utility model is to provide a kind of printed circuit boards based on chip testing, by the way that printed circuit board to have
Two pieces of compositions, and capacitor is arranged on the first most thin printed circuit board, the via length of signal lead is changed, its resistance is made
Anti- control further improves the rate of signal in controlled range.
The technical scheme that the utility model is provided is as follows:
A kind of printed circuit board based on chip testing, comprising: the first printed board set gradually from top to bottom, Yi Ji
Two printed boards；First printed board and second printed board form electric path by connection key connection；Described first
Capacitor is provided in printed board；The capacitor includes at least one.
In this application, by forming printed circuit board by two pieces, and capacitor is arranged in the first most thin printing electricity
On the plate of road, the via length of signal lead is changed, makes its impedance control in controlled range, further improves signal
Rate.
It is further preferred that first printed board includes: the first top layer and the first bottom；The capacitor setting exists
First top layer.
It is further preferred that include: first printed board including: the first top layer and the first bottom；The capacitor is set
It sets in the first bottom.
It is further preferred that second printed board includes: the second top layer and the second bottom；In first bottom
The accommodating cavity for placing capacitor is set with second bottom；The quantity of the accommodating cavity matches one by one with the quantity of capacitor.
It is further preferred that the connecting key includes Place.
A kind of printed circuit board based on chip testing provided by the utility model, has the beneficial effect that:
In this application, by forming printed circuit board by two pieces, and capacitor is arranged in the first most thin printing electricity
On the plate of road, the via length of signal lead is changed, makes its impedance control in controlled range, further improves signal
Rate.
Newly-designed via length in the application is obviously shortened, and influence of the via hole for impedance and loss also can obviously drop
Low, signal quality improves obviously, has very important significance for the test of two-forty signal.Under normal circumstances, signal quality can
To promote 10%-20 or more.
Improve about 0.5db in the design method loss of the application, loss improves about 10%；For different projects, improve
Effect has difference, and the length of this and via hole has very direct relationship.
Detailed description of the invention
Below by clearly understandable mode, preferred embodiment is described with reference to the drawings, to a kind of based on chip testing
Above-mentioned characteristic, technical characteristic, advantage and its implementation of printed circuit board are further described.
Fig. 1 is the structural schematic diagram for the probe card that the prior art is used to test wafer；
Fig. 2 is the structural schematic diagram for the support plate that the prior art is used to test wafer；
Fig. 3 is the via structure schematic diagram that the prior art goes differential signal on test board；
Fig. 4 is the via structure schematic diagram of the first printed board of the utility model；
Fig. 5 is the utility model for the printed circuit board structural schematic diagram based on chip testing；
Fig. 6 is the utility model source impedance curve graph.
Drawing reference numeral explanation:
1. printed circuit board, 2. substrates, 3. connectors, 4. probes, 5. wafers, 6. sockets, 7. chips, 8. capacitors, 9. survey
Commissioning stage side, 10. determinand sides, 11. prior art source impedance curves, the source impedance curve of 12. the application, 13.
First printed board, 14. second printed boards, 15. connecting keys.
Specific embodiment
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, attached drawing will be compareed below
Illustrate specific embodiment of the present utility model.It should be evident that the accompanying drawings in the following description is only the one of the utility model
A little embodiments for those of ordinary skill in the art without creative efforts, can also be according to these
Attached drawing obtains other attached drawings, and obtains other embodiments.
To make simplified form, part relevant to the utility model is only schematically shown in each figure, they are simultaneously
Its practical structures as product is not represented.
The utility model provides a kind of one embodiment of printed circuit board based on chip testing, with reference to shown in Fig. 4；
It include: the first printed board 13 and the second printed board 14 set gradually from top to bottom；First printed board 13 and described the
Two printed boards 14 form electric path by connection key connection；Capacitor is provided in first printed board 13；The capacitor
Including at least one.
Preferably, first printed board 13 includes: the first top layer and the first bottom；The capacitor is arranged first
Top layer.
Specifically, the application is to solve refering to what is shown in Fig. 3, signal passes through on PCB first from chip (DUT) sending (TX)
It crosses a pair of of via hole and switches to internal layer, then switch to Bot layers (testerside) by via hole after one section of cabling；Then it passes through
It crosses capacitor and reaches RX signal wire part, switch to internal layer using via hole, then switched to by one section of cabling through via hole
DUTside.Since via hole is very long, the impedance of via hole is difficult to control here, when signal rate is up to 30Gbps or more, via hole
Signal via is influenced very big.Therefore the printed circuit board of existing conventional chip testing is arranged to two layers by the application
Plate, and the connecting key that needs to be arranged between two-ply establishes communication connection；Meeting basic detection parameters during design
After requiring, by the thickness design of the first printed circuit board than relatively thin, in the prior art since the bottom of circuit board is arranged in capacitor
On layer, the via length for resulting in signal process in this way is too long, increases the interference of signal, therefore its capacitor is arranged the application
In the first printed circuit board, it is greatly lowered the via length of signal in this way.
In this application, by forming printed circuit board by two pieces, and capacitor is arranged in the first most thin printing electricity
On the plate of road, the via length of signal lead is changed, makes its impedance control in controlled range, further improves signal
Rate.
Preferably, comprising: first printed board 13 includes: the first top layer and the first bottom；The capacitor setting exists
First bottom.
Preferably, second printed board 14 includes: the second top layer and the second bottom；In first bottom and institute
It states the second bottom and accommodating cavity for placing capacitor is set；The quantity of accommodating cavity matches one by one with the quantity of capacitor.
Preferably, the connecting key includes Place.
In this application, printed circuit board is arranged to two pieces of printed circuit boards, being also is subcard and mother matrix, the first print
Making sheet 13 is subcard, and the second printed board 14 is mother matrix；After printed circuit board is arranged to two pieces of printed boards, to realize circuit board
Two pieces of subcards and mother matrix need to be attached by signal normal communication, are generally arranged in the top layer of the bottom of subcard and mother matrix and welded
Disk, by Place into welding but not limited to this connection type；The first printed board 13 in the application realizes the biography of high speed signal
It is defeated, and the setting of wiring；And low speed signal and power unit be there is no completing, so subcard bottom to design other signals and
The pad of power supply with motherboard for connecting.Therefore the setting accommodating position between the bottom of subcard and the top of mother matrix is needed, is used for
Accommodate capacitor；With reference to shown in Fig. 4-5.
Accommodating cavity is set in this application, for placing capacitor, avoids carrying out printed circuit board again carrying out in bonding processes,
The damage to capacitor is caused, while also saving space.
Fig. 6 is the loss comparison diagram of prior art manner and the new design method of the application, and curve 12 is new design method
Source impedance damage curve, it can be seen that new design method loss improves about 0.5db, and loss improves about 10%.For difference
Project, improvement has difference, and the length of this and via hole has very direct relationship.
Newly-designed via length in the application is obviously shortened, and influence of the via hole for impedance and loss also can obviously drop
Low, signal quality improves obviously, has very important significance for the test of two-forty signal.Under normal circumstances, signal quality can
To promote 10%-20 or more.
It should be noted that above-described embodiment can be freely combined as needed.The above is only the utility model
Preferred embodiment, it is noted that for those skilled in the art, do not departing from the utility model principle
Under the premise of, several improvements and modifications can also be made, these improvements and modifications also should be regarded as the protection scope of the utility model.
Claims (5)
1. a kind of printed circuit board based on chip testing characterized by comprising
The first printed board and the second printed board set gradually from top to bottom；
First printed board and second printed board form electric path by connection key connection；
Capacitor is provided in first printed board；
The capacitor includes at least one.
2. as described in claim 1 based on the printed circuit board of chip testing, which is characterized in that the first printed board packet
It includes: the first top layer and the first bottom；
The capacitor is arranged in the first top layer.
3. as described in claim 1 based on the printed circuit board of chip testing characterized by comprising
First printed board includes: the first top layer and the first bottom；
The capacitor is arranged in the first bottom.
4. as claimed in claim 3 based on the printed circuit board of chip testing, which is characterized in that the second printed board packet
It includes: the second top layer and the second bottom；
In first bottom and second bottom, the accommodating cavity for placing capacitor is set；
The quantity of the accommodating cavity matches one by one with the quantity of capacitor.
5. as described in claim 1 based on the printed circuit board of chip testing, which is characterized in that the connecting key includes setting
Ball.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821475165.4U CN209089280U (en) | 2018-09-10 | 2018-09-10 | A kind of printed circuit board based on chip testing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821475165.4U CN209089280U (en) | 2018-09-10 | 2018-09-10 | A kind of printed circuit board based on chip testing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209089280U true CN209089280U (en) | 2019-07-09 |
Family
ID=67116228
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821475165.4U Active CN209089280U (en) | 2018-09-10 | 2018-09-10 | A kind of printed circuit board based on chip testing |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209089280U (en) |
-
2018
- 2018-09-10 CN CN201821475165.4U patent/CN209089280U/en active Active
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