CN217064111U - Power supply network for a chip and electronic device - Google Patents
Power supply network for a chip and electronic device Download PDFInfo
- Publication number
- CN217064111U CN217064111U CN202122559107.8U CN202122559107U CN217064111U CN 217064111 U CN217064111 U CN 217064111U CN 202122559107 U CN202122559107 U CN 202122559107U CN 217064111 U CN217064111 U CN 217064111U
- Authority
- CN
- China
- Prior art keywords
- power supply
- chip
- power
- transmission lines
- supply network
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The utility model provides a power supply network and electronic equipment of chip belongs to communication technology field. Wherein, the power supply network of this chip includes: the power management chip and the transceiver chip are arranged on the body; the power management chip is provided with a power supply pin, the transceiver chip is provided with a plurality of power supply pins, the power supply pins are respectively connected with the power supply pins through transmission lines, and the power supply pins form a star network structure through the transmission lines. Therefore, the path loss of the power supply network can be effectively reduced, the crosstalk between the power supplies of all paths can be reduced, and the whole power supply network can be optimized.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to a power supply network and electronic equipment of chip.
Background
The 5G (5th Generation Mobile Communication Technology, fifth Generation Mobile Communication Technology) network Communication Technology is one of the most advanced network Communication technologies in the world today. Compared with the commonly applied 4G (the 4th generation mobile communication technology, fourth generation mobile communication technology), the 5G network communication technology has a very obvious advantage in transmission speed, and especially when the 5G millimeter wave is applied, brand new technical experiences such as ultra-large bandwidth, ultra-low time delay, reliable connection, high-precision positioning and the like can be brought. Compared with the traditional network communication, the working frequency range of the millimeter wave reaches up to 52GHz, so that the whole development process from the design and test to the factory production of the millimeter wave terminal presents great challenges.
In the actual design of the millimeter wave terminal, due to the layout and wiring limitations of a complete machine and a Printed Circuit Board (PCB), a power supply network of a millimeter wave chip often becomes a difficult point in design, and the power supply network of the millimeter wave chip plays a crucial role in the performance of millimeter waves.
Disclosure of Invention
The embodiment of the utility model provides a power supply network and electronic equipment of chip can reduce power supply network's path loss effectively to reduce the crosstalk between each way power, thereby optimize whole power supply network.
The embodiment of the first aspect of the utility model provides a power supply network of chip, including printed circuit board PCB, power management chip and transceiver chip, wherein, printed circuit board PCB includes the body, power management chip and transceiver chip set up on the body; the power management chip is provided with a power supply pin, the transceiver chip is provided with a plurality of power supply pins, the power supply pins are respectively connected with the power supply pins through transmission lines, and the power supply pins form a star network structure through the transmission lines.
In an embodiment of the present invention, the power management chip and the transceiver chip are disposed on the same surface of the body, and the power management chip and the transceiver chip are disposed close to each other; or the power management chip and the transceiver chip are respectively arranged on two sides of the body, and the power management chip and the transceiver chip are oppositely arranged.
The utility model discloses an embodiment, every power supply pin in a plurality of power supply pins is respectively through at least two the transmission line with the power supply pin links to each other, wherein, at least two the transmission line sets up the same circuit layer of body, perhaps at least two the transmission line sets up respectively the different circuit layers of body, wherein, different circuit layers are adjacent circuit layer.
The utility model discloses an in an embodiment, printed circuit board PCB is still including setting up electronic components above the body, wherein, through the transmission line will electronic components with the power pin is established ties, just electronic components includes low impedance resistance.
In an embodiment of the invention, each distance between the transmission lines is greater than an isolation threshold.
In an embodiment of the invention, the printed circuit board PCB further comprises a ground hole disposed on the body, wherein the ground hole is disposed adjacent to the transmission line.
The embodiment of the second aspect of the utility model provides a power supply network of chip, which is characterized in that, including first printed circuit board PCB, second printed circuit board PCB, power management chip and transceiver chip, wherein, first printed circuit board PCB includes the first body, the power management chip sets up on the first body; the second printed circuit board, PCB, includes a second body, the transceiver chip being disposed on the second body; the power management chip is provided with a power supply pin, the transceiver chip is provided with a plurality of power supply pins, the power supply pins are respectively connected with the power supply pins through transmission lines, and the power supply pins form a star network structure through the transmission lines.
In one embodiment of the present invention, the first body is connected to the second body through a connector, and the connector is a low impedance connector.
An embodiment of the third aspect of the present invention provides an electronic device, including the power supply network of the foregoing chip.
The embodiment of the utility model provides a power supply network and electronic equipment of chip, including printed circuit board PCB, power management chip and transceiver chip, printed circuit board PCB includes the body, and power management chip and transceiver chip set up on the body, are provided with the power pin on the power management chip, are provided with a plurality of power supply pins on the transceiver chip, and wherein, a plurality of power supply pins pass through the transmission line and link to each other with the power pin respectively, and a plurality of power supply pins and power pin pass through the transmission line and constitute star network structure. Therefore, the path loss of the power supply network can be effectively reduced, the crosstalk between the power supplies of all paths can be reduced, and the whole power supply network is optimized.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic block diagram of a power supply network of a chip according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a star-shaped power supply wiring according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating power line comparison according to an embodiment of the present invention;
fig. 4(a) is a schematic diagram illustrating a power routing manner according to an embodiment of the present invention;
fig. 4(b) is a schematic diagram illustrating another power routing manner according to an embodiment of the present invention;
fig. 5 is a schematic block diagram of a printed circuit board PCB according to an embodiment of the present invention; and
fig. 6 is a block diagram of a power supply network of another chip according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with embodiments of the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the embodiments of the invention, as detailed in the appended claims.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the invention. As used in the embodiments of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used in embodiments of the present invention to describe various information, the information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, a first message may also be referred to as a second message, and similarly, a second message may also be referred to as a first message, without departing from the scope of embodiments of the present invention. The words "if" and "if" as used herein may be interpreted as "at … …" or "at … …" or "in response to a determination", depending on the context.
Reference will now be made in detail to the embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. The embodiments described below with reference to the drawings are exemplary and intended to be used for explaining the present invention, and should not be construed as limiting the present invention.
The power supply network and the electronic device of the chip of the embodiment of the present invention are described below with reference to the drawings.
Fig. 1 is a block diagram of a power supply network of a chip according to an embodiment of the present invention.
The embodiment of the utility model provides a power supply network of chip can be applied to in the electronic equipment who supports the millimeter wave function, for example: the mobile terminal device includes handheld terminal devices such as a 5G mobile phone, a 5G tablet computer, a 5G palmtop computer, and the like, and a smart television, a smart sound, a 5G in-vehicle computer, and the like, which are not limited herein.
When the electronic device (e.g., a handheld terminal device) uses the millimeter wave function, a millimeter wave Transceiver (Transceiver) chip is required to process and convert signals, because a plurality of circuit modules such as digital and analog modules exist inside the millimeter wave Transceiver chip, a power supply network of the electronic device is generally complex, power loss caused by direct current and alternating current impedances exists on a power path, and mutual crosstalk exists between power sources of various paths, which all affect the power supply of the millimeter wave Transceiver chip, thereby affecting the performance of a millimeter wave whole machine (i.e., the electronic device). The embodiment of the utility model provides a power supply network of chip can reduce power supply network's path loss effectively to reduce the crosstalk between each way power, thereby optimize whole power supply network.
As shown in fig. 1, the power supply network 100 of the chip may include a printed circuit board PCB110, a power management chip 120 and a transceiver chip 130, wherein the printed circuit board PCB110 may include a body 111, the power management chip 120 and the transceiver chip 130 may be disposed on the body 111, a power pin (not shown) is disposed on the power management chip 120, and a plurality of power pins (not shown) is disposed on the transceiver chip 130, wherein the plurality of power pins may be respectively connected to the power pins through transmission lines, and the plurality of power pins and the power pins may form a star network structure through the transmission lines. Wherein the distance between the respective transmission lines may be greater than the isolation threshold. It should be noted that the isolation threshold described in this embodiment may be calibrated according to actual requirements, and is not limited herein.
In an embodiment of the present invention, the transceiver chip 130 may be a millimeter wave transceiver chip capable of outputting an intermediate frequency signal of about 10GHz, and the Power Management chip 120 may include (Integrated) PMIC (Power Management Integrated Circuit), which can supply Power to a plurality of Power supply pins of the transceiver chip 130.
Specifically, referring to fig. 2, the power management chip 120 may be provided with a power Pin1, and the transceiver chip 130 may be provided with power pins Pin2, Pin3, and Pin4, wherein the power Pin1 is connected to the power pins Pin2, Pin3, and Pin4 through transmission lines, respectively, and forms a star network structure, and this connection manner may be referred to as a star routing manner.
Further, referring to fig. 3, the power traces adopt the star trace manner, so that each individual Pin power trace can be separated from the source of the output end (power Pin1) of the power management chip 120, and the distance between the transmission lines is greater than the isolation threshold, so that an adequate distance can be maintained between the transmission lines, the isolation of each power trace is increased, the crosstalk between the power traces is effectively reduced, and the signal quality of the millimeter wave terminal is ensured.
Still further, in an embodiment of the present invention, the PCB110 may further include a ground hole disposed on the body 111, wherein the ground hole may be disposed between adjacent transmission lines.
Specifically, when the power supply in the power supply network 100 of the chip has a high isolation requirement, a ground hole may be disposed between adjacent transmission lines for further increasing the isolation between the power supply traces of each path, so as to further reduce crosstalk between the power supply traces to meet the isolation requirement.
As a possible situation, a plurality of adjacent transmission lines can be selected according to actual situations and requirements, and a ground hole is arranged between the adjacent transmission lines so as to reasonably increase the isolation between the power supply lines.
For clarity of the above embodiment, in an embodiment of the present invention, the power management chip 120 and the transceiver chip 130 may be disposed on the same surface of the body 111, and the power management chip 120 and the transceiver chip 130 may be disposed adjacent to each other; or the power management chip 120 and the transceiver chip 130 are respectively disposed on both sides of the body 111, and the power management chip 120 and the transceiver chip 130 may be disposed opposite to each other.
It should be noted that, the two sides of the body 111 described in this embodiment may be the upper surface and the lower surface of the body 111.
In the embodiment of the present invention, in order to reduce the path loss of the chip power supply network, there are mainly the following two ways for the layout of the power management chip 120 and the transceiver chip 130: the layout mode is as follows: the power management chip 120 is placed adjacent (in close proximity) to the transceiver chip 130; layout mode two: the power management chip 120 and the transceiver chip 130 are placed back to back (disposed opposite to each other), that is, the projection areas of the power management chip 120 and the transceiver chip 130 are overlapped.
Specifically, if the power management chip 120 and the transceiver chip 130 are disposed on the same surface of the body 111 (i.e., the upper surface or the lower surface of the body 111), the power management chip 120 and the transceiver chip 130 can be disposed adjacent to each other in a first layout manner; if the power management chip 120 and the transceiver chip 130 are respectively disposed on two sides of the body 111 (i.e., the upper surface and the lower surface of the body 111), the power management chip 120 and the transceiver chip 130 can be placed back to back in a second layout manner.
Therefore, the layout of the power management chip and the transceiver chip can be optimized, the length of power wiring is reduced, the direct current impedance and the alternating current impedance of a power path are reduced, and the voltage drop and the loss of the power are reduced.
Further, in an embodiment of the present invention, each of the plurality of power pins may be connected to the power pin through at least two transmission lines, respectively, wherein the at least two transmission lines may be disposed on the same circuit layer of the body 111, or the at least two transmission lines may be disposed on different circuit layers of the body 111, respectively, wherein different circuit layers may be adjacent circuit layers.
It should be noted that the circuit layer described in this embodiment may include an upper surface layer, a lower surface layer, and a plurality of intermediate layers of the body 111, wherein the plurality of intermediate layers are disposed between the upper surface layer and the lower surface layer.
In the embodiment of the present invention, each of the plurality of power supply pins of the transceiver chip 130 can be connected to the power supply pin of the power management chip 120 through at least two transmission lines, wherein there can be two connection methods: the first connection mode: at least two transmission lines are arranged on the same line layer of the body 111; the second connection mode is that at least two transmission lines are respectively disposed on different circuit layers of the body 111, wherein the different circuit layers may be adjacent circuit layers.
As shown in fig. 4(a), the power Pin1 on the power management chip 120 is connected to the power Pin2 on the transceiver chip 130 through two transmission lines, where the two transmission lines are both located on the circuit layer 1 and form a planar loop trace; referring to fig. 4(b), as shown in fig. 4(b), the power Pin1 on the power management chip 120 is connected to the power Pin2 on the transceiver chip through two transmission lines, wherein the two transmission lines are respectively located on the line layer 1 and the line layer 2, and form a three-dimensional ring-shaped trace.
Therefore, enough space can be kept between the transmission lines, so that the isolation between the power supply wiring lines can be increased, the power supply wiring crosstalk is effectively reduced, and the signal quality of the millimeter wave terminal is ensured.
In an embodiment of the present invention, as shown in fig. 5, the PCB110 may further include an electronic component 112 disposed on the body 111, wherein the electronic component 112 is connected in series with the power pin through a transmission line, and the electronic component 112 may include a low impedance resistor. The low-impedance resistor can be a direct-current low-impedance resistor.
Specifically, when the power supply network 100 of the chip needs to use a series resistor, a dc low-impedance resistor may be selected and connected in series with the power supply pin of the power management chip 120, so as to avoid the self-impedance from having a large influence on the whole power supply network.
Therefore, the type selection of the power supply wiring series device can be optimized, and extra impedance introduced by the series device is reduced, so that the direct current impedance and the alternating current impedance of a power supply path are reduced, and the voltage drop and the loss of the power supply are reduced.
Fig. 6 is a block diagram of a power supply network of another chip according to an embodiment of the present invention.
As shown in fig. 6, the power supply network 600 of the chip may include a first printed circuit board PCB610, a second printed circuit board PCB620, a power management chip 630 and a transceiver chip 640, wherein the first printed circuit board PCB610 may include a first body 611, and the power management chip 630 is disposed on the first body 611; the second printed circuit board PCB620 may include a second body 621 with a transceiver chip 640 disposed on the second body 621. The power management chip 630 is provided with a power pin (not shown in the figure), and the transceiver chip 640 is provided with a plurality of power pins (not shown in the figure), wherein the plurality of power pins are respectively connected with the power pins through transmission lines, and the plurality of power pins and the power pins form a star network structure through the transmission lines, and this connection mode can be called a star-type wiring mode.
In the embodiment of the present invention, the power management chip 630 can be disposed on the first body 611, and the transceiver chip 640 can be disposed on the second body 621, and then the power pins of the power management chip 630 are connected to the power pins of the transceiver chip 640 respectively in the star-type wiring manner. Therefore, the path loss of the power supply network can be effectively reduced, the crosstalk between the power supplies of all paths can be reduced, and the whole power supply network can be optimized.
Further, in an embodiment of the present invention, the first body 611 may be connected with the second body 621 through a connector, and the connector may be a low impedance connector.
Specifically, the first connector may be disposed on the first body 611, the second connector may be disposed on the second body 621, and the first connector and the second connector may be connected through a flexible wiring board (e.g., an LCP (Liquid Crystal Polymer) board or a PTFE (polytetrafluoroethylene) board) so that the first body 611 and the second body 621 are connected.
In order to realize the above embodiment, the utility model discloses still provide an electronic equipment, its power supply network that includes above-mentioned chip, this electronic equipment can reduce power supply network's path loss effectively through the power supply network of above-mentioned chip to reduce the crosstalk between each way power, thereby optimize whole power supply network.
The embodiment of the utility model provides a technical scheme brings following beneficial effect at least:
the layout of the millimeter wave transceiver chip can be optimized, so that the length of power wiring is reduced, the direct current impedance and the alternating current impedance of a power path are reduced, and the voltage drop and the loss of the power are reduced.
Secondly, power supply wiring of a power supply network can be optimized, the length of the power supply wiring is reduced, and the wiring width is increased, so that the direct current impedance and the alternating current impedance of a power supply path are reduced, and the voltage drop and the loss of the power supply are reduced.
The type selection of the power wiring series device can be optimized, and extra impedance introduced by the series device is reduced, so that the direct current impedance and the alternating current impedance of a power path are reduced, and the voltage drop and the loss of the power are reduced.
And fourthly, the power supply wiring is in a star-shaped wiring mode, the sufficient distance between the transmission lines is kept, and the ground holes are additionally arranged between the transmission lines, so that the isolation between the power supply wirings of each path can be increased, the power supply wiring crosstalk is effectively reduced, and the signal quality of the millimeter wave terminal is ensured.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than those illustrated or described herein. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the invention, as detailed in the appended claims.
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. The present invention is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
It will be understood that the invention is not limited to the precise arrangements that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.
Claims (9)
1. The power supply network of the chip is characterized by comprising a Printed Circuit Board (PCB), a power management chip and a transceiver chip, wherein,
the PCB comprises a body, and the power management chip and the transceiver chip are arranged on the body;
the power management chip is provided with a power supply pin, the transceiver chip is provided with a plurality of power supply pins, the power supply pins are respectively connected with the power supply pins through transmission lines, and the power supply pins form a star network structure through the transmission lines.
2. The power supply network of the chip of claim 1, wherein the power management chip and the transceiver chip are disposed on the same side of the body, and the power management chip and the transceiver chip are disposed adjacent to each other; or
The power management chip and the transceiver chip are respectively arranged on two sides of the body, and the power management chip and the transceiver chip are oppositely arranged.
3. The power supply network of a chip of claim 1 wherein each of said plurality of power supply pins is connected to said power supply pin by at least two of said transmission lines, respectively,
the at least two transmission lines are arranged on the same line layer of the body; or
The at least two transmission lines are respectively arranged on different circuit layers of the body, wherein the different circuit layers are adjacent circuit layers.
4. The power supply network of chips of claim 1 wherein said printed circuit board PCB further comprises electronic components disposed above said body, wherein said electronic components are connected in series with said power pins by said transmission lines and said electronic components comprise low impedance resistors.
5. A power supply network for a chip as claimed in claim 1 or 3, wherein the distance between each of said transmission lines is greater than an isolation threshold.
6. The power supply network for a chip of claim 1 or 3 wherein said printed circuit board PCB further comprises a ground hole disposed above said body, wherein said ground hole is disposed between adjacent said transmission lines.
7. A power supply network of a chip, comprising a first printed circuit board PCB, a second printed circuit board PCB, a power management chip and a transceiver chip, wherein,
the first printed circuit board PCB comprises a first body, and the power management chip is arranged on the first body;
the second printed circuit board, PCB, includes a second body, the transceiver chip being disposed on the second body;
the power management chip is provided with a power supply pin, the transceiver chip is provided with a plurality of power supply pins, the power supply pins are respectively connected with the power supply pins through transmission lines, and the power supply pins form a star network structure through the transmission lines.
8. The power supply network for a chip of claim 7 wherein said first body is connected to said second body by a connector and said connector is a low impedance connector.
9. An electronic device characterized by a power supply network comprising a chip according to any of claims 1-6 or claims 7-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122559107.8U CN217064111U (en) | 2021-10-22 | 2021-10-22 | Power supply network for a chip and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122559107.8U CN217064111U (en) | 2021-10-22 | 2021-10-22 | Power supply network for a chip and electronic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217064111U true CN217064111U (en) | 2022-07-26 |
Family
ID=82475801
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122559107.8U Active CN217064111U (en) | 2021-10-22 | 2021-10-22 | Power supply network for a chip and electronic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217064111U (en) |
-
2021
- 2021-10-22 CN CN202122559107.8U patent/CN217064111U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8336203B2 (en) | Printed circuit board and layout method thereof | |
| TW200415825A (en) | Apparatus for crosstalk compensation in a telecommunications connnector | |
| TW201722217A (en) | Pocketed circuit board | |
| TWM268770U (en) | Connecter adapter | |
| CN217064111U (en) | Power supply network for a chip and electronic device | |
| CN110728108A (en) | Parameter configuration method for ultra-high-speed SerDes circuit system | |
| US8585432B2 (en) | Connector and optical transmission apparatus | |
| CN211297148U (en) | PCB structure and signal test equipment | |
| CN212628549U (en) | Connector with PCB fanout design framework | |
| CN100471365C (en) | Method for printed circuit board wiring and printed circuit board | |
| Zhang et al. | Application of a new power distribution scheme for complex printed circuit boards for high-speed signaling | |
| CN115101497B (en) | Integrated circuit packaging body, printed circuit board, board card and electronic equipment | |
| CN103025082B (en) | A kind of manufacture method of printed circuit board (PCB) and a kind of printed circuit board arrangement | |
| CN213937964U (en) | PCB (printed circuit board) compatible with network port and router | |
| CN111295043B (en) | Radio frequency circuit board | |
| CN114025465A (en) | PCB with isolation structure | |
| US10470308B1 (en) | Printed circuit board assembly and electronic device using the same | |
| CN214205970U (en) | PCB structure for optimizing transmission performance of high-speed backboard | |
| Lai | Experimental Noise and Signal Analysis on Printed Circuits Board Design | |
| CN101166401A (en) | Method and system for placing multiple loads in high-speed system | |
| CN103917044A (en) | Flexible circuit board and manufacturing method thereof | |
| CN210641126U (en) | PCB board | |
| CN110851377B (en) | High-speed serial computer expansion bus circuit topology | |
| CN211789644U (en) | Digital signal transmission device | |
| JPH11212672A (en) | Information processor, liquid crystal display device, integrated circuit, wiring board and production of information processor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |