CN206226833U - The printed circuit board (PCB) of optimal inspection via arrangement - Google Patents
The printed circuit board (PCB) of optimal inspection via arrangement Download PDFInfo
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- CN206226833U CN206226833U CN201621271067.XU CN201621271067U CN206226833U CN 206226833 U CN206226833 U CN 206226833U CN 201621271067 U CN201621271067 U CN 201621271067U CN 206226833 U CN206226833 U CN 206226833U
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Abstract
The utility model discloses a kind of printed circuit board (PCB) of optimal inspection via arrangement, including plate body（1）, the plate body（1）On be provided with it is some to via（2）, in two pairs of adjacent vias（2）In, wherein first pair of via（2）Between line and second pair of via（2）Between line be mutually perpendicular to, and second pair of via（2）In each via and first pair of via（2）In the distance between two vias it is equal.The utility model reasonably improves differential signal via arrangement mode, it is mutually perpendicular to the line between the line between first pair of via and second pair of via, efficient coupling path so between adjacent vias pair is more long, the crosstalk between signal can effectively be suppressed, further, since adjacent vias to the distance between it is longer relative to prior art, be easy to flatiron weld test probe, so that the operation of welding test probe is more simple, it is easy to operate.
Description
Technical field
The utility model belongs to the technical field of printed circuit board (PCB), and in particular to a kind of printing of optimal inspection via arrangement
Circuit board.
Background technology
As the design level of high-speed digital system, manufacturing process and encapsulation technology constantly improve, electronic equipment just towards
High integration, high-frequency, high speed, low-power consumption, small size and large-scale trend development, and the speed of development persistently adds
Hurry up, these factors easily trigger various SI（Signal integrity）Problem.In these problems, crosstalk（Refer to unwanted signals a from net
Network is transferred to adjacent networks）It is one of extremely universal and easily ignored problem, in any interconnection density than larger structure
On（Such as chip, encapsulation, PCB and connector）Crosstalk will occur（See reference document：EricBogatin writes Lee Yushan, Lee
Beautiful equality translates signal integrity analysis [M] Beijing:Electronic Industry Press, 2005:239~279.）.Excessive crosstalk may
The false triggering of circuit or unstable can be caused, system cisco unity malfunction is even resulted in when serious（See reference document：Zhang Mushui,
Li Yushan signal integrity analysis and design [M] Beijing:Electronic Industry Press, 2010:2~5, 116~145.）.Therefore,
It is critically important that crosstalk is carried out effectively to suppress.
SI is tested as PCB（Printed circuit board (PCB)）An important link after design, number of signals to be measured is numerous,
Under conditions of wiring space is in short supply, there is no enough spaces to reserve special signal testing point, therefore in actual test, it is past
Past is that selection is close to the signal layer-exchange hole-through of chip receiving terminal as test point.And interconnect intensive region reasonably design and
Optimization via arrangement mode, is necessary to reduce the bad harm such as crosstalk.In addition, carrying out SI surveys using test probe
During examination, the several factors under specifically used environment can all have influence on the result of measurement, it is most common be exactly probe and measured piece it
Between connected mode.
In the prior art, common via pair of the printed circuit board (PCB) of conventional design in die terminals（Here with differential signal
Via is illustrated）Arrangement mode as shown in figure 1, wherein differential signal via 2 ' is arranged in parallel to be in pairs distributed in plate
On body 1 ', the sidepiece of differential signal via 2 ' is additionally provided with ground hole 3 ', when SI tests are carried out, the two of the first test probe 4 '
Root test lead is welded on a pair of differential signal vias 2 ', and two test leads of the second test probe 5 ' are welded on adjacent
It is another on differential signal via 2 ', wherein dotted arrow represents the signal coupling path between adjacent differential signal via.This
Plant via arrangement mode signal coupling path shorter, cause crosstalk larger, additionally, after a probe has been welded, due to two
At a distance of relatively closely, when another probe is welded, because the temperature of flatiron is very high, its welding heat easily makes to have welded the pad of individual probe
The probe for connecting drops.
Therefore, but for one there is printing of the testing requirement again without sufficient space to reserve special test point electric
For the plate of road, via arrangement mode is reasonably designed in the region for interconnecting intensive, can make effectively to suppress crosstalk, and make test operation
It is more convenient.
Utility model content
The purpose of this utility model is to avoid of the prior art not enough and provide a kind of optimal inspection via arrangement
Printed circuit board (PCB), it passes through reasonably to improve the arrangement mode of via, can make effectively to suppress crosstalk, and make test operation more just
It is prompt.
The purpose of this utility model is achieved through the following technical solutions：
A kind of printed circuit board (PCB) of optimal inspection via arrangement, including plate body are provided, it is some right to be provided with the plate body
Via, in two pairs of adjacent vias, wherein the line between line and second pair of via between first pair of via mutually hangs down
Directly, each via and in second pair of via is equal with the distance between two vias in first pair of via.
As a further improvement, the via is differential signal via.
As a further improvement, the plate body is provided with ground hole in the sidepiece of via.
As a further improvement, the first test probe and the second test probe, the two of the first test probe are also included
Two vias of the root test lead respectively with first pair of via are welded to connect, two test leads point of the second test probe
Two vias not with second pair of via are welded to connect.
The printed circuit board (PCB) of the optimal inspection via arrangement that the utility model is provided, including plate body, are set on the plate body
Have some to via, in two pairs of adjacent vias, wherein the company between line and second pair of via between first pair of via
Line is mutually perpendicular to, and the distance between two vias in each via and first pair of via in second pair of via are homogeneous
Deng.The utility model reasonably improves differential signal via arrangement mode, makes the line between first pair of via and second pair
Line between via is mutually perpendicular to, and the efficient coupling path between such adjacent vias pair is more long, between effectively can suppressing signal
Crosstalk, further, since adjacent vias to the distance between it is longer relative to prior art, be easy to flatiron weld test visit
Head so that the operation of welding test probe is more simple, easy to operate.
Brief description of the drawings
Using accompanying drawing, the utility model is described in further detail, but embodiment in accompanying drawing is not constituted to of the present utility model
Any limitation, for one of ordinary skill in the art, on the premise of not paying creative work, can also be according to following attached
Figure obtains other accompanying drawings.
Fig. 1 is the via distribution schematic diagram of printed circuit board (PCB) in the prior art.
Fig. 2 is the via distribution schematic diagram of the utility model printed circuit board (PCB).
Fig. 3 is the simulation comparison structure chart that prior art is distributed in ADS with via of the present utility model.
Fig. 4 is prior art and emulation insertion loss comparison diagram of the present utility model.
Fig. 5 prior arts and emulation crosstalk comparison diagram of the present utility model.
Fig. 6 carries out SI test flow charts using the printed circuit board (PCB) that the utility model optimal inspection via is arranged.
Specific embodiment
In order that those skilled in the art more fully understands the technical solution of the utility model, below in conjunction with the accompanying drawings and tool
The utility model is described in further detail body embodiment, it is necessary to explanation is, in the case where not conflicting, the application's
Feature in embodiment and embodiment can be mutually combined.
As shown in Fig. 2 the printed circuit board (PCB) of optimal inspection via arrangement described in the utility model, including plate body 1, it is described
It is provided with some to via 2 on plate body 1, the plate body 1 is provided with ground hole 3 in the sidepiece of via 2, and the via 2 is difference letter
Number via.In two pairs of adjacent vias 2, wherein the line phase between line and second pair of via 2 between first pair of via 2
Mutually vertically, each via and in second pair of via 2 is equal with the distance between two vias in first pair of via 2.
The utility model also includes the first test probe 4 and the second test probe 5, two test leads point of the first test probe 4
Two vias not with first pair of via 2 are welded to connect, and two test leads of the second test probe 5 are respectively with described
Two pairs of the two of via 2 vias are welded to connect.
The printed circuit board (PCB) of the optimal inspection via arrangement that the utility model is provided reasonably improves differential signal via
Arrangement mode, is mutually perpendicular to the line between the line between first pair of via and second pair of via, such adjacent vias it
Between efficient coupling path it is more long, can effectively suppress the crosstalk between signal, further, since the distance between adjacent vias relative to
Prior art is longer, can reduce high temperature flatiron to having welded the interference of probe, is easy to weld test probe with flatiron so that welding is surveyed
The operation of probe header is more simple, easy to operate.
Although it should be noted that only having carried out illustrating to say with 3 pairs of differential signal vias and several ground hole in the present embodiment
It is bright, but the utility model is suitable for the printed circuit board (PCB) with any amount via, as long as ensureing the difference letter of arbitrary neighborhood
Mutually T-shaped vertical interlaced mode between number via pair.
Referring to Fig. 6, Fig. 6 carries out SI testing process using the printed circuit board (PCB) that the utility model optimal inspection via is arranged
Figure.
The printed circuit board (PCB) arranged using the utility model optimal inspection via carries out SI tests, comprises the following steps：
S1, in the PCB design stage, in the receiving terminal of the signal for having SI testing requirements, the position of layer is changed in signal
Put, according to the arrangement mode of via in Fig. 2, two pairs of vias adjacent on printed circuit board (PCB) plate body is arranged into wherein first pair mistake
The line between line and second pair of via between hole is mutually perpendicular to, and each via in second pair of via and first pair
The distance between two vias in via are equal, and the via arrangement mode of this mode increased effective coupling of differential signal
Combining footpath（As dotted arrow represents coupling path in Fig. 2）, and then crosstalk can be reduced；Additionally, the sidepiece addition in via is equal
The ground hole of quantity, to provide good return flow path.
S2, obtain printed circuit board (PCB) plate body according to designing and producing, by two test leads of the first test probe respectively with
Two vias of first pair of via are welded to connect, by two test leads of the second test probe respectively with described second pair
Two vias of via are welded to connect；For the convenience of welding operation, first first test probe on the left side and its test are drawn
String pendulum is put well and is welded to connect with two vias of first pair of via, then by second test probe on the right and its test
Lead is with perpendicular to the first test probe（Vertically upward or vertically downward）Mode be well placed and with second pair of mistake
Two vias in hole are welded to connect.This method convenient use flatiron put in a vertical manner is welded, and is reduced high temperature and is ironed
Iron is to having welded the interference of probe, while influencing each other between can reducing test lead.Putting test probe and its test lead
During, never bend test lead.Reason has at 2 points：One is very thin test lead, and bending is easily broken, so that fragile test
Probe；Two is the transmission that test lead bending can damage high speed signal.
S3, measuring signal integrality is carried out to printed circuit board (PCB) using test probe.
The utility model reasonably improves differential signal via arrangement mode in the design phase, makes between first pair of via
Line and second pair of via between line be mutually perpendicular to, the efficient coupling path between such adjacent vias is more long, can have
Effect suppresses the crosstalk between signal, further, since the distance between adjacent vias are longer relative to prior art, is easy to be welded with flatiron
Connect test probe so that the operation of welding test probe is more simple, easy to operate.
For the validity of technical solutions of the utility model, following simulating, verifying has been carried out：
Based on prior art and technical solutions of the utility model, enter in ViaWizard via modeling tools respectively
Row via is built and is touched, and is then introduced into forming 3 D electromagnetic field model in three-dimensional full-wave electromagnetic field simulation software HFSS（Such as Fig. 1 and Fig. 2）
And S parameter is extracted, then the via arrangement mode for contrasting prior art and technical solutions of the utility model is imported in ADS softwares
In insertion loss and crosstalk size.Simulation comparison structure in ADS is as shown in Figure 3.
Simulation result in comparison diagram 4 and Fig. 5, it is found that the insertion loss in two schemes is more or less the same, and difference is 10-2Number
Magnitude, and crosstalk differs greatly, crosstalk of the present utility model is significantly less than prior art, and both differences reach
30dB.Therefore, the via arrangement mode that T-shaped vertical interlaced is distributed can effectively be suppressed using closing on differential signal via
Crosstalk, reduces harm of the crosstalk to high speed signal.
Many details are elaborated in above description in order to fully understand the utility model, but, this practicality is new
Type can also be different from other modes described here to implement using other, it is thus impossible to be interpreted as protecting the utility model
Protect the limitation of scope.
In a word, although the utility model lists above-mentioned preferred embodiment, although it should be noted that the skill of this area
Art personnel can carry out various change and remodeling, unless such change and remodeling deviate from scope of the present utility model, otherwise
Should be construed as being included in protection domain of the present utility model.
Claims (4)
1. a kind of printed circuit board (PCB) of optimal inspection via arrangement, including plate body（1）, the plate body（1）On be provided with it is some right
Via（2）, it is characterised in that：In two pairs of adjacent vias（2）In, wherein first pair of via（2）Between line and second pair
Via（2）Between line be mutually perpendicular to, and second pair of via（2）In each via and first pair of via（2）In two
The distance between individual via is equal.
2. the printed circuit board (PCB) that optimal inspection via according to claim 1 is arranged, it is characterised in that：The via（2）
It is differential signal via.
3. the printed circuit board (PCB) that optimal inspection via according to claim 2 is arranged, it is characterised in that：The plate body（1）
In via（2）Sidepiece be provided with ground hole（3）.
4. the printed circuit board (PCB) that the optimal inspection via according to claim 1 or 2 or 3 is arranged, it is characterised in that：Also include
There is the first test probe（4）With the second test probe（5）, the first test probe（4）Two test leads respectively with described
A pair of vias（2）Two vias be welded to connect, the second test probe（5）Two test leads respectively with second pair of mistake
Hole（2）Two vias be welded to connect.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621271067.XU CN206226833U (en) | 2016-11-25 | 2016-11-25 | The printed circuit board (PCB) of optimal inspection via arrangement |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621271067.XU CN206226833U (en) | 2016-11-25 | 2016-11-25 | The printed circuit board (PCB) of optimal inspection via arrangement |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206226833U true CN206226833U (en) | 2017-06-06 |
Family
ID=58791630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621271067.XU Active CN206226833U (en) | 2016-11-25 | 2016-11-25 | The printed circuit board (PCB) of optimal inspection via arrangement |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206226833U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106385764A (en) * | 2016-11-25 | 2017-02-08 | 湖南长城银河科技有限公司 | Printed circuit board with optimized testing through hole arrangement and testing method thereof |
| CN114423147A (en) * | 2022-01-21 | 2022-04-29 | 苏州浪潮智能科技有限公司 | Printed circuit board link connection device and method, printed circuit board and equipment |
-
2016
- 2016-11-25 CN CN201621271067.XU patent/CN206226833U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106385764A (en) * | 2016-11-25 | 2017-02-08 | 湖南长城银河科技有限公司 | Printed circuit board with optimized testing through hole arrangement and testing method thereof |
| CN114423147A (en) * | 2022-01-21 | 2022-04-29 | 苏州浪潮智能科技有限公司 | Printed circuit board link connection device and method, printed circuit board and equipment |
| CN114423147B (en) * | 2022-01-21 | 2023-08-15 | 苏州浪潮智能科技有限公司 | Printed circuit board link connection device, method, printed circuit board and equipment |
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| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20220311 Address after: 410205 building 15, phase I, Changsha Zhongdian Software Park, No. 39, Jianshan Road, high tech Development Zone, Changsha, Hunan Patentee after: HUNAN GREATWALL GALAXY TECHNOLOGY Co.,Ltd. Patentee after: National University of Defense Technology Address before: 2 / F, headquarters building, 39 Jianshan Road, high tech Zone, Changsha City, Hunan Province, 410205 Patentee before: HUNAN GREATWALL GALAXY TECHNOLOGY Co.,Ltd. |