CN208673180U - A kind of high-precision correction circuit for bandgap voltage reference - Google Patents

Abstract

The utility model discloses a kind of high-precision correction circuits for bandgap voltage reference.The circuit includes amplifier, capacitor, PMOS tube and trims circuit；The reference voltage V that amplifier reverse phase terminal strip gap a reference source generates_BG, amplifier in-phase end, which connects, trims the first terminal V of circuit_f, amplifier output end and capacitor first terminal and the interconnection of the grid of PMOS tube, the source electrode of PMOS tube connect power vd D, the drain electrode of PMOS tube and capacitor Second terminal and trim circuit Second terminal V_topIt is connected with each other, trims circuit third terminal V_1.2For the output voltage after correction, circuit forth terminal V is trimmed_bottomGround connection.Buffer circuit in band gap reference is integrated by the utility model with correcting circuit, can correction reference voltage influence the error generated due to factors such as process corner, imbalance, temperature, the carrying load ability finely tuned influence to reference voltage temperature characterisitic and improve output voltage can be eliminated.The utility model trims mode using number, has the advantages that correction is flexible, precision is high, low in energy consumption, area is small.

Description

A kind of high-precision correction circuit for bandgap voltage reference

Technical field

The utility model relates to power technique fields, and in particular to a kind of high-precision correction for bandgap voltage reference Circuit.

Background technique

With the continuous improvement of level of integrated system, almost all of integrated circuit requires a high-precision a reference source and promotees System is set to reach optimum performance, and band gap reference performance is the most superior, is used widely in integrated circuits.In integrated electricity Since process deviation, mismatch and extraneous variation, temperature change etc. of loading can all influence band gap reference essence in the manufacturing process of road It spends, in order to obtain high-precision band gap reference, it usually needs use some alignment techniques.Traditional alignment technique is typically all Element in band gap reference core circuit is trimmed, this introducing meeting for trimming technology so that outputting reference voltage or The temperature characterisitic of reference current is deteriorated, and influences a reference source precision.Traditional technology that trims is typically all to use laser trimming, fuse Trim technology, higher cost and to trim rear outputting reference immutable cannot cope with encapsulation pressure, environment temperature changes bring It influences.

Utility model content

In view of the problems of the existing technology, the utility model provides a kind of for correcting repairing for bandgap voltage reference Circuit is adjusted, while a kind of bandgap voltage reference high-precision correction circuit for being trimmed circuit based on this being also provided.

The circuit that trims includes register, 4-16 line decoder, NMOS tube MC1~MC16, resistance R0~R16.It is described First bit correction signal Trim<0>of first input end and the register control of 4-16 line decoder is connected with each other, and 4-16 line is translated Second input terminal of code device and the second bit correction signal Trim<1>of register control are connected with each other, and the of 4-16 line decoder Three input terminals and the third bit correction signal Trim<2>of register control are connected with each other, the 4th input terminal of 4-16 line decoder It is connected with each other with the 4th bit correction signal Trim<3>of register control.

First output end of the 4-16 line decoder and the grid of MC1 are connected with each other, and the second of 4-16 line decoder is defeated The grid of outlet and MC2 are connected with each other, and the third output end of 4-16 line decoder and the grid of MC3 are connected with each other, and 4-16 line is translated 4th output end of code device and the grid of MC4 are connected with each other, and the grid of the 5th output end and MC5 of 4-16 line decoder mutually interconnects It connects, the 6th output end of 4-16 line decoder and the grid of MC6 are connected with each other, the 7th output end and MC7 of 4-16 line decoder Grid be connected with each other, the grid of the 8th output end of 4-16 line decoder and MC8 are connected with each other, the 9th of 4-16 line decoder the The grid of output end and MC9 are connected with each other, and the tenth output end of 4-16 line decoder and the grid of MC10 are connected with each other, 4-16 line 11st output end of decoder and the grid of MC11 are connected with each other, the grid of the 12nd output end and MC12 of 4-16 line decoder Pole is connected with each other, and the 13rd output end of 4-16 line decoder and the grid of MC13 are connected with each other, and the tenth of 4-16 line decoder the The grid of four output ends and MC14 are connected with each other, and the 15th output end of 4-16 line decoder and the grid of MC15 are connected with each other, 16th output end of 4-16 line decoder and the grid of MC16 are connected with each other.

The first terminal of R0 is the forth terminal V for trimming circuit_bottom, the Second terminal of R0 and the first terminal of R1 are mutual The first terminal of connection, the Second terminal of R1, the source electrode of MC1 and R2 is connected with each other, the Second terminal of R2, the source electrode of MC2 and R3 First terminal be connected with each other, the first terminal of the Second terminal of R3, the source electrode of MC3 and R4 is connected with each other, the Second terminal of R4, The source electrode of MC4 and the first terminal of R5 are connected with each other, and the first terminal of the Second terminal of R5, the source electrode of MC5 and R6 is connected with each other, The first terminal of the Second terminal of R6, the source electrode of MC6 and R7 is connected with each other, and the first of the Second terminal of R7, the source electrode of MC7 and R8 Terminal is connected with each other, and the first terminal of the Second terminal of R8, the source electrode of MC8 and R9, which is connected with each other, becomes the third end for trimming circuit Sub- V_1.2；The first terminal of the Second terminal of R9, the source electrode of MC9 and R10 is connected with each other, the source electrode of the Second terminal of R10, MC10 It is connected with each other with the first terminal of R11, the first terminal of the Second terminal of R11, the source electrode of MC11 and R12 is connected with each other, R12's The first terminal of Second terminal, the source electrode of MC12 and R13 is connected with each other, and the of the Second terminal of R13, the source electrode of MC13 and R14 One terminal is connected with each other, and the first terminal of the Second terminal of R14, the source electrode of MC14 and R15 is connected with each other, the Second terminal of R15, The source electrode of MC15 and the first terminal of R16 are connected with each other, and the Second terminal of R16, the source electrode of MC16, which are connected with each other to become, trims electricity The Second terminal V on road_top。

The drain electrode of MC1, the drain electrode of MC2, the drain electrode of MC3, the drain electrode of MC4, the drain electrode of MC5, the drain electrode of MC6, the leakage of MC7 Pole, the drain electrode of MC8, the drain electrode of MC9, the drain electrode of MC10, the drain electrode of MC11, the drain electrode of MC12, the drain electrode of MC13, the leakage of MC14 Pole, the drain electrode of MC15, the drain electrode of MC16 are connected with each other as the first terminal V for trimming circuit_f。

The high-precision correction circuit of bandgap voltage reference includes operational amplifier A1, capacitor C1, PMOS tube M1, trims electricity Road.The reference voltage V that the anti-phase input terminal strip gap a reference source of operational amplifier A1 generates_BG, operational amplifier A1's is same mutually defeated Enter end and trims the first terminal V of circuit_fBe connected with each other, the output end of operational amplifier A1 and the first terminal of capacitor C1 and The grid of PMOS tube M1 is connected with each other, and the source electrode of PMOS tube M1 connects power vd D, the drain electrode of PMOS tube M1 and the second end of capacitor C1 Son and the Second terminal V for trimming circuit_topIt is connected with each other, trims the third terminal V of circuit_1.2For the output voltage after correction, repair Adjust the forth terminal V of circuit_bottomIt is grounded GND.

Buffer circuit in band gap reference is integrated by the utility model with correcting circuit, being capable of correction reference voltage Since the factors such as process corner, imbalance, temperature influence the error generated, the influence finely tuned to reference voltage temperature characterisitic can be eliminated And improve the carrying load ability of output voltage.The utility model trims mode using number, has and corrects flexible, precision height, function Consume advantage low, that area is small.

Detailed description of the invention

Fig. 1 is common bandgap voltage reference core circuit.

Fig. 2 is to trim circuit in the utility model.

Fig. 3 is the circuit connection diagram of the utility model.

Specific embodiment

The technical solution of the utility model is described in detail with reference to the accompanying drawings and examples, it is readily available more preferable Understanding.

It is a kind of common bandgap voltage reference core circuit, this circuit is for generating a reference voltage shown in Fig. 1 V_BG, theory analysis is it can be concluded that this reference voltage V when zero-temperature coefficient_BG≈ 1.25V, but due to process corner, imbalance, temperature Etc. factors influence meeting so that reference voltage value generates error, in order to eliminate the error of reference voltage generation, it is electric to need to design correction Reference voltage is corrected near ideal value by road.By reasonably designing and carrying out monte carlo emulation to this circuit, imitate Very it can be concluded that outputting reference voltage is between 1.1V-1.3V, the utility model needs to generate the reference voltage of a 1.2V, because This needs use trims technology and output voltage is adapted to 1.2V.

Commonly trimming technology all is typically trimmed to the resistance R1 in Fig. 1 by trimming to resistance, And this introducing for trimming technology can change the temperature characterisitic of original outputting reference voltage, be typically only capable to make small part output voltage Temperature characterisitic improves, in addition a big chunk temperature characterisitic be deteriorated, therefore the method for trimming resistance R1 be not particularly suited for it is more high-precision Spend occasion.In order to improve the precision of outputting reference voltage, the utility model provides a kind of novel correcting circuit, this correction electricity Road does not change the temperature characterisitic of outputting reference voltage, and specific implementation circuit is as shown in Figure 2,3.In order not to change outputting reference voltage Temperature characterisitic, the reference voltage V that the resistance R1 in core circuit is not trimmed, but will be obtained by core circuit_BGMake For the input voltage of entire correcting circuit, by the effect meeting in negative-feedback circuit circuit so that amplifier A1 in-phase end and backward end Current potential is equal, and the current potential of in-phase end is also equal to the reference voltage V of core circuit generation_BG。

Trim NMOS tube MC1, MC2 in circuit, MC3, MC4, MC5, MC6, MC7, MC8, MC9, MC10, MC11, MC12, MC13, MC14, MC15, MC16 play on-off actions, and the conducting of switch is controlled by register with turning off, and register has 4 bit address, and 4 Bit address is connected with the input terminal of 4-16 line decoder, 16 output ends of 4-16 line decoder respectively with the grid of MC1-MC16 It is connected, therefore passes through every setting 0 or 1 to register, so that it may controls MC1-MC16 conducting or shutdown.When Trim<0>~ When Trim<3>is 0000, only MC1 conducting, other shutdowns；When Trim<0>~Trim<3>is 0001, only MC2 conducting, Other shutdowns；When Trim<0>~Trim<3>is 0010, only MC3 conducting, other shutdowns；When Trim<0>~Trim<3>is When 0011, only MC4 conducting, other shutdowns；When Trim<0>~Trim<3>is 0100, only MC5 conducting, other shutdowns； When Trim<0>~Trim<3>is 0101, only MC6 conducting, other shutdowns；When Trim<0>~Trim<3>is 0110, only There are MC7 conducting, other shutdowns；When Trim<0>~Trim<3>is 0111, only MC8 conducting, other shutdowns；When Trim<0> When~Trim<3>is 1000, only MC9 conducting, other shutdowns；When Trim<0>~Trim<3>is 1001, only MC10 is led It is logical, other shutdowns；When Trim<0>~Trim<3>is 1010, only MC11 conducting, other shutdowns；When Trim<0>~Trim< 3 > be 1011 when, only MC12 conducting, other shutdowns；When Trim<0>~Trim<3>is 1100, only MC13 conducting is other Shutdown；When Trim<0>~Trim<3>is 1101, only MC14 conducting, other shutdowns；When Trim<0>~Trim<3>is When 1110, only MC15 conducting, other shutdowns；When Trim<0>~Trim<3>is 1111, only MC16 conducting, Qi Taguan It is disconnected；All only one NMOS transistor conductions of any moment.As the reference voltage V that core circuit generates_BGWhen for 1.1 V, Trim<0>~ Trim<3>is set as 0000, MC1 conducting, V_1.2Export 1.2V voltage；As the reference voltage V that core circuit generates_BGFor 1.3 V When, Trim<0>~Trim<3>is set as 1111, MC16 conducting, V_1.2Export 1.2V voltage；When the benchmark electricity that core circuit generates Press V_BGIt, can be by adjusting the value of register come so that some switch conduction, to make when a certain value between 1.1V-1.3V Obtain V_1.2Export the precision voltage reference of 1.2V.

The correcting circuit of the utility model is similar to in-phase proportion amplifier, therefore the temperature of output voltage and input voltage is special Property it is consistent, will not change the temperature characterisitic of input voltage, it is this trim mode eliminate trim it is special to outputting reference voltage temperature The influence of property.The utility model can also eliminate the influence of itself offset voltage of amplifier A1, and the offset voltage that A1 is generated can be regarded Prime core circuit reference voltage V_BGThe error of generation can be eliminated by trimming for correcting circuit.The utility model uses Output voltage V can be improved in series voltage negtive backword structure_1.2Carrying load ability, rear class do not need to connect buffer circuit again.This reality With novel in addition to generating 1.2V fixed reference voltage, it can also be used to generate other fixed value reference voltages.

Claims (2)

1. a kind of high-precision correction circuit for bandgap voltage reference, including trim circuit, it is characterised in that it is described to trim Circuit includes register, 4-16 line decoder, NMOS tube MC1~MC16 and resistance R0~R16；The first terminal of resistance R0 is to repair Adjust the forth terminal V of circuit_bottom, the Second terminal and the first terminal interconnection of resistance R1 of resistance R0, the second of resistance R1 The first terminal of terminal, the source electrode of NMOS tube MC1 and resistance R2 is connected with each other, the source of the Second terminal of resistance R2, NMOS tube MC2 The first terminal of pole and resistance R3 are connected with each other, the first end of the Second terminal of resistance R3, the source electrode of NMOS tube MC3 and resistance R4 Son is connected with each other, and the first terminal of the Second terminal of resistance R4, the source electrode of NMOS tube MC4 and resistance R5 is connected with each other, resistance R5 Second terminal, NMOS tube MC5 source electrode and resistance R6 first terminal be connected with each other, Second terminal, the NMOS tube of resistance R6 The source electrode of MC6 and the first terminal of resistance R7 are connected with each other, the Second terminal of resistance R7, the source electrode of NMOS tube MC7 and resistance R8 First terminal be connected with each other, the first terminal of the Second terminal of resistance R8, the source electrode of NMOS tube MC8 and resistance R9 is connected with each other As the third terminal V for trimming circuit_1.2；The first terminal of the Second terminal of resistance R9, the source electrode of NMOS tube MC9 and resistance R10 It is connected with each other, the first terminal of the Second terminal of resistance R10, the source electrode of NMOS tube MC10 and resistance R11 is connected with each other, resistance The first terminal of the Second terminal of R11, the source electrode of NMOS tube MC11 and resistance R12 is connected with each other, the Second terminal of resistance R12, The first terminal of the source electrode of NMOS tube MC12 and resistance R13 are connected with each other, the source of the Second terminal of resistance R13, NMOS tube MC13 The first terminal of pole and resistance R14 are connected with each other, and the of the Second terminal of resistance R14, the source electrode of NMOS tube MC14 and resistance R15 One terminal is connected with each other, and the first terminal of the Second terminal of resistance R15, the source electrode of NMOS tube MC15 and resistance R16 is connected with each other, The Second terminal of resistance R16, the source electrode of NMOS tube MC16 are connected with each other as the Second terminal V for trimming circuit_top；NMOS tube MC1 The drain electrode of~MC16, which is connected with each other, becomes the first terminal V for trimming circuit_f；4 input terminals of the 4-16 line decoder and institute 4 correction signal output end sequences for stating register control are connected；16 output ends of the 4-16 line decoder are sequentially number point It is not connected with each other with the grid of NMOS tube MC1~MC16.

2. a kind of high-precision correction circuit for bandgap voltage reference, the correcting circuit include operational amplifier A1, electricity Hold and trims circuit described in C1, PMOS tube M1 and claim 1；The anti-phase input terminal strip gap a reference source of operational amplifier A1 The reference voltage V of generation_BG, the non-inverting input terminal of operational amplifier A1 and the first terminal V for trimming circuit_fIt is connected with each other, operation The grid of the output end of amplifier A1 and the first terminal of capacitor C1 and PMOS tube M1 is connected with each other, and the source electrode of PMOS tube M1 connects electricity The drain electrode of source VDD, PMOS tube M1 and the Second terminal of capacitor C1 and trim circuit Second terminal V_topIt is connected with each other, trims circuit Third terminal V_1.2For the output voltage after correction, circuit forth terminal V is trimmed_bottomIt is grounded GND.