CN106125818B - A kind of power-supply circuit and its control method - Google Patents
A kind of power-supply circuit and its control method Download PDFInfo
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- CN106125818B CN106125818B CN201610716077.8A CN201610716077A CN106125818B CN 106125818 B CN106125818 B CN 106125818B CN 201610716077 A CN201610716077 A CN 201610716077A CN 106125818 B CN106125818 B CN 106125818B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
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Abstract
The embodiment of the present invention provides a kind of control method of power-supply circuit, and power-supply circuit includes the first mu balanced circuit and the second mu balanced circuit, and the load current of the first mu balanced circuit is more than the load current of the second mu balanced circuit, and methods described includes：When load is in normal mode of operation, supply voltage is provided for load by the first mu balanced circuit；When load is in low power mode of operation, supply voltage is provided for load by the second mu balanced circuit.Under different power consumption pattern power supply is provided by different mu balanced circuits, it is ensured that loaded work piece reduces power consumption under preferably power consumption mode, meanwhile, sub-module is designed to be considered with power consumption, can improve design efficiency.
Description
Technical field
The present invention relates to IC design field, more particularly to a kind of power-supply circuit and its control method.
Background technology
In IC design field, with manufacturing process striding forward to deep submicron process, low-power consumption, which has become, to be set
Key in meter, power consumption is reduced as one of critical consideration in design.
In existing IC design, mainly when chip designs, by the optimization of power consumption, set from overall
The power consumption of chip is reduced on meter, needs to take more time in the design, and the power consumption that can be reduced is also to have limitation,
It is difficult to reduce chip overall power to a greater degree.
The content of the invention
The invention provides a kind of power-supply circuit and its control method, by different voltage stabilizing electricity under different power consumption pattern
Road provides power supply, reduces power consumption, improves design efficiency.
The invention provides a kind of control method of power-supply circuit, power-supply circuit include the first mu balanced circuit and
Second mu balanced circuit, the load current of the first mu balanced circuit are more than the load current of the second mu balanced circuit, and methods described includes：
When load is in normal mode of operation, supply voltage is provided for load by the first mu balanced circuit；
When load is in low power mode of operation, supply voltage is provided for load by the second mu balanced circuit.
Alternatively, the switch module being connected with the output end of the second mu balanced circuit is also included in power-supply circuit, is used for
The output of the output voltage of the second mu balanced circuit is controlled, wherein, the second mu balanced circuit is constantly in working condition, then, in addition to：
After instruction of the load into low power mode of operation is received, first the dynamic power consumption of load is closed, then by the first voltage stabilizing
Circuit is closed, and last controlling switch module is in the conduction state, to cause the second mu balanced circuit to provide electricity to load
Source voltage；After instruction of the load in normal mode of operation is received, first the dynamic power consumption of load is opened, then by first
Mu balanced circuit is in running order, and controlling switch module finally is in into open-circuit condition, to cause the first mu balanced circuit to load
Supply voltage is provided.
In addition, present invention also offers a kind of power-supply circuit, including：
First mu balanced circuit, for providing supply voltage when load is in normal mode of operation for load；
Second mu balanced circuit, for providing supply voltage when load is in low power mode of operation for load, first is steady
The load current of volt circuit is more than the load current of the second mu balanced circuit.
Alternatively, first mu balanced circuit includes tie point, the second branch road, constant-current source and the first electric capacity；Wherein,
Tie point includes the power transistor, reference voltage transistor, enabled transistor and first being sequentially connected in series
Pull-down transistor, power transistor one end connection supply voltage of tie point, first pull-down transistor one end ground connection, with reference to electricity
The grid end connection reference voltage of piezoelectric crystal, enable the grid end connection enable signal of transistor；
Second branch road includes driving transistor and the second pull-down transistor being sequentially connected in series, and the driving of the second branch road is brilliant
Body pipe one end connection supply voltage, second pull-down transistor one end ground connection；
Constant-current source is respectively that driving transistor and the first pull-down transistor, the second pull-down transistor provide bias current, is driven
The current output terminal of dynamic transistor is connected to the grid end of power transistor；
The common port of power transistor and reference voltage transistor is voltage output end, to export first voltage.
Alternatively, constant-current source includes：
For the first transistor of the type of attachment of mirror image diode, the first transistor connection input current, and respectively the
Three transistors and the 4th transistor provide the bias current of mirror image；
The 7th transistor being connected with third transistor, bias current is provided from third transistor to the 7th transistor；
The 8th transistor being connected with the 4th transistor, bias current is provided from the 4th transistor to the 8th transistor；
For the 5th transistor of the type of attachment of mirror image diode, the 5th transistor connects the 9th transistor, the 9th crystal
7th transistor of the type of attachment of Guan Youwei mirror image diodes provides bias current, is carried from the 5th transistor to driving transistor
For the bias current of mirror image；
8th transistor is the type of attachment of mirror image diode, is provided for the first pull-down transistor and the second pull-down transistor
The bias current of mirror image.
Alternatively, constant-current source also includes：
The second transistor of the bias current of mirror image is provided by the first transistor；
The tenth transistor and the 6th transistor of concatenation, from second transistor to the tenth transistor of concatenation and the 6th crystal
Pipe provides bias current；
With the 11st transistor of the 7th transistor series connection, from third transistor to the 7th transistor of concatenation and the 11st
Transistor provides bias current, the 7th transistor of concatenation and the type of attachment that the 11st transistor is mirror image diode；
With the tenth two-transistor of the 8th transistor series connection, from the 4th transistor to the 8th transistor of concatenation and the 12nd
Transistor provides bias current, the 8th transistor of concatenation and the type of attachment that the tenth two-transistor is mirror image diode；
With the 13rd transistor of the 9th transistor series connection, the 5th transistor the 13rd transistor that is sequentially connected in series of connection and
9th transistor；
The 14th transistor concatenated with the second pull-down transistor, from driving transistor to the second pull-down transistor of concatenation
Bias current is provided with the 14th transistor；
Tenth transistor of concatenation and the grid end of the 6th transistor are connected respectively to the current output terminal of second transistor, point
Bias voltage is not provided to the grid end of the 11st transistor, the tenth two-transistor, the 13rd transistor and the 14th transistor.
Alternatively, it is also associated with concatenating between common port and voltage output end of the driving transistor with the 14th transistor
First resistor and the second electric capacity.
Alternatively, the 3rd electric capacity connected between the grid end of voltage output end and the 9th transistor.
Alternatively, the second mu balanced circuit includes：
Differential amplifier circuit, the grid end of its first input transistors connect reference voltage, and the grid end of the second input transistors connects
Feedback voltage, the loads of the first input transistors and the second input transistors are current mirror load, and the first input transistors one
The load at end is the type of attachment of mirror image diode；
Feedback branch, including the second power transistor, it is anti-for being provided to the second input transistors of differential amplifier circuit
Feedthrough voltage；
Branch road, including the 3rd power transistor are exported, for exporting second voltage；
Wherein, the common port that the second input transistors of differential amplifier circuit load with it connects the 4th electric capacity, second respectively
The grid end of power transistor, the 3rd power transistor.
Alternatively, in addition to the output end of the second mu balanced circuit the switch module and control unit being connected, the second voltage stabilizing
Circuit is constantly in working condition；
Switch module, the output of the output voltage for controlling the second mu balanced circuit；
Control unit, for receive load into low power mode of operation instruction after, first by the dynamic work(of load
Consumption is closed, and is then closed the first mu balanced circuit, last controlling switch module is in the conduction state, to cause second
Mu balanced circuit provides supply voltage to load；After instruction of the load in normal mode of operation is received, first by the dynamic of load
State power consumption is opened, then that the first mu balanced circuit is in running order, and controlling switch module finally is in into open-circuit condition, so that
Obtain the first mu balanced circuit and provide supply voltage to load.
Power-supply circuit provided in an embodiment of the present invention and its control method, when load is in normal mode of operation,
Supply voltage is provided by the first bigger mu balanced circuit of load current, when load is in low-power consumption mode, by smaller load electricity
Second mu balanced circuit of stream provides supply voltage, so, provides power supply by different mu balanced circuits under different power consumption pattern, really
Loaded work piece is protected under the preferably power consumption mode, and then reduces power consumption, meanwhile, sub-module is designed to be considered with power consumption, can
To improve design efficiency.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme in the embodiment of the present application, make required in being described below to embodiment
Accompanying drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present application, for
For those of ordinary skill in the art, without having to pay creative labor, it can also be obtained according to these accompanying drawings
His accompanying drawing.
Fig. 1 is the structural representation according to the power-supply circuit of the embodiment of the present invention；
Fig. 2 is the electrical block diagram of the first mu balanced circuit in the power-supply circuit according to the embodiment of the present invention；
First voltage regulator circuit when Fig. 3 is under condition of different temperatures, different process corner condition, different supply voltages
The output voltage waveforms schematic diagram of voltage output end；
Fig. 4 be under condition of different temperatures, different process corner condition, different supply voltages when, load current change when
The output voltage waveforms schematic diagram of the voltage output end of first voltage regulator circuit；
Fig. 5 is the electrical block diagram of the second mu balanced circuit in the power-supply circuit according to the embodiment of the present invention；
Second voltage regulator circuit when Fig. 6 is under condition of different temperatures, different process corner condition, different supply voltages
The output voltage waveforms schematic diagram of voltage output end；
Fig. 7 is the electrical block diagram according to the switch module of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present application, the technical scheme in the embodiment of the present application is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only some embodiments of the present application, rather than whole embodiments.It is based on
Embodiment in the application, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of the application protection.
In the present invention, there is provided a kind of control method of power-supply circuit, power-supply circuit include the first voltage stabilizing
Circuit and the second mu balanced circuit, the load current of the first mu balanced circuit are more than the load current of the second mu balanced circuit, methods described
Including：When load is in normal mode of operation, supply voltage is provided for load by the first mu balanced circuit；Low work(is in load
During work consuming operation mode, supply voltage is provided for load by the second mu balanced circuit.
In the method, load is typically to be integrated with the chip of circuit module, for example, be integrated with CPU module, encrypting module,
The modules such as peripheral module, memory management module, internal memory operation module, power-supply circuit are mainly that these modules provide electricity
Source, in normal mode of operation, circuit module enables to each circuit module to be in all in normal operating conditions, the power supply of chip
The working condition of dynamic power consumption, it is necessary to load current it is larger；And in low power mode of operation, circuit module is in static work(
The resting state of consumption, the power supply of chip primarily serve the effect of each logic state kept in chip, it is necessary to load current it is small.
Based on this, in embodiments of the present invention, load be in normal mode of operation when, by load current it is bigger first
Mu balanced circuit provides supply voltage, when load is in low-power consumption mode, is provided by the second mu balanced circuit of smaller load current
Supply voltage, so, power supply is provided by different mu balanced circuits under different power consumption pattern, it is ensured that loaded work piece is in preferably work(
Under consumption pattern, and then power consumption is reduced, meanwhile, sub-module is designed to be considered with power consumption, can improve design efficiency.
In the particular embodiment, the second mu balanced circuit can be constantly in working condition, i.e. output supply voltage, pass through
Switch module realizes the switching of two kinds of mode of operations, and switch module for example can be transistor device, the switch module and
The output end connection of two mu balanced circuits, the output of the output voltage for controlling the second mu balanced circuit, switch module for example can be with
For transistor switch, the voltage output end of defeated second mu balanced circuit is connected to source and drain one end of transistor switch, so, specifically
Control method in, including：After instruction of the load into low power mode of operation is received, first the dynamic power consumption of load is closed
Close, be then closed the first mu balanced circuit, last controlling switch module is in the conduction state, to cause the second voltage stabilizing
Circuit provides supply voltage to load；After instruction of the load in normal mode of operation is received, first by the dynamic work(of load
Consumption is opened, then that the first mu balanced circuit is in running order, and controlling switch module finally is in into open-circuit condition, to cause the
One mu balanced circuit provides supply voltage to load.In specific application, the dynamic of load can be controlled by clock signal
The open and close of power consumption, and then realize by control signal the work shape of controlling switch module and the first voltage regulator circuit
State, so, the switching of two-way supply voltage is realized, circuit structure is simple and is easily achieved.
The control method of the power-supply circuit of the present invention is described in detail above, in addition, the present invention also carries
The power-supply circuit supplied in the above method, with reference to shown in figure 1, including：First mu balanced circuit, for being in normal in load
During mode of operation supply voltage is provided for load；
Second mu balanced circuit, for providing supply voltage when load is in low power mode of operation for load, first is steady
The load current of volt circuit is more than the load current of the second mu balanced circuit.
In the particular embodiment, different structure can be selected according to different loads in the demand of different working modes
First mu balanced circuit and the second mu balanced circuit provide power supply.
In an embodiment of the present invention, in normal mode of operation, modules are all in normal operating conditions, the electricity of chip
Source enable to each circuit module be in dynamic power consumption working condition, it is necessary to load current it is larger, and to the stabilization of power supply
Property and the performance of transient response speed have high requirement；And in low power mode of operation, many circuit modules are in static work(
The resting state of consumption, the power supply of chip primarily serve the effect of each logic state kept in chip, it is necessary to load current it is small,
The performance requirement of stability and transient response speed to power supply is low.
High consideration is required based on above load current greatly, to power supply stability and transient response speed, it is currently preferred
Be the first voltage regulator circuit with reference to shown in figure 2 in embodiment, including tie point 100, the second branch road 110, constant-current source 120 with
And the first electric capacity C2；Wherein,
Tie point 100 includes the power transistor Mp, reference voltage transistor Mp7, enabled crystal being sequentially connected in series
Pipe Mn12 and the first pull-down transistor Mn11, power transistor Mp one end connection supply voltage Avdd of tie point 100, first
Pull-down transistor Mn11 one end is grounded Agnd, reference voltage transistor Mp7 grid end connection reference voltage Vref, enables transistor
Mn12 grid end connection enable signal pdb；
Second branch road 110 includes the driving transistor Mp6 that is sequentially connected in series and the second pull-down transistor Mn10, second
Driving transistor Mp6 one end connection supply voltage Avdd, second pull-down transistor one end ground connection Agnd on road 110；
Constant-current source 120 provides partially for driving transistor Mp6 and the first pull-down transistor Mn11, the second pull-down transistor Mn10
Electric current is put, driving transistor Mp6 current output terminal is connected to power transistor Mp grid end；
Power transistor Mp and reference voltage transistor Mp7 common port is voltage output end E.
In the present invention, the voltage of voltage output end is related to the gate source voltage of reference voltage transistor, and passes through constant current
Source control keeps constant by the electric current of reference voltage transistor, so as to realize the steady of the gate source voltage of reference voltage transistor
It is fixed.In addition, in output end, output voltage values are determined using reference voltage and source class follower, reaching reduces output impedance
Purpose, without increasing extra circuit, reduce the complexity of whole circuit design.
In the concrete application of the embodiment, as shown in Fig. 2 power transistor Mp, reference voltage transistor Mp7 are
PMOS transistor, reference voltage transistor Mp7, enabled transistor Mn12, the first pull-down transistor Mn11 and second time crystal pulling
Pipe Mn10 is nmos pass transistor.
For tie point, power transistor Mp source connection supply voltage Avdd, drain terminal connection reference voltage crystal
Pipe Mp7 source, reference voltage transistor Mp7 source is voltage output end E, the voltage Vout1 of output voltage stabilizer circuit, is joined
The source for examining voltage transistor Mp7 is connected to enabled transistor M12 drain terminal, and enabled transistor Mn12 source is connected to first
Pull-down transistor Mn11 drain terminal, the first pull-down transistor Mn11 source ground connection.For the second branch road, driving transistor Mp6
Source connection supply voltage Avdd, drain terminal connect the second pull-down transistor Mn10 drain terminal, the second pull-down transistor Mn10's
Source is grounded.
Wherein, reference voltage transistor Mp7 grid end connection reference voltage Vref, enables transistor Mn12 grid end connection
Enable signal pdb, driving transistor Mp6 drain terminal driving power transistor Mp grid end, driving transistor Mp6 are carried by constant-current source
For bias current, the first pull-down transistor Mn11 and the second pull-down transistor Mn10 also provide bias current, constant current by constant-current source
The current value for the bias current that source provides is substantially fixed.Enable signal pdb can be the signal from control module, need
When wanting voltage regulator circuit output so that enable signal pdb is effective, and its general value can be Avdd so that enabled transistor Mn12
In the conduction state, reference voltage Vref is held essentially constant, and is typically produced by band-gap reference module.
So, when enable signal pdb is effective, due under driving transistor Mp6, the first pull-down transistor Mn11 and second
Pull transistor Mn10 turn on current value is fixed, and the first pull-down transistor Mn11, the second pull-down transistor Mn10 electric conduction
Flow valuve is equal with driving transistor Mp6, reference voltage transistor Mp7 turn on current value, therefore flows through reference voltage transistor
Mp7 current value is also substantially stationary constant, so as to ensure that reference voltage transistor Mp7 gate source voltage Vgs keeps solid
It is fixed constant, and voltage output end E output voltage Vout1 is equal to reference voltage Vref and Vgs sums, ensure that voltage output end
Output voltage Vout1 stability.
First electric capacity C2 serves compensating action to the phase margin of loop, improves the stability of loop, while can also carry
The transient response speed of high circuit.
In the present embodiment, it using suitable constant-current source can be respectively driving transistor and the first pull-down transistor,
Two pull-down transistors provide bias current.In more excellent embodiment, constant-current source provides for the circuit mirror current of multistage, refers to
Shown in Fig. 2, constant-current source includes：
For the first transistor Mp1 of the type of attachment of mirror image diode, the first transistor Mp1 connection input current Ibp, and
Respectively third transistor Mp3 and the 4th transistor Mp4 provides the bias current of mirror image；
The 7th transistor Mn4 being connected with third transistor Mp3, is provided from third transistor Mp3 to the 7th transistor Mn4
Bias current；
The 8th transistor Mn6 being connected with the 4th transistor Mp4, provided from the 4th transistor Mp4 to the 8th transistor inclined
Put electric current Mn6；
For the 5th transistor Mp5 of the type of attachment of mirror image diode, the transistor Mn8 of the 5th transistor Mp5 connections the 9th,
9th transistor Mn8 provides bias current by the 7th transistor Mn4 of the type of attachment for mirror image diode, by the 5th transistor
Mp5 provides the bias current of mirror image to driving transistor Mp6；
8th transistor Mn6 is the type of attachment of mirror image diode, is the first pull-down transistor Mn10 and second time crystal pulling
Body pipe Mn11 provides the bias current of mirror image.
In an embodiment of the present invention, as shown in Fig. 2 more preferably, constant-current source also includes：
The second transistor Mp2 of the bias current of mirror image is provided by the first transistor Mp1；
The tenth transistor Mn1 and the 6th transistor Mn2 of concatenation, from second transistor Mp2 to the tenth transistor of concatenation
Mn1 and the 6th transistor Mn2 provides bias current；
The 11st transistor Mn3 concatenated with the 7th transistor Mn4, from third transistor Mp3 to the 7th crystal of concatenation
Pipe Mn4 and the 11st transistor Mn3 provides bias current, and the 7th transistor Mn4 of concatenation and the 11st transistor Mn3 are mirror image
The type of attachment of diode；
The tenth two-transistor Mn5 concatenated with the 8th transistor Mn6, from the 4th transistor Mp4 to the 8th crystal of concatenation
Pipe Mn6 and the tenth two-transistor Mn5 provides bias current, and the 8th transistor Mn6 of concatenation and the tenth two-transistor Mn5 are mirror image
The type of attachment of diode；
The 13rd transistor Mn7 concatenated with the 9th transistor Mn8, the 5th transistor Mp5 connections be sequentially connected in series the tenth
Three transistor Mn7 and the 9th transistor Mn8；
The 14th transistor Mn9 concatenated with the second pull-down transistor Mn10, from driving transistor Mp6 to the second of concatenation
Pull-down transistor Mn10 and the 14th transistor Mn9 provides bias current；
The tenth transistor Mn1 and the 6th transistor Mn2 of concatenation are respectively to the 11st transistor Mn3, the tenth two-transistor
Mn5, the 13rd transistor Mn7 and the 14th transistor Mn9 grid end provide bias voltage.
In this preferred embodiment, the first transistor Mp1, second transistor Mp2, third transistor Mp3, the 4th crystal
Pipe Mp4 and the 5th transistor Mp5 is PMOS transistor, the 6th transistor Mn2, the 7th transistor Mn4, the 8th transistor Mn6,
Nine transistor Mn8, the tenth transistor Mn1, the 11st transistor Mn3, the tenth two-transistor Mn5, the 13rd transistor Mn7 and
14 transistor Mn9 are nmos pass transistor.
The first transistor Mp1 is the type of attachment of mirror image diode, will when the first transistor Mp1 is PMOS transistor
The first transistor Mp1 grid end is connected to drain terminal, and drain terminal connection input current, source connection supply voltage, first crystal
Pipe Mp1 grid end is connected respectively to second transistor Mp2, third transistor Mp3, the 4th transistor Mp4 grid end, the second crystal
Pipe Mp2, third transistor Mp3, the 4th transistor Mp4 source connection supply voltage, so, the first transistor Mp1 respectively with
Second transistor Mp2, third transistor Mp3, the circuit that the 4th transistor Mp4 is mirror current source connect, by the first transistor
Mp1 provides the bias current of mirror image to second transistor Mp2, third transistor Mp3, the 4th transistor Mp4 respectively, so as to second
Transistor Mp2, third transistor Mp3, the 4th transistor Mp4 export of substantially equal electric current respectively.And second transistor Mp2
The tenth transistor Mn1 and the 6th transistor Mn2 of drain terminal connection concatenation, in the present embodiment, the tenth transistor Mn1 of concatenation and the
Six transistor Mn2 are nmos pass transistor pair, and the tenth transistor Mn1 source connects the 6th transistor Mn2 drain terminal, the 6th crystal
Pipe Mn2 source ground connection, so, in the tenth transistor Mn1 and the 6th transistor Mn2 that second transistor Mp2 connections concatenate
In branch road, the electric current of second transistor Mp2 outputs provides biased electrical to the tenth transistor Mn1 of concatenation and the 6th transistor Mn2
Stream；With the tenth transistor Mn1 and the 6th transistor Mn2 of second transistor Mp2 connections concatenation branch road, third transistor Mp3
Connect the 11st transistor Mn3 and the 7th transistor Mn4 of concatenation, the tenth two-transistor of the 4th transistor Mp4 connections concatenation
Mn5 and the 8th transistor Mn6.
5th transistor Mp5 is also the type of attachment of mirror image diode, when the 5th transistor Mp5 is PMOS transistor, i.e.,
5th transistor Mp5 grid end is connected to drain terminal, and drain terminal connection input current, source connection supply voltage, the 5th is brilliant
Body pipe Mp5 grid end is connected to driving transistor Mp6 grid end, and the circuit that mirror current source is formed with driving transistor is connected,
The bias current of mirror image is provided for driving transistor Mp6, with the tenth transistor Mn1 and the of second transistor Mp2 connections concatenation
Six transistor Mn2 branch road, the 13rd transistor Mn7 and the 9th transistor of the 5th transistor Mp5 drain terminal connection concatenation
Mn8.The electric current of driving transistor Mp6 outputs is substantially identical with the bias current of branch road where the 5th transistor.With the second crystal
The tenth transistor Mn1 and the 6th transistor Mn2 of pipe Mp2 connections concatenation branch road, driving transistor Mp6 drain terminal connection concatenation
The 14th transistor Mn9 and the first pull-down transistor Mn10.
In addition, the tenth transistor Mn1 and the 6th transistor Mn2 of concatenation grid end are connected respectively to second transistor Mp2
Current output terminal, it is brilliant to the 11st transistor Mn3, the tenth two-transistor Mn5, the 13rd transistor Mn7 and the 14th respectively
Body pipe Mn9 grid end provides bias voltage, and in the present embodiment, second transistor Mp2 current output terminal is drain terminal；The of concatenation
11 transistor Mn3 and the 7th transistor Mn4 are the type of attachment of mirror image diode, and are the 9th brilliant by the 7th transistor Mn4
Body pipe Mn8 provides the bias current of mirror image, in the specific connection of the present embodiment, i.e., connects the 7th transistor Mn4 grid end
To third transistor Mp3 current output terminal, namely the 11st transistor Mn3 drain terminal, so, carried for the 9th transistor Mn8
It is essentially identical for the bias current and electric current that the 4th transistor Mp4 is exported of mirror image；Similarly, the tenth two-transistor of concatenation
Mn5 and the 8th transistor Mn6 is also the type of attachment of mirror image diode, and is the first pull-down transistor by the 8th transistor Mn6
Mn11 and the second pull-down transistor Mn10 provides the bias current of mirror image, is under the first pull-down transistor Mn11 and second so
The bias current of pull transistor Mn10 offer mirror images and the electric current that third transistor Mp3 is exported are essentially identical, and driving transistor
Mp6 bias current and the 5th transistor Mp5 bias current are image current, and input current Ibp is metastable inclined
Put electric current so that driving transistor Mp6, the first pull-down transistor Mn11 and the current value of the second pull-down transistor Mn10 conductings are consolidated
It is fixed, and the first pull-down transistor Mn11 and the second pull-down transistor Mn10 and driving transistor Mp6, reference transistor Mp7 are led
Energization flow valuve is of substantially equal, then, it is also substantially changeless by reference transistor Mp7 current values, so as to ensure that ginseng
The gate source voltage Vgs for examining transistor Mp7 keeps stable, and then ensure the output voltage Vout1 of whole first voltage regulator circuit
Stability.
In this preferred embodiment, transistors of these above-mentioned concatenations help further to improve image current accurate
Property, and then ensure essentially identical to the first pull-down transistor Mn11, the second pull-down transistor Mn10 and driving transistor Mp6 offer
Bias current.
In addition, it is also connected between driving transistor Mp6 and the 14th transistor Mn9 common port and voltage output end E
There are the first resistor R and the second electric capacity C1 of concatenation, and further, in voltage output end E and the 9th transistor Mn8 grid end
Between the 3rd electric capacity C3 that connects.Second electric capacity C1 serves compensating action to the phase margin of loop, improves the stabilization of loop
Property, while can also improve the transient response speed of circuit.
3rd electric capacity C3 is primarily to further improve the transient response speed of the first voltage regulator circuit, its operation principle
For when output loading increases, power transistor Mp grid ends voltage can not be mutated so that output voltage Vout1 is reduced, due to the
Three electric capacity C3 AC coupled effect so that the 9th transistor Mn8 grid end voltage is reduced, and then driving transistor Mp6 is led
Galvanization decreases, simultaneously as output voltage Vout1 is reduced, and reference voltage Vref keeps constant, reference transistor
Mp7 conducting electric current can decrease, and the first pull-down transistor Mn11 and the second pull-down transistor Mn10 electric currents keep constant,
Therefore, reference transistor Mp7 gate source voltage can be reduced due to the imbalance of electric current, and the reduction to output voltage Vout1 rises
To certain compensating action.Same reason, when output loading reduces, alleviation can be played to output voltage Vout1 rising
Effect, thus come improve output voltage due to load change when whole transient response speed.
With reference to shown in figure 3, the emulation ripple of the output voltage of the first mu balanced circuit voltage output end when changing for different parameters
Shape schematic diagram, the parameter of change include different temperatures, different process angle and different electrical power voltage, wherein, temperature is respectively -40
DEG C, 25 DEG C, 85 DEG C, supply voltage is respectively the simulation waveform schematic diagram of the output voltage in the case of 1.8V, 3.3V and 5V, from figure
It can be seen that, between 1.49V to 1.64V, output voltage meets output voltage control in the range of 1.5V ± 10% in showing
The requirement of the excursion of output voltage in design objective.
With reference to shown in figure 4, the simulation waveform schematic diagram of the output voltage changed when changing for different parameters with load current,
The parameter of change includes different temperatures, different process angle and different electrical power voltage, wherein, temperature be respectively -40 DEG C, 25 DEG C, 85
DEG C, supply voltage is respectively 1.8V, 3.3V and 5V, and load current changes in the range of 50uA to 15mA, rising and falling time
For 10ns, load capacitance 100pF.It can see from emulation schematic diagram, under the worst case of load changing, output voltage
Stationary value can also be reached within 2us time, the requirement of design objective and engineer applied can be met.
Based on above load current it is small, low consideration is required to power supply stability and transient response speed, with reference to shown in figure 5,
For the second voltage regulator circuit of the preferred embodiment of the present invention, including：
Differential amplifier circuit 200, its first input transistors MN25 grid end connect reference voltage, the second input transistors
MN26 grid end meets load MP21, MP22 of feedback voltage Vfb, the first input transistors MN25 and the second input transistors MN26
For current mirror load, and the load MP21 of first input transistors MN25 one end is the type of attachment of mirror image diode；
Feedback branch 210, including the second power transistor MNZ1, for the second input transistors of differential amplifier circuit
MN26 provides feedback voltage Vfb；
Branch road 220, including the 3rd power transistor MNZ2 are exported, for exporting second voltage Vout_sty；
Wherein, the second input transistors NM26 of differential amplifier circuit 200 output end connects the 4th electric capacity MN27, respectively
Two power transistor MNZ1, the 3rd power transistor MNZ2 grid end.
In specific application, as shown in figure 5, the tail current of differential amplifier circuit 200 passes through mirror image by input current Ibn
Electric current provides, specifically, differential amplifier circuit 200 afterbody connection concatenation a nmos pass transistor to MN23, MN24, separately
The one another NMOS tube for concatenating and forming the connection of mirror image diode connects input current Ibn, to transistor to MN21, MN22
MN23, MN24 provide the bias current of mirror image, and the bias current of the mirror image is the tail current of differential amplifier circuit 200.Difference is put
The Differential Input of big circuit 200 is to being all nmos pass transistor for the first input transistors MN25 and the second input transistors MN26；
The drain terminal connection supply voltage AVDD of PMOS transistor MP21, MP22, source connect the first input transistors MN25 and the respectively
Two input transistors MN26, and current mirror connection is formed, as the amplifier current mirror load of Differential Input pair, the first input crystal
The load of pipe MN25 one end is PMOS transistor MP21, is the source of the type of attachment, i.e. PMOS transistor MP21 of mirror image diode
End is connected with grid end and its grid end is connected to PMOS transistor MP22 grid end, so, by this branch road of the first input transistors
To second transistor, this branch road provides bias current.
Feedback branch 210 provides grid end voltage for the second input transistors MN26, in specific application, the feedback branch bag
Include the 3rd resistor R21 being sequentially connected from supply voltage AVDD one end, the second power transistor MNZ1, the 4th resistance R22 and
Five resistance R23, the 5th resistance R23 other ends ground connection AVSS, the 4th resistance R22, the 5th resistance R23 form the feedback branch 210
Bleeder circuit, by adjust the 4th resistance R22, the 5th resistance R23 proportionate relationship, can make it that feedback voltage Vfb is final
It is equal with Vref voltages.
Output branch road 220 is used to export second voltage Vout_sty, there is provided the output supply voltage of the second mu balanced circuit, tool
In the application of body, the output branch road 220 includes the 6th resistance R24 and the 3rd power crystal being sequentially connected from supply voltage one end
Pipe MNZ2, the 3rd power transistor MNZ2 source are the output end of the second mu balanced circuit, in the specific application, the 3rd work(
Rate transistor MNZ2 and the second power transistor MNZ1 is native nmos pass transistors as driving tube, its threshold voltage compared with
It is small, close to 0.
Second input transistors NM26 of differential amplifier circuit 200 output end, that is, the inputs of load MP22 and second
Transistor MN26 common port, the 4th electric capacity MN27, the second power transistor MNZ1, the 3rd power transistor MNZ2 are connected respectively
Grid end, the 4th electric capacity NM27 is nmos pass transistor, plays a part of charging, be the second power transistor MNZ1, the 3rd power
Transistor MNZ2 provides grid end voltage.
In order to more fully understand the technical scheme of second mu balanced circuit, in conjunction with the specific embodiment, to its work
Principle is described in detail.In a specific application, input current Ibn and reference voltage Vref are all carried by base modules
For, on supply voltage AVDD after electricity, Ibn and reference voltage Vref all normal works, in firm power-up state, differential amplification electricity
The first input transistors MN25 on road 200 is conducting, and feedback voltage Vfb is 0, and the tail current of differential amplifier circuit 200 is complete
Portion all circulates from the first input transistors MN25, and due to the effect of current mirror load so that the second input transistors of connection with
The capacitance voltage VG of its common port loaded is continuously increased, so as to by the second power transistor MNZ1's of feedback branch 210
Source electrode Following effect, the feedback voltage Vfb in feedback branch 210 are continuously increased, and pass through backfeed loop so that feedback voltage Vfb
It is finally identical with reference voltage Vref, so that whole loop stability is got off, in identical feedback voltage Vfb and reference voltage
During Vref so that the second power transistor MNZ1 source voltage terminal Vout2 is substantially equal to voltage Vout_sty, exports branch road 220
Stable voltage Vout_sty is exported, that is, exports stable second voltage.For the second mu balanced circuit, in low power mode of operation
When supply voltage, the purpose of the supply voltage mainly plays a part of keeping logic state, and the design circuit of the embodiment makes
The 3rd power transistor that second voltage must be exported is in outside backfeed loop, the problem of being not in stability, without extra
Stabiloity compensation design and transient response performance consideration, the complexity of design is low and circuit power consumption is low.
With reference to shown in figure 6, the emulation ripple of the output voltage of the second mu balanced circuit voltage output end when changing for different parameters
Shape schematic diagram, the parameter of change include different temperatures, different process angle and different electrical power voltage, wherein, temperature is respectively -40
DEG C, 25 DEG C, 85 DEG C, supply voltage is respectively the simulation waveform schematic diagram of the output voltage in the case of 1.8V, 3.3V and 5V, from figure
It can be seen that, between 1.37V to 1.6V, output voltage meets output voltage control in the range of 1.5V ± 10% in showing
The requirement of the excursion of output voltage in design objective.
Power-supply circuit for more than, can be by switch module and control unit, further to realize that first is steady
The switching of volt circuit and the second mu balanced circuit out-put supply, specifically, also including：The output end connection of second mu balanced circuit is opened
Close module and control unit, the second mu balanced circuit are constantly in working condition；Switch module, for controlling the second mu balanced circuit
The output of output voltage；Control unit, for receive load into low power mode of operation instruction after, first by load
Dynamic power consumption is closed, and is then closed the first mu balanced circuit, and last controlling switch module is in the conduction state, so that
Obtain the second mu balanced circuit and provide supply voltage to load；, first will be negative after instruction of the load in normal mode of operation is received
The dynamic power consumption of load is opened, then that the first mu balanced circuit is in running order, and controlling switch module finally is in into open circuit shape
State, to cause the first mu balanced circuit to provide supply voltage to load.
In a specific application, with reference to shown in figure 7, the switch module is transistor device, the grid of transistor device
Connection control signal PD is held, source and drain one end of transistor device connects the voltage output end Vout_sty of the second voltage regulator circuit,
The other end is the voltage output end Vout of whole power-supply circuit, so, in low-power consumption mode, enables control signal PD,
To cause transistor device to turn on, so, transistor device work, voltage output end Vout exports the defeated of the second voltage regulator circuit
Go out voltage Vout_sty；In normal mode of operation, control signal PD is invalid so that transistor device is closed, voltage output end
The output voltage Vout1 of Vout the first voltage regulator circuits of connection, so as to export the output voltage of the first voltage regulator circuit.
The power-supply circuit and its control method of the embodiment of the present invention are described above, are particularly suitable for
Application in RFID chip, chip power-consumption is reduced, improve design efficiency.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality
Body or operation make a distinction with another entity or operation, and not necessarily require or imply and deposited between these entities or operation
In any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant are intended to
Nonexcludability includes, so that process, method, article or equipment including a series of elements not only will including those
Element, but also the other element including being not expressly set out, or it is this process, method, article or equipment also to include
Intrinsic key element.In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that
Other identical element also be present in process, method, article or equipment including the key element.
Claims (7)
- A kind of 1. power-supply circuit, it is characterised in that including：First mu balanced circuit, for providing supply voltage when load is in normal mode of operation for load；Second mu balanced circuit, for providing supply voltage, the first voltage stabilizing electricity when load is in low power mode of operation for load The load current on road is more than the load current of the second mu balanced circuit；First mu balanced circuit includes tie point, the second branch road, constant-current source and the first electric capacity；Wherein,Tie point includes power transistor, reference voltage transistor, enabled transistor and the first drop-down being sequentially connected in series Transistor, power transistor one end connection supply voltage of tie point, first pull-down transistor one end ground connection, reference voltage are brilliant The grid end connection reference voltage of body pipe, enable the grid end connection enable signal of transistor；Second branch road includes driving transistor and the second pull-down transistor being sequentially connected in series, the driving transistor of the second branch road One end connection supply voltage, second pull-down transistor one end ground connection；Constant-current source is respectively that driving transistor and the first pull-down transistor, the second pull-down transistor provide bias current, and driving is brilliant The current output terminal of body pipe is connected to the grid end of power transistor；The common port of power transistor and reference voltage transistor is voltage output end, to export first voltage.
- 2. power-supply circuit according to claim 1, it is characterised in that constant-current source includes：For the first transistor of the type of attachment of mirror image diode, the first transistor connection input current, and the respectively the 3rd crystalline substance Body pipe and the 4th transistor provide the bias current of mirror image；The 7th transistor being connected with third transistor, bias current is provided from third transistor to the 7th transistor；The 8th transistor being connected with the 4th transistor, bias current is provided from the 4th transistor to the 8th transistor；For the 5th transistor of the type of attachment of mirror image diode, the 5th transistor connects the 9th transistor, the 9th transistor by The 7th transistor for the type of attachment of mirror image diode provides bias current, and mirror is provided from the 5th transistor to driving transistor The bias current of picture；8th transistor is the type of attachment of mirror image diode, and mirror image is provided for the first pull-down transistor and the second pull-down transistor Bias current.
- 3. power-supply circuit according to claim 2, it is characterised in that constant-current source also includes：The second transistor of the bias current of mirror image is provided by the first transistor；The tenth transistor and the 6th transistor of concatenation, are carried from second transistor to the tenth transistor of concatenation and the 6th transistor For bias current；With the 11st transistor of the 7th transistor series connection, from third transistor to the 7th transistor of concatenation and the 11st crystal Pipe provides bias current, the 7th transistor of concatenation and the type of attachment that the 11st transistor is mirror image diode；With the tenth two-transistor of the 8th transistor series connection, from the 4th transistor to the 8th transistor of concatenation and the 12nd crystal Pipe provides bias current, the 8th transistor of concatenation and the type of attachment that the tenth two-transistor is mirror image diode；The 13rd transistor and the 9th being sequentially connected in series with the 13rd transistor of the 9th transistor series connection, the connection of the 5th transistor Transistor；The 14th transistor concatenated with the second pull-down transistor, from driving transistor to the second pull-down transistor of concatenation and 14 transistors provide bias current；Tenth transistor of concatenation and the grid end of the 6th transistor are connected respectively to the current output terminal of second transistor, respectively to 11st transistor, the tenth two-transistor, the grid end of the 13rd transistor and the 14th transistor provide bias voltage.
- 4. power-supply circuit according to claim 1, it is characterised in that in driving transistor and the 14th transistor First resistor and the second electric capacity concatenated is also associated between common port and voltage output end.
- 5. power-supply circuit according to claim 1, it is characterised in that in voltage output end and the grid of the 9th transistor The 3rd electric capacity connected between end.
- 6. power-supply circuit according to claim 1, it is characterised in that the second mu balanced circuit includes：Differential amplifier circuit, the grid end of its first input transistors connect reference voltage, the reversed feedback of grid end of the second input transistors Voltage, the loads of the first input transistors and the second input transistors are current mirror load, and first input transistors one end Load as the type of attachment of mirror image diode；Feedback branch, including the second power transistor, for providing feedback electricity to the second input transistors of differential amplifier circuit Pressure；Branch road, including the 3rd power transistor are exported, for exporting second voltage；Wherein, it is brilliant to connect the 4th electric capacity, the second power transistor, the 3rd power respectively for the second input transistors of differential amplifier circuit The grid end of body pipe.
- 7. according to the power-supply circuit any one of claim 1-6, it is characterised in that also include and the second voltage stabilizing electricity The switch module and control unit, the second mu balanced circuit of the output end connection on road are constantly in working condition；Switch module, the output of the output voltage for controlling the second mu balanced circuit；Control unit, for after instruction of the load into low power mode of operation is received, first closing the dynamic power consumption of load Close, be then closed the first mu balanced circuit, last controlling switch module is in the conduction state, to cause the second voltage stabilizing Circuit provides supply voltage to load；After instruction of the load in normal mode of operation is received, first by the dynamic work(of load Consumption is opened, then that the first mu balanced circuit is in running order, and controlling switch module finally is in into open-circuit condition, to cause the One mu balanced circuit provides supply voltage to load.
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| CN110618742B (en) * | 2019-08-20 | 2022-02-18 | 苏州浪潮智能科技有限公司 | PDB board and working method thereof |
| CN112018863B (en) * | 2020-08-31 | 2023-02-14 | 广州极飞科技股份有限公司 | Power supply adjusting circuit and power supply device |
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| CN103872885A (en) * | 2014-03-18 | 2014-06-18 | 深圳市华星光电技术有限公司 | Standby power consumption control circuit and method |
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| CN105549673A (en) * | 2015-12-25 | 2016-05-04 | 上海华虹宏力半导体制造有限公司 | Dual-mode switching type LDO circuit |
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| US9348383B2 (en) * | 2013-03-01 | 2016-05-24 | Intel Corporation | Apparatus for starting up switching voltage regulator |
| US20140266123A1 (en) * | 2013-03-13 | 2014-09-18 | Qualcomm Incorporated | Truncated ramp waveforms in switching regulators |
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| CN102570793A (en) * | 2011-12-07 | 2012-07-11 | 西安启芯微电子有限公司 | Working size switching circuit for power transistors in DC-DC converter |
| CN103872885A (en) * | 2014-03-18 | 2014-06-18 | 深圳市华星光电技术有限公司 | Standby power consumption control circuit and method |
| CN204129650U (en) * | 2014-08-11 | 2015-01-28 | 浪潮电子信息产业股份有限公司 | A kind of Power conversion board source with power consumption monitoring function |
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