CN207651512U - A kind of compound substrate and semiconductor device structure - Google Patents
A kind of compound substrate and semiconductor device structure Download PDFInfo
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- CN207651512U CN207651512U CN201721686215.9U CN201721686215U CN207651512U CN 207651512 U CN207651512 U CN 207651512U CN 201721686215 U CN201721686215 U CN 201721686215U CN 207651512 U CN207651512 U CN 207651512U
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Abstract
A kind of compound substrate of the utility model offer and semiconductor device structure, the compound substrate include：Growth substrates；Epitaxial buffer layer is located at the growth substrates upper surface；Bulge-structure is distributed in the epitaxial buffer layer upper surface in periodic intervals；The bulge-structure is semiconductor medium film layer；Patterned protective layer, between the bulge-structure and the epitaxial buffer layer, and positioned at the underface of the bulge-structure.The protective layer of the utility model plays the role of protecting epitaxial buffer layer; so that epitaxial buffer layer will not be polluted by etching gas in dry etch process or polymer; so that in epitaxial buffer layer surface, epitaxial growth epitaxial layer is more prone to again; growth technique window bigger, can technology volume production.
Description
Technical field
The utility model is related to technical field of semiconductors, more particularly to a kind of compound substrate and semiconductor device structure.
Background technology
Semiconductor lighting has many advantages, such as long lifespan, energy-saving and environmental protection, safe, application as new and effective solid light source
Field is expanding rapidly.Especially in recent years, with the input of the increasing of R＆D intensity and fund, LED luminous efficiencies and quality
It is remarkably enhanced, LED is even more to obtain deep application.
LED industry passes through years of researches and development, unanimously thinks that growth substrates technology is the core of GaN base material and device
The heart.The substrate technology route of mainstream is sapphire technology path, Si substrate technologies route, SiC substrate technology path, GaN at present
Homo-substrate technology and the compound substrate technology path of newest breakthrough, in several technologies with sapphire technology path the most at
It is ripe, and respectively have quality with some there is also technological difficulties in several technology paths, purpose is provided to improve LED luminous efficiencies
And quality.
Newest graph substrate has following several：1, SiO is made in sapphire substrate surface or other typical substrate surfaces2
The microcosmos pattern of film layer structure；2, the microcosmic of DBR film layer structures is made in sapphire substrate surface or other typical substrate surfaces
Figure；3, epitaxial buffer layer is deposited on growth substrates first, makes SiO on the buffer layer later2、Si3N4Or DBR film layers
The microcosmos pattern of structure.1, the problem of 2 two methods have a common problem, that is, subsequently epitaxial growing is difficult, if low
If temperature growth, SiO2Film layer or DBR film surfaces meeting deposit polycrystalline, epitaxial crystal is of poor quality, blue if high growth temperature
Jewel substrate surface does not deposit GaN or polycrystalline, leads to epitaxial growth technology condition and its harshness in this way, cannot volume production.3rd kind
Method also some difficulty：It is SiO first2The making of film layer structure microcosmos pattern, if with wet etching SiO2Figure, figure
Size can be restricted, and can only do big, cannot be done small, otherwise can not be produced in batches；Let alone accomplish nanoscale；If with dry
Method etches SiO2The surface of figure, buffer layer can be polluted by etching gas, cause subsequently epitaxial growing difficult, or even deposition
Not, condition is harsh, and epitaxial layer crystal quality also improves less, followed by simple SiO2Reflecting effect of the film layer structure to light
It is limited, it is limited to luminance raising.Since there are problems cannot achieve volume production in above-mentioned each scheme.
Requirement for the application of LED highers, substrate technology are also needed to be promoted and be excavated.Therefore, substrate technology is constantly excavated
It effectively improves GaN base epitaxial layer and LED epitaxial structure crystal quality, improves LED property indices and be necessary.
Utility model content
In view of the foregoing deficiencies of prior art, it leads the purpose of this utility model is to provide a kind of compound substrate and partly
Body device architecture, it is not high for solving crystal quality existing for GaN base epitaxial layer in the prior art and LED epitaxial structure, respectively
The problem to be improved to performance indicator.
In order to achieve the above objects and other related objects, the utility model provides a kind of preparation method of compound substrate, institute
The preparation method for stating compound substrate includes the following steps：
1) growth substrates are provided；
2) epitaxial buffer layer is formed in the growth substrates upper surface；
3) protective layer is formed in the epitaxial buffer layer upper surface；
4) semiconductor medium film layer is formed in the protective layer upper surface；
5) use photoetching and dry etch process by the semiconductor medium membrane graphic, in the protective layer upper table
Face forms the bulge-structure of periodic intervals distribution；Between the bulge-structure, the part protective layer is exposed；
6) use wet-etching technology that the protective layer is graphical, with the protective layer of removal exposure.
A kind of preferred embodiment of the preparation method of compound substrate as the utility model, the protective layer include metal layer
Or/and metal oxide layer.
A kind of preferred embodiment of the preparation method of compound substrate as the utility model, the material of the metal layer include
Nickel or titanium；The material of the metal oxide layer includes titanium oxide or indium tin oxide.
A kind of preferred embodiment of the preparation method of compound substrate as the utility model, the semiconductor medium film layer packet
Include at least one layer of semiconductor medium layer.
A kind of preferred embodiment of the preparation method of compound substrate as the utility model, the semiconductor medium film layer packet
Include SiO2Layer, Si3N4Layer, SiONxAt least one of layer or DBR layer.
A kind of preferred embodiment of the preparation method of compound substrate as the utility model, the shape of the bulge-structure are
Cylinder, square column type, cone, bullet-headed or bar shaped.
The utility model also provides a kind of compound substrate, and the compound substrate includes：
Growth substrates；
Epitaxial buffer layer is located at the growth substrates upper surface；
Bulge-structure is distributed in the epitaxial buffer layer upper surface in periodic intervals；The bulge-structure is semiconductor
Media coating；
Patterned protective layer between the bulge-structure and the epitaxial buffer layer, and is located at the bulge-structure
Underface.
A kind of preferred embodiment of compound substrate as the utility model, the bulge-structure include at least one layer of semiconductor
Dielectric layer.
A kind of preferred embodiment of the preparation method of compound substrate as the utility model, the semiconductor medium film layer packet
Include SiO2Layer, Si3N4Layer, SiONxAt least one of layer or DBR layer.
The shape of a kind of preferred embodiment of compound substrate as the utility model, the bulge-structure is cylindrical, side
Cylindricality, cone, bullet-headed or bar shaped.
A kind of preferred embodiment of compound substrate as the utility model, the patterned protective layer include metal layer or/
And metal oxide layer.
The material of a kind of preferred embodiment of compound substrate as the utility model, the metal layer includes nickel or titanium；Institute
The material for stating metal oxide layer includes titanium oxide or indium tin oxide.
A kind of preferred embodiment of compound substrate as the utility model, the thickness of the patterned protective layer is 10 angstroms~
500 angstroms.
The utility model also provides a kind of preparation method of semiconductor device structure, the preparation of the semiconductor device structure
Method includes the following steps：
1) compound substrate is prepared using the preparation method as described in above-mentioned either a program；
2) extension transition zone is formed on the compound substrate surface, the extension transition zone fills up between the bulge-structure
Gap, and the bulge-structure is completely covered；
3) N-type epitaxy layer is formed in the extension transition layer surface；
4) quantum well layer is formed on the N-type epitaxy layer surface；
5) p-type epitaxial layer is formed on the quantum well layer surface.
A kind of preferred embodiment of the preparation method of semiconductor device structure as the utility model, after step 5), also
It is included in the N-type epitaxy layer surface and forms N electrode, and the step of the p-type epi-layer surface forms P electrode.
A kind of preferred embodiment of the preparation method of semiconductor device structure as the utility model, after step 5), also
It is included in the p-type epi-layer surface and forms P electrode, and is formed on surface of the growth substrates far from the epitaxial buffer layer
The step of N electrode.
The utility model also provides a kind of semiconductor device structure, and the semiconductor device structure includes：
Compound substrate as described in above-mentioned either a program；
Simultaneously the bulge-structure is completely covered in extension transition zone, the gap filled up between the bulge-structure；
N-type epitaxy layer is located at the extension transition layer surface；
Quantum well layer is located at the N-type epitaxy layer surface；
P-type epitaxial layer, with the quantum well layer surface.
A kind of preferred embodiment of semiconductor device structure as the utility model, the semiconductor device structure also wrap
It includes：
N electrode is located at the N-type epitaxy layer surface；
P electrode is located at the p-type epi-layer surface.
A kind of preferred embodiment of semiconductor device structure as the utility model, the semiconductor device structure also wrap
It includes：
P electrode is located at the p-type epi-layer surface；
N electrode is located at surface of the growth substrates far from the epitaxial buffer layer.
As described above, the compound substrate and semiconductor device structure of the utility model, have the advantages that：
The preparation method of the compound substrate of the utility model forms protective layer by elder generation in epitaxial buffer layer surface, then again
Semiconductor medium film layer is formed in protective layer, raised knot is being formed using dry etch process etching semiconductor media coating
During structure, protective layer plays the role of protecting epitaxial buffer layer so that epitaxial buffer layer will not be by dry etching work
The pollution of etching gas or polymer in skill so that epitaxial growth epitaxial layer is more prone to again in epitaxial buffer layer surface, raw
Long process window bigger, can technology volume production；Meanwhile protective layer also acts as and connect epitaxial buffer layer with semiconductor medium film layer
Effect so that the compound substrate for semiconductor device structure prepare when, can be resisted in epitaxial growth temperature-rise period
The firmly variation of stress；Since protective layer design thickness is very thin, when wet etching, is not easy undercutting, so as to control figure well
The precision of shape.
In the convex of cyclic array distribution including at least one layer of semiconductor medium layer in the compound substrate of the utility model
Playing structure can make the crystal quality of the epitaxial layer lateral growth formed on compound substrate surface more preferable；Simultaneously as described
Bulge-structure is semiconductor medium film layer, each layer and subsequently partly leading in compound substrate surface formation in the bulge-structure
GaN layer in body device has larger reflection differences, and the reflecting effect of the bulge-structure is more preferable, can improve subsequently in institute
State the light emission rate of the semiconductor devices of compound substrate surface formation.
The innovative design of the compound substrate preparation process of entire the utility model so that the compound substrate of the utility model is not
Technical performance advantage can be only played, and volume production popularization in large quantity can be carried out.
Description of the drawings
Fig. 1 is shown as the flow chart of the preparation method of the compound substrate provided in the utility model embodiment one.
Fig. 2 to Figure 11 is shown as the knot of each step of preparation method of the compound substrate provided in the utility model embodiment one
Structure schematic diagram, wherein Fig. 9 to Figure 11 is shown as the structural schematic diagram of compound substrate provided by the utility model, wherein Fig. 9 is
Vertical view, Figure 10 and Figure 11 are sectional view.
Figure 12 is shown as the flow chart of the semiconductor device structure preparation method provided in the utility model embodiment three.
The semiconductor device structure preparation method that Figure 13 to Figure 18 is shown as providing in the utility model embodiment three respectively walks
Rapid structural schematic diagram, wherein Figure 17 and Figure 18 is shown as the cross section structure of semiconductor device structure provided by the utility model
Schematic diagram.
Component label instructions
10 growth substrates
11 epitaxial buffer layers
12 protective layers
121 patterned protective layers
13 semiconductor medium film layers
131 SiO2Layer
132 Si3N4Layer
133 bulge-structures
14 extension transition zones
15 N-type epitaxy layers
16 quantum well layers
17 p-type epitaxial layers
18 N electrodes
19 P electrodes
Specific implementation mode
Illustrate that the embodiment of the utility model, those skilled in the art can be by this theorys below by way of specific specific example
Content disclosed by bright book understands other advantages and effect of the utility model easily.The utility model can also be by addition
Different specific implementation modes are embodied or practiced, and the various details in this specification can also be based on different viewpoints and answer
With carrying out various modifications or alterations under the spirit without departing from the utility model.
Please refer to Fig.1~Figure 18.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of utility model, though when only display is with related component in the utility model rather than according to actual implementation in diagram
Component count, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can be a kind of random change
Become, and its assembly layout kenel may also be increasingly complex.
Embodiment one
Referring to Fig. 1, the utility model provides a kind of preparation method of compound substrate, the preparation method of the compound substrate
Include the following steps：
1) growth substrates are provided；
2) epitaxial buffer layer is formed in the growth substrates upper surface；
3) protective layer is formed in the epitaxial buffer layer upper surface；
4) semiconductor medium film layer is formed in the protective layer upper surface；
5) use photoetching and dry etch process by the semiconductor medium membrane graphic, in the protective layer upper table
Face forms the bulge-structure of periodic intervals distribution；Between the bulge-structure, the part protective layer is exposed；
6) use wet-etching technology that the protective layer is graphical, with the protective layer of removal exposure.
In step 1), the S1 steps in please referring to Fig.1 and Fig. 2 provide growth substrates 10.
As an example, the growth substrates 10 can select according to actual needs, it is preferable that the growth substrates 10 can be with
Al2O3Substrate, SiC substrate, Si substrates, ZnO substrates or GaN substrate.
In step 2), the S2 steps in please referring to Fig.1 and Fig. 3 form epitaxial buffer on 10 surface of the growth substrates
Layer 11.
As an example, the epitaxial buffer layer 11 can be nitride buffer layer, it is preferable that described outer in the present embodiment
It can be Al to prolong buffer layer 11xGa1-xN layers, wherein 0≤x≤0.5；It may be BN layers；Can also be AlN layers, AlN layers
Crystal orientation is (0001) crystal orientation.
As an example, may be used MOCVD (Metalorganic chemical vapor deposition), HVPE (hydride gas-phase epitaxy) or
PVD (physical vapour deposition (PVD)) techniques form the epitaxial buffer layer 11 on 10 surface of the growth substrates.
As an example, the thickness of the epitaxial buffer layer 11 can be set according to actual needs, it is preferable that this implementation
In example, the thickness of the epitaxial buffer layer 11 is 50 angstroms~600 angstroms.
In step 3), the S3 steps in please referring to Fig.1 and Fig. 4 are formed in 11 upper surface of the epitaxial buffer layer and are protected
Layer 12.
As an example, the techniques such as vapor deposition may be used forms the protective layer 12 in 11 upper surface of the epitaxial buffer layer；
The protective layer 12 may include metal layer or/and metal oxide layer, i.e., the protective layer 12 can be one layer of metal layer,
Can be the metal layer of at least two layers different materials, or one layer of metal oxide layer, or at least two layers different
The metal oxide layer of material can also be the lamination knot of at least one layer of metal layer and at least one layer of metal oxide layer composition
Structure.Specifically, the material of the metal layer includes nickel (Ni) or titanium (Ti)；The material of the metal oxide layer includes titanium oxide
(TiOx) or indium tin oxide (ITO).In one example, the protective layer 12 includes one layer of titanium oxide layer and one layer of indium tin oxidation
Nitride layer.
As an example, the thickness of the protective layer 12 can be set according to actual needs, it is preferable that the present embodiment
In, the thickness of the protective layer 12 can be 10 angstroms~500 angstroms.If the thickness of the protective layer 12 is too small, for example it is less than 10
Angstrom, the protective effect played will be very limited, if the thickness of the protective layer 12 is too many, is for example more than 500 angstroms, and be easy
Undercutting is caused, to influence the performance of device.The thickness of the protective layer 12 is set as 10 angstroms~500 in the utility model
Angstrom, you can to ensure protective effect that the protective layer 12 is played, and it is not easy undercutting when subsequent wet corrodes, so as to
The precision of enough control patterns well.
In step 4), the S4 steps in please referring to Fig.1 and Fig. 5 form semiconductor in 12 upper surface of the protective layer and are situated between
Plasma membrane layer 13.
As an example, using techniques such as plasma reinforced chemical vapour deposition (PECVD), PVD or electron beam evaporations in institute
At least one layer of semiconductor medium layer of 12 upper surface of protective layer deposition is stated as the semiconductor medium film layer 13, when the semiconductor
When media coating 13 includes at least two layers semiconductor medium layer, it can be sequentially depositing or at least two layers half of alternating deposit successively
For conductive medium layer to form the semiconductor medium film layer 13, the material of the described and adjacent semiconductor medium layer is different, and
The reflectivity of the semiconductor medium layer differs larger with the reflectivity of GaN.
As an example, the semiconductor medium film layer 13 includes SiO2Layer, Si3N4、SiONxLayer or the DBR layer (DBR layer
At least one of it is the film layer being alternately superimposed on by titanium dioxide and silica).Specifically, the semiconductor medium film layer 13 can
Think including SiO2Layer, Si3N4、SiONxThe single layer structure of layer or DBR layer, or including SiO2Layer and Si3N4Two layers of knot
Structure, or including the SiO being alternately superimposed on successively2Layer and Si3N4Multilayered structure, or including what is be sequentially stacked
SiO2Layer, Si3N4And SiONxThe three-decker of layer, it includes the SiO being periodically alternately superimposed on successively that can also be2Layer, Si3N4、
SiONxThe multilayered structure of layer and DBR layer, it includes aperiodicity is alternately superimposed on successively SiO that can also be2Layer, Si3N4、SiONxLayer
And the multilayered structure of DBR layer.Wherein, Fig. 5 includes the SiO being sequentially stacked with the semiconductor medium film layer 132Layer 131 and
Si3N4The double-layer structure of layer 132 is as example.
In step 5), the S5 steps in please referring to Fig.1 and Fig. 6 to Fig. 8, wherein Fig. 7 and Fig. 8 is the cross section structure of Fig. 6
Schematic diagram, it is using photoetching and dry etch process that the semiconductor medium film layer 13 is graphical, on the protective layer 12
Surface forms the bulge-structure 133 of periodic intervals distribution；Between the bulge-structure 133, the part protective layer is exposed
12。
As an example, the bulge-structure 133 is in that periodical hexagonal is distributed in 12 upper surface of the protective layer, can also be in
Array distribution.
As an example, the shape of the bulge-structure 133 is cylinder, square column type, cone, bar shaped or bullet-headed.
Wherein, it is bullet-headed cross section structure schematic diagram that Fig. 7, which is the shape of the bulge-structure 133, and Fig. 8 is the bulge-structure
133 shape is cylindrical or square column type cross section structure schematic diagram.
As an example, the maximum transverse size of the bulge-structure 133 is 0.1 μm~10 μm, i.e. the bulge-structure 133
The size of bottom is 0.1 μm~10 μm；The height of the bulge-structure 133 is 0.2 μm~3 μm, i.e., the institute formed in step 4)
The thickness for stating semiconductor medium film layer 13 is 0.2 μm~3 μm；The minimum spacing of the adjacent bulge-structure 133 is 0.1 μm~5 μ
The spacing of m, i.e., adjacent 133 bottom of the bulge-structure are 0.1 μm~5 μm.
In step 5), since 13 lower section of the semiconductor medium film layer is formed with the protective layer 12, using dry method
Etching technics etches during the semiconductor medium film layer 13 forms the bulge-structure 133, and the protective layer 12 plays
The effect that the epitaxial buffer layer 11 is protected so that the epitaxial buffer layer 11 will not be by etching gas in dry etch process
The pollution of body or polymer so that epitaxial growth epitaxial layer is more prone to again on 11 surface of the epitaxial buffer layer, grows work
Skill window bigger, can technology volume production；Meanwhile the protective layer 12 is also acted as the epitaxial buffer layer 11 and the semiconductor
The effect of media coating 13 (bulge-structure 133 after etching) connection so that be used for semiconductor device in the compound substrate
When prepared by part structure, the variation of stress can be withstood in epitaxial growth temperature-rise period.
In cyclic array distribution including at least one layer of semiconductor medium layer in the compound substrate of the utility model
The bulge-structure 133 can make the crystal quality of the epitaxial layer lateral growth formed on the compound substrate surface more
It is good；Simultaneously as the bulge-structure 133 is semiconductor medium film layer, in the bulge-structure 133 each layer with subsequently described
GaN layer in the semiconductor devices that compound substrate surface is formed has larger reflection differences, the reflection of the bulge-structure 133
Effect is more preferable, can improve the light emission rate of the semiconductor devices subsequently formed on the compound substrate surface.
In step 6), the S6 steps in please referring to Fig.1 and Fig. 9 to Figure 11, wherein Figure 10 and Figure 11 is the section of Fig. 9
Structural schematic diagram, it is using wet-etching technology that the protective layer 12 is graphical, with the protective layer 12 of removal exposure, retain
The protective layer 12 immediately below the bulge-structure 133 is patterned protective layer 121.
As an example, may be used existing can remove the protective layer 12 but cannot remove the protective layer 12 weeks
The protective layer 12 of the wet etching liquid removal exposure for the other structures enclosed is (i.e. between the adjacent bulge-structure 133
The protective layer 12).After the protective layer 12 for removing exposure, the institute between the bulge-structure 133 is exposed
State epitaxial buffer layer 11.It should be noted that in step 6), between the bulge-structure 133 and the bulge-structure 133
All protective layers 12 of periphery so that the protective layer 12 other than 133 lower section of the bulge-structure is complete
Full removal, so that the epitaxial buffer layer 11 other than 133 lower section of the bulge-structure is exposed.
Embodiment two
Please continue to refer to Fig. 9 and Figure 11, the utility model also provides a kind of compound substrate, and the compound substrate may be used
Preparation method described in embodiment one is prepared, and the compound substrate includes：Growth substrates 10；Epitaxial buffer layer 11,
The epitaxial buffer layer 11 is located at 10 upper surface of the growth substrates；Bulge-structure 133, the bulge-structure 133 is in periodically
It is spaced apart in 11 upper surface of the epitaxial buffer layer；The bulge-structure 133 is semiconductor medium film layer；Patterned protective layer
121, the patterned protective layer 121 is located at described convex between the bulge-structure 133 and the epitaxial buffer layer 11
Play the underface of structure 133.
As an example, the growth substrates 10 can be Al2O3Substrate, SiC substrate Si substrates, ZnO substrates or GaN substrate.
As an example, the epitaxial buffer layer 11 can be AlxGa1-xN layers, wherein 0≤x≤0.5；May be BN
Layer；It can also be AlN layers, AlN layers of crystal orientation is (0001) crystal orientation.
As an example, the thickness of the epitaxial buffer layer 11 can be set according to actual needs, it is preferable that this implementation
In example, the thickness of the epitaxial buffer layer 11 is 50 angstroms~600 angstroms.
As an example, the patterned protective layer 121 may include metal layer or/and metal oxide layer, i.e., the described figure
Shape protective layer 121 can be one layer of metal layer, or the metal layer of at least two layers different materials, or one layer of gold
Belong to oxide skin(coating), or the metal oxide layer of at least two layers different materials can also be at least one layer of metal layer with extremely
The laminated construction of few one layer of metal oxide layer composition.Specifically, the material of the metal layer includes nickel (Ni) or titanium (Ti)；Institute
The material for stating metal oxide layer includes titanium oxide (TiOx) or indium tin oxide (ITO).In one example, the graphical guarantor
Sheath 121 includes one layer of titanium oxide layer and one layer of indium tin oxide layer.
As an example, the patterned protective layer 121 is by etching obtained by the protective layer 12 described in embodiment one.
As an example, the thickness of the protective layer 12 can be set according to actual needs, it is preferable that the present embodiment
In, the thickness of the protective layer 12 can be 10 angstroms~500 angstroms.
As an example, the bulge-structure 133 includes at least one layer of semiconductor medium layer, when the bulge-structure 133 wraps
When including at least two layers semiconductor medium layer, the material of the adjacent semiconductor medium layer is different, and the semiconductor medium
The reflectivity of layer differs larger with the reflectivity of GaN.
As an example, the bulge-structure 133 includes SiO2Layer, Si3N4Layer, SiONxAt least one of layer or DBR layer.
Specifically, the bulge-structure 133 may include SiO2Layer, Si3N4Layer, SiONxThe single layer structure of layer or DBR layer, or
Including SiO2Layer and Si3N4Double-layer structure, or including the SiO being alternately superimposed on successively2Layer and Si3N4The multilayer knot of layer
Structure, or including the SiO being sequentially stacked2Layer, Si3N4Layer and SiONxThe three-decker of layer, it includes all successively that can also be
The SiO that phase property is alternately superimposed on2Layer, Si3N4Layer, SiONxThe multilayered structure of layer and DBR layer, it includes aperiodic successively that can also be
The SiO that property is alternately superimposed on2Layer, Si3N4Layer, SiONxThe multilayered structure of layer and DBR layer.Wherein, Figure 10 and Figure 11 is with described
Bulge-structure 133 includes the SiO being sequentially stacked2Layer 131, Si3N4The double-layer structure of layer 132 is as example.
As an example, the bulge-structure 133 is in that periodical hexagonal is distributed on 11 surface of the epitaxial buffer layer, it can also
In array distribution.
As an example, the shape of the bulge-structure 133 be cylinder, square column type, cone, bar shaped, it is bullet-headed or
Bar shaped.Wherein, it is bullet-headed cross section structure schematic diagram that Figure 10, which is the shape of the bulge-structure 133, and Figure 11 is described convex
The shape for playing structure 133 is cylindrical or square column type cross section structure schematic diagram.
As an example, the maximum transverse size of the bulge-structure 133 is 0.1 μm~10 μm, i.e. the bulge-structure 133
The size of bottom is 0.1 μm~10 μm；The height of the bulge-structure 133 is 0.2 μm~3 μm, i.e. the bulge-structure 133
Thickness is 0.2 μm~3 μm；The minimum spacing of the adjacent bulge-structure 133 is 0.1 μm~5 μm, i.e., the adjacent bulge-structure
The spacing of 133 bottoms is 0.1 μm~5 μm.
The patterned protective layer 121 of the utility model is formed under the semiconductor medium film layer 13 by etching
The protective layer 12 of side and obtain, form the protrusion etching the semiconductor medium film layer 13 using dry etch process
During structure 133, the protective layer 12 plays the role of protecting the epitaxial buffer layer 11 so that the epitaxial buffer
Layer 11 will not be polluted by etching gas in dry etch process or polymer so that 11 surface of the epitaxial buffer layer again
Secondary epitaxial growth epitaxial layer is more prone to, growth technique window bigger, can technology volume production；Meanwhile the protective layer 12 also rises
To the work for connecting the epitaxial buffer layer 11 with the semiconductor medium film layer 13 (bulge-structure 133 after etching)
With so that when the compound substrate is prepared for semiconductor device structure, it can withstand and answer in epitaxial growth temperature-rise period
The variation of power.
In cyclic array distribution including at least one layer of semiconductor medium layer in the compound substrate of the utility model
The bulge-structure 133 can make the crystal quality of the epitaxial layer lateral growth formed on the compound substrate surface more
It is good；Simultaneously as the bulge-structure 133 is semiconductor medium film layer, in the bulge-structure 133 each layer with subsequently described
GaN layer in the semiconductor devices that compound substrate surface is formed has larger reflection differences, the reflection of the bulge-structure 133
Effect is more preferable, can improve the light emission rate of the semiconductor devices subsequently formed on the compound substrate surface.
Embodiment three
2 are please referred to Fig.1, the utility model also provides a kind of preparation method of semiconductor device structure, the semiconductor device
The preparation method of part structure includes the following steps：
1) compound substrate is prepared using the preparation method as described in embodiment one；
2) extension transition zone is formed on the compound substrate surface, the extension transition zone fills up between the bulge-structure
Gap, and the bulge-structure is completely covered；
3) N-type epitaxy layer is formed in the extension transition layer surface；
4) quantum well layer is formed on the N-type epitaxy layer surface；
5) p-type epitaxial layer is formed on the quantum well layer surface.
In step 1), the S1 steps in 2 are please referred to Fig.1, are prepared using the preparation method described in embodiment one compound
Substrate.
The specific method for preparing the compound substrate please refers to embodiment one, is not repeated herein.
In step 2), S2 steps and Figure 13 in 2 are please referred to Fig.1, extension transition is formed on the compound substrate surface
Layer 14, the extension transition zone 14 fills up the gap between the bulge-structure 133, and the bulge-structure 133 is completely covered.
As an example, being formed in the upper surface of the exposed epitaxial buffer layer 11 using MOCVD or HVPE techniques described
Extension transition zone 14.
As an example, the thickness of the extension transition zone 14 can be set according to actual needs, it is preferable that this implementation
In example, the thickness of the extension transition zone 14 can be 1 μm~10 μm.
In one example, the extension transition zone 14 be single layer structure, the extension transition zone 14 can be GaN layer,
AlGaN layer, AlN layers, InGaN layer, AlInGaN layers, mix the N-type semiconductor material layer of Si or mix the p-type semiconductor material layer of Mg.
In another example, the extension transition zone 14 is two or more layers laminated construction, and the extension transition zone 14 can
Think GaN layer, AlGaN layer, AlN layers, InGaN layer, AlInGaN layers, mix the N-type semiconductor material layer of Si or mix the p-type half of Mg
At least two laminated construction in conductor material layer.
It should be noted that in the present embodiment with the shape of the bulge-structure 133 be it is bullet-headed as an example, other
The 133 corresponding process of the bulge-structure and structure of shape are identical as in the embodiment.
In step 3), S3 steps and Figure 14 in 2 are please referred to Fig.1, is formed outside N-type on 14 surface of extension transition zone
Prolong layer 15.
As an example, MOCVD techniques may be used forms the N-type epitaxy layer 15 on 14 surface of extension transition zone.
In step 4), S4 steps and Figure 15 in 2 are please referred to Fig.1, Quantum Well is formed on 15 surface of the N-type epitaxy layer
Layer 16.
As an example, MOCVD techniques may be used forms the quantum well layer 16 on 15 surface of the N-type epitaxy layer.
In step 5), S5 steps and Figure 16 in 2 are please referred to Fig.1, p-type extension is formed on 16 surface of the quantum well layer
Layer 17.
As an example, MOCVD techniques may be used forms the p-type epitaxial layer 17 on 16 surface of the quantum well layer.
In one example, it please refers to Fig.1 7, further includes forming N electrode on 15 surface of the N-type epitaxy layer after step 5)
18, and the step of 17 surface of p-type epitaxial layer forms P electrode 19.
As an example, when 15 surface of the N-type epitaxy layer forms the N electrode 18, first gone using lithographic etch process
Except the part quantum well layer 16 and part the p-type epitaxial layer 17 forms step structure to expose the N-type epitaxy layer 15,
Then the N electrode is formed on 15 surface of the N-type epitaxy layer again.Certainly, can also the formation of the N-type epitaxy layer 15 exposed
After step structure, while 15 surface of the N-type epitaxy layer forms the N electrode, in 17 surface shape of the p-type epitaxial layer
At the P electrode 16.
In another example, it please refers to Fig.1 8, further includes forming P electricity on 17 surface of p-type epitaxial layer after step 5)
Pole 19, and the step of surface of the growth substrates 10 far from the epitaxial buffer layer 11 forms N electrode 18.
Example IV
Please continue to refer to Figure 17 and Figure 18, the utility model also provides a kind of semiconductor device structure, the semiconductor device
Part structure can be prepared by the preparation method in embodiment three, and the semiconductor device structure includes：Such as embodiment two
Described in compound substrate；Extension transition zone 14, the extension transition zone 14 fill up the gap between the bulge-structure 133 simultaneously
The bulge-structure 133 is completely covered；N-type epitaxy layer 15, the N-type epitaxy layer 15 are located at 14 surface of extension transition zone；
Quantum well layer 16, the quantum well layer 16 are located at 15 surface of the N-type epitaxy layer；P-type epitaxial layer 17, the p-type epitaxial layer 17
With 16 surface of the quantum well layer.
As an example, the thickness of the extension transition zone 14 can be set according to actual needs, it is preferable that this implementation
In example, the thickness of the extension transition zone 14 can be 1 μm~10 μm.
In one example, the extension transition zone 14 be single layer structure, the extension transition zone 14 can be GaN layer,
AlGaN layer, AlN layers, InGaN layer, AlInGaN layers, mix the N-type semiconductor material layer of Si or mix the p-type semiconductor material layer of Mg.
In another example, the extension transition zone 14 is two or more layers laminated construction, and the extension transition zone 14 can
Think GaN layer, AlGaN layer, AlN layers, InGaN layer, AlInGaN layers, mix the N-type semiconductor material layer of Si or mix the p-type half of Mg
At least two laminated construction in conductor material layer.
It should be noted that using the shape of the bulge-structure 133 being equally bullet-headed as showing in the present embodiment.
In one example, as shown in figure 17, the semiconductor device structure further includes：N electrode 18, the N electrode 18
In 15 surface of the N-type epitaxy layer；P electrode 19, the P electrode are located at 17 surface of p-type epitaxial layer.
In another example, as shown in figure 18, the semiconductor device structure further includes：P electrode 19, the P electrode 19
Positioned at 17 surface of p-type epitaxial layer；N electrode 18, the N electrode 18 are located at the growth substrates 10 far from the epitaxial buffer
The surface of layer 11.
In conclusion a kind of compound substrate of the utility model offer and semiconductor device structure, the system of the compound substrate
Preparation Method includes the following steps：1) growth substrates are provided；2) epitaxial buffer layer is formed in the growth substrates upper surface；3) institute
It states epitaxial buffer layer upper surface and forms protective layer；4) semiconductor medium film layer is formed in the protective layer upper surface；5) light is used
It carves and dry etch process is by the semiconductor medium membrane graphic, to form periodic intervals in the protective layer upper surface
The bulge-structure of distribution；Between the bulge-structure, the part protective layer is exposed；6) use wet-etching technology described
Protective layer is graphical, with the protective layer of removal exposure.The preparation method of the compound substrate of the utility model by first outside
Prolong buffer-layer surface and form protective layer, then form semiconductor medium film layer in protective layer again, uses dry etching work
During skill etching semiconductor media coating forms bulge-structure, protective layer plays the role of protecting epitaxial buffer layer, makes
Obtaining epitaxial buffer layer will not be polluted by etching gas in dry etch process or polymer so that in epitaxial buffer layer surface
Epitaxial growth epitaxial layer is more prone to again, growth technique window bigger, can technology volume production；Meanwhile protective layer also act as by
The effect that epitaxial buffer layer is connect with semiconductor medium film layer so that prepared for semiconductor device structure in the compound substrate
When, the variation of stress can be withstood in epitaxial growth temperature-rise period；It is in cyclic array in the compound substrate of the utility model
The bulge-structure of distribution including at least one layer of semiconductor medium layer can make the epitaxial layer side formed on compound substrate surface
Crystal quality to growth is more preferable；Simultaneously as the bulge-structure is semiconductor medium film layer, each layer in the bulge-structure
There is larger reflection differences, the protrusion with the GaN layer subsequently in the semiconductor devices that the compound substrate surface is formed
The reflecting effect of structure is more preferable, can improve the light emission rate of the semiconductor devices subsequently formed on the compound substrate surface.
The above embodiments are only illustrative of the principle and efficacy of the utility model, new not for this practicality is limited
Type.Any person skilled in the art can all carry out above-described embodiment under the spirit and scope without prejudice to the utility model
Modifications and changes.Therefore, such as those of ordinary skill in the art without departing from the revealed essence of the utility model
All equivalent modifications completed under refreshing and technological thought or change, should be covered by the claim of the utility model.
Claims (10)
1. a kind of compound substrate, which is characterized in that the compound substrate includes：
Growth substrates；
Epitaxial buffer layer is located at the growth substrates upper surface；
Bulge-structure is distributed in the epitaxial buffer layer upper surface in periodic intervals；The bulge-structure is semiconductor medium
Film layer；
Patterned protective layer, between the bulge-structure and the epitaxial buffer layer, and just positioned at the bulge-structure
Lower section.
2. compound substrate according to claim 1, it is characterised in that：The bulge-structure includes that at least one layer of semiconductor is situated between
Matter layer.
3. compound substrate according to claim 2, it is characterised in that：The semiconductor medium film layer includes SiO2Layer,
Si3N4Layer, SiONxAt least one of layer or DBR layer.
4. compound substrate according to claim 1, it is characterised in that：The shape of the bulge-structure is cylindrical, square column
Shape, cone, bullet-headed or bar shaped.
5. compound substrate according to claim 1, it is characterised in that：The patterned protective layer include metal layer or/and
Metal oxide layer.
6. compound substrate according to claim 5, it is characterised in that：The material of the metal layer includes nickel or titanium；It is described
The material of metal oxide layer includes titanium oxide or indium tin oxide.
7. compound substrate according to claim 1, it is characterised in that：The thickness of the patterned protective layer be 10 angstroms~
500 angstroms.
8. a kind of semiconductor device structure, which is characterized in that the semiconductor device structure includes：
Compound substrate as described in any one of claim 1 to 7；
Simultaneously the bulge-structure is completely covered in extension transition zone, the gap filled up between the bulge-structure；
N-type epitaxy layer is located at the extension transition layer surface；
Quantum well layer is located at the N-type epitaxy layer surface；
P-type epitaxial layer, with the quantum well layer surface.
9. semiconductor device structure according to claim 8, it is characterised in that：The semiconductor device structure further includes：
N electrode is located at the N-type epitaxy layer surface；
P electrode is located at the p-type epi-layer surface.
10. semiconductor device structure according to claim 8, it is characterised in that：The semiconductor device structure further includes：
P electrode is located at the p-type epi-layer surface；
N electrode is located at surface of the growth substrates far from the epitaxial buffer layer.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108281525A (en) * | 2017-12-07 | 2018-07-13 | 上海芯元基半导体科技有限公司 | A kind of compound substrate, semiconductor device structure and preparation method thereof |
| CN110429099A (en) * | 2019-08-13 | 2019-11-08 | 黄山博蓝特半导体科技有限公司 | A kind of production method of high brightness compound substrate |
| CN110444642A (en) * | 2019-08-13 | 2019-11-12 | 黄山博蓝特半导体科技有限公司 | A kind of preparation method of the graphical compound substrate of high brightness |
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2017
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108281525A (en) * | 2017-12-07 | 2018-07-13 | 上海芯元基半导体科技有限公司 | A kind of compound substrate, semiconductor device structure and preparation method thereof |
| CN110429099A (en) * | 2019-08-13 | 2019-11-08 | 黄山博蓝特半导体科技有限公司 | A kind of production method of high brightness compound substrate |
| CN110444642A (en) * | 2019-08-13 | 2019-11-12 | 黄山博蓝特半导体科技有限公司 | A kind of preparation method of the graphical compound substrate of high brightness |
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