CN209747453U - Semiconductor device with a plurality of transistors - Google Patents

Semiconductor device with a plurality of transistors Download PDF

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Publication number
CN209747453U
CN209747453U CN201920283086.1U CN201920283086U CN209747453U CN 209747453 U CN209747453 U CN 209747453U CN 201920283086 U CN201920283086 U CN 201920283086U CN 209747453 U CN209747453 U CN 209747453U
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layer
semiconductor device
substrate
growth
growth substrate
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郝茂盛
袁根如
张楠
马艳红
陈朋
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Shanghai Xinyuanji Semiconductor Technology Co Ltd
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Shanghai Xinyuanji Semiconductor Technology Co Ltd
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Abstract

The utility model provides a composite substrate and semiconductor device structure, composite substrate includes: growing a substrate; the protruding structures are periodically distributed on the upper surface of the growth substrate at intervals; the protruding structure comprises a metal layer or metal oxide layer protection layer and a semiconductor medium film layer located on the protection layer. The protective layer is added in the composite substrate and is in contact with the growth substrate, and the protective layer can protect the growth substrate, so that the substrate crystal is not polluted by etching gas or polymer in a dry etching process, the growth substrate is ensured to be clean and flat, a pollution-free growth window is provided for the subsequent growth of epitaxial crystal and the preparation of a semiconductor device, and various performances of the semiconductor device can be improved.

Description

Semiconductor device with a plurality of transistors
Technical Field
The utility model relates to the field of semiconductor technology, especially, relate to a semiconductor device's structure.
Background
semiconductor lighting is used as a novel high-efficiency solid light source, has the advantages of long service life, energy conservation, environmental protection, safety and the like, and the application field of the semiconductor lighting is rapidly expanding. Especially in recent years, with the increase of research and development efforts and capital investment, the luminous efficiency and quality of the LED are greatly improved, and the LED is further applied deeply.
The LED industry has been studied and developed for many years, and it is agreed that the growth substrate technology is the core of GaN-based materials and devices. The current mainstream substrate technical routes are a sapphire technical route, a Si substrate technical route, a SiC substrate technical route, a GaN homogeneous substrate technology and a newly broken composite substrate technical route, the sapphire technical route is the most mature in the several technologies, and the several technical routes have advantages and disadvantages and some technical difficulties, and the purpose is to improve the luminous efficiency and quality of the LED.
the latest patterned substrates have several methods: the method comprises the steps of manufacturing a SiO2 film structure on the surface of a sapphire substrate or the surface of other conventional substrates to form a microscopic pattern; the second method is that a DBR film layer structure is manufactured on the surface of the sapphire substrate or the surface of other conventional substrates to form a microscopic pattern; the third method is that an epitaxial buffer layer is deposited on the growth substrate, and then a SiO2, Si3N4 or DBR film structure is made on the buffer layer to form a micro-pattern. The first method and the second method have a common problem that the subsequent epitaxial growth is difficult, if the growth is carried out at low temperature, polycrystal can be deposited on the surface of the SiO2 film layer or the DBR film layer, the quality of epitaxial crystal is poor, and if the growth is carried out at high temperature, GaN or polycrystal can not be deposited on the surface of the sapphire substrate, so that the epitaxial growth process conditions are harsh, and the mass production cannot be carried out. Method three also has some difficulties: firstly, making a SiO2 film layer structure microscopic pattern, wherein if a wet etching SiO2 pattern is used, the pattern size is limited, and the pattern size can only be large but not small, otherwise, the mass production cannot be realized; in other words, the nanometer level is realized; if the SiO2 pattern is etched by a dry method, the surface of the buffer layer is polluted by etching gas, so that the subsequent epitaxial growth is difficult, even deposition is impossible, the conditions are harsh, the crystal quality of the epitaxial layer is not greatly improved, and secondly, the reflection effect of a pure SiO2 film layer structure on light is limited, and the improvement on brightness is limited.
For the requirements of higher applications of LEDs, the substrate technology needs to be lifted and excavated. Therefore, the substrate technology is continuously excavated to effectively improve the crystal quality of the GaN-based epitaxial layer and the LED epitaxial structure, and the improvement of various performance indexes of the LED is really necessary.
disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a semiconductor device for solving the problems that the LED epitaxial window in the prior art is contaminated, the crystal quality of the epitaxial layer is not high and various performances are to be improved.
To achieve the above and other related objects, the present invention provides a composite substrate, comprising:
Growing a substrate;
The protruding structures are periodically distributed on the upper surface of the growth substrate at intervals;
The protruding structure comprises a metal layer or metal oxide layer protection layer in contact with the growth substrate and a semiconductor medium film layer located on the protection layer.
Optionally, the material of the metal layer or the metal oxide layer protection layer includes nickel (Ni), titanium (Ti), titanium oxide (TiOx), or Indium Tin Oxide (ITO).
Optionally, the thickness of the metal layer or the metal layer oxide layer protection layer is
optionally, the material of the growth substrate comprises Al2O3, SiC, Si, ZnO, GaN.
Optionally, the shape of the protruding structure comprises a cylinder, a square column, a cone, or a yurt.
The utility model also provides a semiconductor device, semiconductor device includes:
the composite substrate of any of the above;
The nitride buffer layer is positioned on the upper surface of the composite substrate and completely covers the protruding structures and the growth substrate exposed between the protruding structures;
the epitaxial transition layer is positioned on the surface of the nitride buffer layer and completely fills the gaps among the raised structures;
The N-type epitaxial layer is positioned on the surface of the epitaxial transition layer;
The quantum well layer is positioned on the surface of the N-type epitaxial layer;
The P-type epitaxial layer is positioned on the surface of the quantum well layer;
And the P electrode and the N electrode are respectively used for electrically leading out the P type epitaxial layer and the N type epitaxial layer.
optionally, the structure of the semiconductor device is a forward-mounted structure, a flip-chip structure or a vertical structure.
As described above, the metal layer or the metal oxide layer protection layer which is in contact with the growth substrate is added into the composite substrate, and the protection layer can protect the growth substrate, so that the substrate crystal is not polluted by etching gas or polymer in the dry etching process, the growth substrate is ensured to be clean and flat, a pollution-free growth window is provided for the subsequent growth of epitaxial crystal and the preparation of a semiconductor device, and various performances of the semiconductor device can be improved.
Drawings
Fig. 1 shows a flow chart of a method for manufacturing a composite substrate according to the present invention.
FIG. 2 is a schematic view of a growth substrate and a protection layer on the upper surface of the substrate according to the first embodiment.
Fig. 3 is a schematic view illustrating a semiconductor dielectric film layer formed on a surface of a protection layer according to a first embodiment.
Fig. 4 is a schematic diagram showing the patterning of the semiconductor dielectric film layer by photolithography and dry etching.
Fig. 5 is a schematic diagram showing the exposed protective layer removed by a wet etching process to form a bump structure.
Fig. 6 is a top view of the growth substrate after formation of the raised structures.
Fig. 7 is a flowchart illustrating a method for manufacturing a semiconductor device according to the present invention.
Fig. 8 is a schematic view illustrating the formation of a nitride buffer layer according to the first embodiment.
Fig. 9 is a schematic diagram illustrating the formation of an epitaxial transition layer according to a first embodiment.
Fig. 10 is a schematic diagram illustrating the formation of an N-type epitaxial layer, a quantum well layer, and a P-type epitaxial layer in the first embodiment.
Fig. 11 is a schematic diagram illustrating the formation of P and N electrodes according to a first embodiment.
fig. 12 is a schematic view illustrating the formation of a semiconductor dielectric film layer according to a second embodiment.
Fig. 13 is a schematic diagram illustrating a bump structure formed after photolithography and etching in the third embodiment.
Fig. 14 is a top view of the growth substrate after the formation of the protruding structures in the third embodiment.
Fig. 15 is a schematic structural view of a semiconductor device according to a third embodiment.
Description of the element reference numerals
11 growth substrate
12 protective layer
13 semiconductor dielectric film layer
131 SiO2 layer
132 Si3N4 layer
13' convex structure
14 nitride buffer layer
15 epitaxial transition layer
16N type GaN layer
17 quantum well layer
18P type GaN layer
191P electrode
192N electrode
h height of convex structure
Width of the protrusion structure
Spacing between w bump structures
21 growth substrate
22 protective layer
231 SiO2 layer
232 Si3N4 layer
23 semiconductor dielectric film layer
31 growth substrate
32 protective layer
331 SiO2 layer
332 Si3N4 layer
33' convex structure
34 nitride buffer layer
35 epitaxial transition layer
36N type epitaxial layer
37 quantum well layer
38P type epitaxial layer
391P electrode
392N electrode
Detailed Description
The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
Please refer to fig. 1 to 15. It should be noted that the drawings provided in the present embodiment are only schematic and illustrative of the basic idea of the present invention, and although the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of the components in actual implementation may be changed at will, and the layout of the components may be more complicated.
Example one
As shown in fig. 1 to 11, the present embodiment provides a structure of a composite substrate and a semiconductor device and a method for fabricating the same.
Referring to fig. 1, the present invention provides a method for preparing a composite substrate, which includes the following steps:
S1: providing a growth substrate;
s2: forming a protective layer on the upper surface of the growth substrate;
s3: forming a semiconductor medium film layer on the upper surface of the protective layer;
S4: patterning the semiconductor medium film layer through photoetching and dry etching processes to form bulges which are periodically distributed at intervals on the upper surface of the protective layer, wherein part of the protective layer is exposed among the bulges;
S5: and removing the exposed protective layer between the bulges by adopting a wet etching process so as to form the bulge structures which are periodically distributed at intervals on the surface of the substrate.
Referring to step S1 and step S2 in fig. 1, a growth substrate 11 is provided and a protective layer 12 is formed on the upper surface of the growth substrate, as shown in fig. 2.
Optionally, the material of the growth substrate comprises Al2O3, SiC, Si, ZnO, or GaN.
Optionally, the material of the protective layer is a metal layer or a metal oxide layer, the metal layer may be selected from nickel (Ni) or titanium (Ti), and the metal oxide layer may be selected from titanium oxide (TiOx) or Indium Tin Oxide (ITO). The utility model discloses the effect of adding the protective layer does: protecting the crystal on the surface of the growing substrate from being corroded and polluted by etching gas or polymer in dry etching to influence the growth of a subsequent epitaxial layer, providing a clean and smooth growing window for the subsequent epitaxial layer, and playing a role in connecting a semiconductor medium film layer on the upper surface of the clean and smooth growing window.
Optionally, the preparation method of the protective layer comprises Plasma Enhanced Chemical Vapor Deposition (PECVD), Physical Vapor Deposition (PVD) or Electron Beam Evaporation (EBE), and the protective layer has a thickness of
specifically, in the present embodiment, an indium tin oxide layer having a thickness of
As shown in fig. 3, step S3 is performed to form a semiconductor dielectric film layer 13 on the upper surface of the protective layer 12.
Optionally, the semiconductor dielectric film layer 13 includes at least one of a SiO2 layer, a Si3N4 layer, and a sion x layer. Specifically, the semiconductor dielectric film layer may have a single-layer structure including a SiO2 layer, a Si3N4 layer, and a sion x layer, may have a two-layer structure including a SiO2 layer and a Si3N4 layer, may have a multilayer structure including a SiO2 layer and a Si3N4 layer which are alternately stacked in sequence, may have a three-layer structure including a SiO2 layer, a Si3N4 layer, and a sion x layer which are alternately stacked in sequence, may have a multilayer structure including a SiO2 layer, a Si3N4 layer, and a sion x layer which are alternately stacked in sequence periodically, and may have a multilayer structure including a SiO2 layer, a Si3N4 layer, and a sion x layer which are alternately stacked in sequence aperiodically. The light extraction rate of the semiconductor device can be improved by the difference of the refractive indexes of the layers of the semiconductor dielectric film layer or the difference of the refractive indexes of the dielectric film layer and the GaN layer in the semiconductor device.
Optionally, the preparation method of the semiconductor dielectric film layer comprises Plasma Enhanced Chemical Vapor Deposition (PECVD), Physical Vapor Deposition (PVD) or Electron Beam Evaporation (EBE).
As an example, in step S3, a SiO2 layer 131 is deposited on the upper surface of the passivation layer 12, and then a Si3N4 layer 132 is deposited on the upper surface of the SiO2 layer 131 by using a physical vapor deposition method, so as to form the semiconductor dielectric film layer 13.
As shown in fig. 4, step S4 is performed. Patterning the semiconductor medium film layer 13 by photoetching and dry etching processes to form bulges which are periodically distributed at intervals on the upper surface of the protective layer, and exposing partial protective layer 12 between the bulges;
As shown in fig. 5, step S5 is performed, and the exposed protective layer 12 between the protrusions is removed by a wet etching process to form periodic protrusion structures 13' spaced apart on the surface of the growth substrate, where the protrusion structures include the protective layer and the semiconductor dielectric film layer on the protective layer.
Alternatively, the shape of the protruding structure may be a cylinder, a square column, a cone, or a yurt. The protruding structure positioned on the growth substrate can enable the crystal quality of the epitaxial layer formed on the surface of the composite substrate in the lateral growth direction to be better.
Optionally, the width d of the bottom of the protruding structure is 0.1-10 μm, the distance w between the connected protruding structures is 0.1-5 μm, and the overall height h of the protruding structure is 0.2-3 μm.
Specifically, in the present embodiment, the protrusion structure 13' is a yurt, as shown in fig. 5 and the top view 6. Thus, the composite substrate of the present embodiment is manufactured.
The epitaxial growth window is protected by the process. In the etching process, the surface of the substrate is easily corroded and polluted by gas or polymer and is difficult to clean, crystals on the surface of the substrate are damaged, the subsequent epitaxial growth is very unfavorable, and a high-quality epitaxial layer is difficult to form. Meanwhile, the protruding structure on the growth substrate can enable the crystal quality of the epitaxial layer formed on the surface of the composite substrate in the lateral growth direction to be better, and the light-emitting rate of the semiconductor device formed on the surface of the composite substrate can be improved due to the refractive index difference between the layers of the semiconductor medium film layer with the multilayer structure or the refractive index difference between the semiconductor medium film layer and the GaN layer in the semiconductor device formed on the surface of the composite substrate.
the embodiment also provides a structure of a semiconductor device and a preparation method thereof, and as shown in fig. 7, the preparation method of the semiconductor device comprises the following steps:
S6: adopting the composite substrate prepared by the steps;
S7: forming a nitride buffer layer on the upper surface of the composite substrate, and completely covering the protruding structures and the exposed growth substrate between the protruding structures;
S8: forming an epitaxial transition layer on the surface of the nitride buffer layer, and completely filling gaps among the protruding structures;
s9: sequentially forming at least an N-type epitaxial layer, a quantum well layer and a P-type epitaxial layer on the surface of the epitaxial transition layer;
S10: and etching and depositing a P electrode and an N electrode, wherein the P electrode and the N electrode are respectively used for electrically leading out the P type epitaxial layer and the N type epitaxial layer.
as shown in fig. 7, referring to step S6, the completed composite substrate prepared through steps S1 to S5 is used.
As shown in fig. 8, step S7 is performed to form a nitride buffer layer 14 on the surface of the composite substrate prepared according to the above steps, wherein the nitride buffer layer completely covers the bump structures and the exposed growth substrate between the bump structures.
optionally, the material of the nitride buffer layer can be an AlxGa1-xN layer, wherein x is more than or equal to 0 and less than or equal to 0.5; it may also be a BN layer; the crystal orientation of the AlN layer may be (0001).
Optionally, the method for preparing the nitride buffer layer comprises Metal Organic Chemical Vapor Deposition (MOCVD), Hydride Vapor Phase Epitaxy (HVPE) or Physical Vapor Deposition (PVD), and the nitride buffer layer has a thickness of
as an example, a nitride buffer layer 14 may be formed on the upper surface of the composite substrate using MOCVD or PVD processes, the nitride buffer layer having a thickness of
As shown in fig. 9, step S8 is performed to form an epitaxial transition layer 15 on the surface of the nitride buffer layer, and the epitaxial transition layer fills the gaps between the protruding structures.
Optionally, the material of the epitaxial transition layer includes GaN, AlGaN, AlN, InGaN, or AlInGaN. The epitaxial transition layer may have a single-layer structure of the above-described materials or may have a multilayer structure of the above-described materials. The material may also be an N-type semiconductor material doped with Si or a P-type semiconductor material doped with Mg.
Optionally, the preparation method of the epitaxial transition layer comprises Metal Organic Chemical Vapor Deposition (MOCVD) and Hydride Vapor Phase Epitaxy (HVPE), and the thickness of the epitaxial transition layer is 1-10 μm.
As an example, AlGaN is selected as the material of the epitaxial transition layer in this embodiment, and the thickness of the epitaxial transition layer is 5 μm.
As shown in fig. 10, step S9 is performed to sequentially form at least an N-type epitaxial layer 16, a quantum well layer 17, and a P-type epitaxial layer 18 on the surface of the epitaxial transition layer.
As an example, in this embodiment, an MOCVD process is adopted to sequentially deposit an N-type epitaxial layer, a quantum well layer, and a P-type epitaxial layer on the surface of the epitaxial transition layer.
Step S10 is performed to etch and deposit the P electrode and the N electrode, thereby forming electrical connection between the N-type epitaxial layer and the P-type epitaxial layer.
Alternatively, step S10 may be etching and depositing the P electrode and the N electrode such that the P electrode and the N electrode are located on the same side of the semiconductor device, forming a front-mounted structure; the P electrode and the N electrode can also be deposited, so that the P electrode and the N electrode are respectively positioned at two sides of the semiconductor device to form a vertical structure; the upright structure can also be inverted to form an inverted structure.
As an example, as shown in fig. 11, a photolithography etching process is first used to remove a portion of the quantum well layer 17 and a portion of the P-type epitaxial layer 18 to expose the N-type epitaxial layer 15 to form a step structure, and then an N electrode 192 is formed on the surface of the N-type epitaxial layer 15; meanwhile, a P electrode 191 is formed on the surface of P type epitaxial layer 18 to form a normal mounting structure.
The epitaxial growth window is protected by the manufacturing process, and cannot be corroded and polluted by etching gas or polymer in the dry etching process, so that the subsequent epitaxial layer is easier to grow, the growth process window is larger, the industrial production can be realized, and the protective layer plays a relevant role in the subsequent high-quality epitaxial growth. Meanwhile, the protruding structure on the growth substrate can enable the crystal quality of the epitaxial layer formed on the surface of the composite substrate in the lateral growth direction to be better, and the light-emitting rate of the semiconductor device formed on the surface of the composite substrate can be improved due to the refractive index difference between the layers of the semiconductor medium film layer with the multilayer structure or the refractive index difference between the semiconductor medium film layer and the GaN layer in the semiconductor device formed on the surface of the composite substrate.
Example two
The present embodiment adopts a similar technical means as the first embodiment, except that, as shown in fig. 12, the semiconductor dielectric film layer is formed by periodically stacking SiO2 and Si3N4, that is, in step S2, a SiO2 layer 231 is deposited on the upper surface of the protection layer 22, a Si3N4 layer 232 is deposited on the upper surface of the SiO2 layer 231, a SiO2 layer 231 is deposited on the surface of the Si3N4 layer 232, and a Si3N4 layer 232 is deposited on the surface of the SiO2 layer 231, so as to form the semiconductor dielectric film layer 23 having a four-layer structure. The other steps are the same as those of the first embodiment. According to the composite substrate and the semiconductor device prepared by the embodiment, the semiconductor dielectric film layer has a multilayer structure, so that the semiconductor dielectric film layer has a better reflection effect and higher light extraction efficiency.
EXAMPLE III
This embodiment adopts similar technical means as the first embodiment, except that in steps S4 and S5, the semiconductor dielectric film layer 33 is patterned by photolithography and dry etching process, and the exposed protective layer 32 is removed by wet etching process, so as to obtain the protruding structures 33' periodically distributed at intervals on the surface of the growth substrate 31, as shown in fig. 13. The protruding structure 33' of this embodiment is a square column, and its top view is shown in fig. 14. Other processing methods and structures adopted in this embodiment are the same as those in the first embodiment, and the structure of the finally obtained semiconductor device is shown in fig. 15. The composite substrate and the semiconductor device prepared by the embodiment can also obtain the LED chip with improved light extraction rate.
To sum up, the utility model provides a semiconductor device's structure forms the protective layer through earlier on the growth substrate upper surface, then forms semiconductor medium rete on the protective layer surface, adopts dry etching process graphical semiconductor medium rete again, adopts wet etching process to get rid of the protective layer that exposes, forms periodic interval distribution's protruding structure at the growth substrate surface. In the composite substrate, the protective layer plays a role in protecting the growth substrate, so that the substrate crystal is not polluted by etching gas or polymer in a dry etching process, a clean and smooth growth window is provided for subsequent epitaxial growth, and industrial mass production can be realized; and simultaneously, the utility model discloses a protruding structure of periodic interval distribution on the composite substrate can be so that the crystal quality of epitaxial layer side direction growth that forms at the composite substrate surface is better, moreover, because protruding structure includes the semiconductor medium rete of one deck or multilayer structure, the refractive index difference that exists between each layer of semiconductor medium rete or the refractive index difference that the GaN layer exists in the semiconductor device that the composite substrate surface formed of semiconductor medium rete and, can improve the light-emitting rate at the semiconductor device that the composite substrate surface formed.
The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (6)

1. a semiconductor device, characterized in that the semiconductor device comprises:
A composite substrate, the composite substrate comprising: growing a substrate; the protruding structures are periodically distributed on the upper surface of the growth substrate at intervals and comprise metal layers or metal oxide layer protection layers in contact with the growth substrate and semiconductor medium film layers positioned on the protection layers;
The nitride buffer layer is positioned on the upper surface of the composite substrate and completely covers the protruding structures and the growth substrate exposed between the protruding structures;
The epitaxial transition layer is positioned on the surface of the nitride buffer layer and completely fills the gaps among the raised structures;
the N-type epitaxial layer is positioned on the surface of the epitaxial transition layer;
The quantum well layer is positioned on the surface of the N-type epitaxial layer;
The P-type epitaxial layer is positioned on the surface of the quantum well layer;
And the P electrode and the N electrode are respectively used for electrically leading out the P type epitaxial layer and the N type epitaxial layer.
2. The semiconductor device according to claim 1, wherein the structure of the semiconductor device is a face-up structure, a flip-chip structure, or a vertical structure.
3. the semiconductor device according to claim 1, wherein a material of the metal layer or the metal oxide layer protective layer comprises nickel (Ni), titanium (Ti), titanium oxide (TiOx), or Indium Tin Oxide (ITO).
4. The semiconductor device according to claim 1, wherein the metal layer or metal oxide layer protective layer has a thickness of
5. The semiconductor device according to claim 1, wherein the material of the growth substrate comprises Al2O3, SiC, Si, ZnO, GaN.
6. the semiconductor device of claim 1, wherein the shape of the raised structure comprises a cylinder, a square column, a cone, or a yurt.
CN201920283086.1U 2019-03-06 2019-03-06 Semiconductor device with a plurality of transistors Active CN209747453U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109872945A (en) * 2019-03-06 2019-06-11 上海芯元基半导体科技有限公司 A kind of compound substrate, semiconductor devices and its manufacturing method
CN113316853A (en) * 2020-12-25 2021-08-27 福建晶安光电有限公司 Patterned substrate, light-emitting diode and preparation method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109872945A (en) * 2019-03-06 2019-06-11 上海芯元基半导体科技有限公司 A kind of compound substrate, semiconductor devices and its manufacturing method
CN113316853A (en) * 2020-12-25 2021-08-27 福建晶安光电有限公司 Patterned substrate, light-emitting diode and preparation method
WO2022134009A1 (en) * 2020-12-25 2022-06-30 福建晶安光电有限公司 Patterned substrate, light-emitting diode and preparation method

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