CN207637784U - A kind of bonding wire fixed engagement semiconductor package - Google Patents

A kind of bonding wire fixed engagement semiconductor package Download PDF

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Publication number
CN207637784U
CN207637784U CN201720990887.2U CN201720990887U CN207637784U CN 207637784 U CN207637784 U CN 207637784U CN 201720990887 U CN201720990887 U CN 201720990887U CN 207637784 U CN207637784 U CN 207637784U
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CN
China
Prior art keywords
joint sheet
chip
bonding wire
substrate
bonding
Prior art date
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Active
Application number
CN201720990887.2U
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Chinese (zh)
Inventor
柯志强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangmen City Dslol Optical Electronc Lighting Co Ltd
Original Assignee
Jiangmen City Dslol Optical Electronc Lighting Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Jiangmen City Dslol Optical Electronc Lighting Co Ltd filed Critical Jiangmen City Dslol Optical Electronc Lighting Co Ltd
Priority to CN201720990887.2U priority Critical patent/CN207637784U/en
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Publication of CN207637784U publication Critical patent/CN207637784U/en
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385Shape, e.g. interlocking features

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  • Wire Bonding (AREA)

Abstract

The utility model discloses a kind of bonding wire fixed engagement semiconductor package, including substrate, die bond on substrate chip, be set to the first joint sheet on chip positioned at chip both ends and the second bonding pad, the third joint sheet for being located on substrate the setting of two side position of chip and the 4th bonding pad, realize the bonding wire that the first joint sheet connect with third joint sheet and the second joint sheet and the 4th joint sheet connect;First, second, third and fourth joint sheet is equipped with the inverted T shaped groove of invagination, and bonding wire includes a linear portion and both ends are block portion, and the block portion of bonding wire is pressed into inverted T-slot and forms secure bond;The bottom of each joint sheet is equipped with pillar, and the top surface of chip and substrate is set to the installation groove hole that interference fit is formed with pillar;Chip, which is fixed with substrate using mucigel, to be binded, and the position that substrate corresponds to chip bonding is equipped with tooth angle protrusion or tooth angle recess.

Description

A kind of bonding wire fixed engagement semiconductor package
Technical field
The utility model is related to a kind of semiconductor package more particularly to a kind of bonding wire fixed engagement semiconductor packages knots Structure.
Background technology
In the prior art, all universal real for the encapsulation field of the chips such as the encapsulation field of semiconductor, especially LED Use bonding wire(The connecting line of copper wire or gold thread)Realize that the connection conducting of chip and substrate connects electric effect.Traditional bonding wire with The connection of chip or substrate is all to make bonding wire end and core by semiconductor packages bonding equipment or semiconductor packages bonding equipment etc. The jointing end face of piece or substrate forms engagement;When engagement, the end of bonding wire is deformed its joint surface through pressure and increases, and then passes through Special vibratory process makes the end of bonding wire and the jointing end face of chip or substrate bind directly fixation.Due to chip or substrate Joint surface be planar structure, after bonding wire end is combined with the end face of planar structure, due to not certain position limiting structure or Other auxiliary fixing structures etc. can engage unstable situation with chip or substrate it is easy to appear bonding wire, and be produced after engagement Raw certain external force is also easily separated from when pullling bonding wire;Although having gradually appeared some now between bonding wire and jointing end face Increased bonding glue, adhesive layer or the fixation glue-line etc. for covering bonding wire and jointing end face binding site, but these glue-lines can only rise To engagement and order covering fixed function is reinforced, does not play strength fixed engagement or engagement locking, limiting dead effect, while not yet Has the effect that bonding wire cannot be pulled out or be detached from, effect and effect are limited, also need to be improved.
Invention content
The shortcomings that the purpose of this utility model is to overcome the above-mentioned prior arts and deficiency provide a kind of fixation of bonding wire and connect Semiconductor package is closed, which is equipped with invagination on the jointing end face of chip and substrate Inverted T-slot, when bonding wire end is engaged through pressure deformation and the operations such as vibratory process with jointing end face, bonding wire end quilt completely In indentation inverted T-slot and the space of inverted T-slot is filled up, after completing engagement, bonding wire end, that is, stuck cannot extract in inverted T-slot It falls off, forms strength and engage, do not fall off permanently;When firmly pullling bonding wire, its end of wire bond fracture can not extract;In addition, The covering and solidification for being aided with insulation protection glue are fixed, and the work of required insulation effect and stronger protection bonding wire end is further reached With;Joint sheet pillar and the cooperation of corresponding installation groove hole, realize the fixed installation of each joint sheet not loose or dislocation;Simultaneously in base Plate, which is equipped with tooth angle protrusion or tooth angle recess, can reinforce the fastness with mucigel, make chip also can stable connection with substrate.This The bonding wire encapsulation splicing results of bonding wire fixed engagement semiconductor package are strongly stablized, and not easily to fall off after engagement and connection is steady Fixed, structure is also relatively simple, the other good engagement fixed effects of energy, and yields is also high.
Technical solution adopted by the utility model to solve its technical problems is:A kind of bonding wire fixed engagement semiconductor packages Structure, including substrate, die bond on substrate chip, be set on chip be located at chip both ends the first joint sheet and the second knot Close pad, on substrate be located at two side position of chip setting third joint sheet and the 4th bonding pad, realize the first joint sheet and Third joint sheet connects and the bonding wire of the second joint sheet and the connection of the 4th joint sheet;First, second, third and fourth joint sheet It is equipped with the inverted T shaped groove of invagination, bonding wire includes a linear portion and both ends are block portion, and the block portion of bonding wire is pressed into inverted T-slot And form secure bond;The bottom of each joint sheet is equipped with pillar, and the top surface of chip and substrate is set to and pillar forms interference The installation groove hole of cooperation;Chip, which is fixed with substrate using mucigel, to be binded, and the position that substrate corresponds to chip bonding is equipped with tooth angle Protrusion or tooth angle recess.
Further, the chip top surface is equipped with the first joint sheet of covering, the second joint sheet, bonding wire and the first joint sheet With the insulation protection glue of the second joint sheet secure bond position.
Further, the top surface of chip is completely covered in the insulation protection glue.
Further, the substrate surface coats matcoveredn.
In conclusion jointing end face of the bonding wire fixed engagement semiconductor package of the utility model in chip and substrate It is equipped with the inverted T-slot of invagination, when bonding wire end is engaged through operations such as pressure deformations and vibratory process with jointing end face, bonding wire End is pressed into inverted T-slot and fills up the space of inverted T-slot, after completing engagement, bonding wire end, that is, stuck in inverted T-slot completely Interior cannot extract falls off, and forms strength and engages, does not fall off permanently;When firmly pullling bonding wire, its end of wire bond fracture can not It extracts;In addition, being aided with covering and the solidification fixation of insulation protection glue, further reach required insulation effect and stronger protection weldering The effect of thread end;Joint sheet pillar and the cooperation of corresponding installation groove hole, it is de- to realize that the fixed installation of each joint sheet does not loosen It falls;The fastness with mucigel can be reinforced by being equipped with tooth angle protrusion or tooth angle recess on substrate simultaneously, and chip is made also with substrate Stable connection.The bonding wire encapsulation splicing results of this bonding wire fixed engagement semiconductor package are strongly stablized, and are not easy after engagement Fall off and stable connection, structure is also relatively simple, can other good engagement fixed effects, yields is also high.
Description of the drawings
The utility model is described in further detail with reference to the accompanying drawings and examples:
Fig. 1 is a kind of structure diagrammatic cross-sectional view of bonding wire fixed engagement semiconductor package of the present embodiment 1;
Fig. 2 is the structural schematic diagram of substrate;
Fig. 3 is the structural schematic diagram of joint sheet;
Fig. 4 is the structural schematic diagram of bonding wire;
Fig. 5 is the structural schematic diagram of chip;
Identical component uses identical label in figure.
Specific implementation mode
Embodiment 1
A kind of bonding wire fixed engagement semiconductor package described in the present embodiment 1, as shown in Figure 1, Figure 2, Fig. 3, Fig. 4 and figure Shown in 5, including substrate 1, die bond on substrate chip 2, be set to the first joint sheet 3 and the on chip positioned at chip both ends Two bonding pads 4, the third joint sheet 5 that the setting of two side position of chip is located on substrate and the 4th bonding pad 6 realize that first connects Close the bonding wire 16 that pad is connected with third joint sheet and the second joint sheet and the 4th joint sheet connect;First, second, third and Four joint sheets are equipped with the inverted T shaped groove 7 of invagination, and bonding wire includes a linear portion 8 and both ends are block portion 9, the block portion pressure of bonding wire Enter in inverted T-slot and forms secure bond;The bottom of each joint sheet is equipped with pillar 10, the top surface of chip and substrate be set to Pillar forms the installation groove hole 11 of interference fit;Chip, which is fixed with substrate using mucigel 12, to be binded, and it is glutinous that substrate corresponds to chip The position of conjunction is equipped with tooth angle protrusion 13.
The chip top surface is equipped with the first joint sheet of covering, the second joint sheet, bonding wire and the first joint sheet and the second joint sheet The insulation protection glue 14 of secure bond position.
The top surface of chip is completely covered in the insulation protection glue.
The substrate surface coats matcoveredn 15.
The above descriptions are merely preferred embodiments of the present invention, not makees to the structure of the utility model any Formal limitation.It is any simple modification made by the above technical examples according to the technical essence of the present invention, equivalent Variation and modification, in the range of still falling within the technical solution of the utility model.

Claims (4)

1. a kind of bonding wire fixed engagement semiconductor package, which is characterized in that including substrate, die bond on substrate chip, It is set to the first joint sheet and the second bonding pad on chip positioned at chip both ends, set positioned at two side position of chip on substrate The third joint sheet and the 4th bonding pad set realize that the first joint sheet connects and the second joint sheet and the 4th with third joint sheet The bonding wire of joint sheet connection;First, second, third and fourth joint sheet is equipped with the inverted T shaped groove of invagination, and bonding wire includes one linear Portion and both ends are block portion, and the block portion indentation inverted T-slot of bonding wire is interior and forms secure bond;The bottom of each joint sheet is equipped with The top surface of pillar, chip and substrate is set to the installation groove hole that interference fit is formed with pillar;Chip uses viscose with substrate The fixed bonding of layer, the position that substrate corresponds to chip bonding are equipped with tooth angle protrusion or tooth angle recess.
2. a kind of bonding wire fixed engagement semiconductor package according to claim 1, which is characterized in that the chip Top surface is equipped with the first joint sheet of covering, the second joint sheet, bonding wire and the first joint sheet and the second joint sheet secure bond position Insulation protection glue.
3. a kind of bonding wire fixed engagement semiconductor package according to claim 2, which is characterized in that the insulation The top surface of chip is completely covered in Protection glue.
4. a kind of bonding wire fixed engagement semiconductor package according to claim 3, which is characterized in that the substrate Surface coats matcoveredn.
CN201720990887.2U 2017-08-09 2017-08-09 A kind of bonding wire fixed engagement semiconductor package Active CN207637784U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720990887.2U CN207637784U (en) 2017-08-09 2017-08-09 A kind of bonding wire fixed engagement semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720990887.2U CN207637784U (en) 2017-08-09 2017-08-09 A kind of bonding wire fixed engagement semiconductor package

Publications (1)

Publication Number Publication Date
CN207637784U true CN207637784U (en) 2018-07-20

Family

ID=62861746

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201720990887.2U Active CN207637784U (en) 2017-08-09 2017-08-09 A kind of bonding wire fixed engagement semiconductor package

Country Status (1)

Country Link
CN (1) CN207637784U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112117268A (en) * 2020-09-25 2020-12-22 中科芯(苏州)微电子科技有限公司 Chip integrated module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112117268A (en) * 2020-09-25 2020-12-22 中科芯(苏州)微电子科技有限公司 Chip integrated module
WO2022062387A1 (en) * 2020-09-25 2022-03-31 中科芯(苏州)微电子科技有限公司 Chip integrated module
CN112117268B (en) * 2020-09-25 2023-02-10 中科芯(苏州)微电子科技有限公司 Chip integrated module

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