CN207572355U - 半导体封装 - Google Patents

半导体封装 Download PDF

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CN207572355U
CN207572355U CN201721370958.5U CN201721370958U CN207572355U CN 207572355 U CN207572355 U CN 207572355U CN 201721370958 U CN201721370958 U CN 201721370958U CN 207572355 U CN207572355 U CN 207572355U
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shell
couple
substrate
semiconductor packages
glass cover
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谢有德
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Semiconductor Components Industries LLC
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Abstract

本公开涉及半导体封装。要解决的一个技术问题是提供改进的半导体封装。所述半导体封装的具体实施可包括：耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；通过粘合剂耦接在所述两个或更多个管芯上方的玻璃盖；以及包括一个或多个侧以及底部开口和顶部开口的外壳；其中所述衬底在所述底部开口处耦接到所述外壳，并且所述玻璃盖在所述顶部开口处耦接在所述外壳下方；以及其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。通过本实用新型，可以实现改进的半导体封装。

Description

半导体封装
本申请是申请日为2017年3月2日、申请号为201720193682.1、实用新型名称为“半导体封装”的实用新型申请的分案申请。
技术领域
本文件的各方面整体涉及其中的管芯具有感测区域的半导体封装。更具体的实施方式涉及具有图像传感器的板上芯片封装。
背景技术
为了密封半导体封装，通常使用液体密封(LE)或模塑。LE覆盖并保护连接器免受机械损坏，并且保护玻璃盖和管芯耦接在一起的区域免于受湿。
实用新型内容
本实用新型要解决的一个技术问题是提供改进的半导体封装。
根据本实用新型的一个方面，提供了一种半导体封装，该半导体封装包括：耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；通过粘合剂耦接在所述两个或更多个管芯上方的玻璃盖；以及包括一个或多个侧以及底部开口和顶部开口的外壳；其中所述衬底在所述底部开口处耦接到所述外壳，并且所述玻璃盖在所述顶部开口处耦接在所述外壳下方；以及其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。
在一个实施例中，所述衬底是球栅阵列衬底。
在一个实施例中，所述外壳由不透明材料制成。
在一个实施例中，所述外壳通过注射模塑、传递模塑和它们的任意组合形成。
在一个实施例中，多个球座耦接到与所述衬底耦接到所述管芯的一侧相对的所述衬底的第二侧。
在一个实施例中，一个或多个透镜在所述玻璃盖的光通道中耦接到所述外壳。
根据本实用新型的另一方面，提供了一种半导体封装，该半导体封装包括：耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；通过粘合剂耦接在两个或更多个管芯上方的玻璃盖；以及包括一个或多个侧以及底部开口和顶部开口的外壳；其中当所述玻璃盖在所述顶部开口处耦接在所述外壳下方时，所述衬底在所述底部开口处同时耦接到所述外壳；以及其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。
根据本实用新型的又另一方面，提供了一种半导体封装，该半导体封装包括：耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；通过粘合剂耦接在所述两个或更多个管芯上方的玻璃盖；以及包括一个或多个侧以及底部开口和顶部开口的外壳；其中当所述玻璃盖使用粘合剂在所述顶部开口处耦接在所述外壳下方时，所述衬底在所述底部开口处同时耦接到所述外壳；以及其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。
本实用新型的一个有益技术效果是提供改进的半导体封装。
对于本领域的普通技术人员而言，通过具体实施方式以及附图并通过权利要求书，上述以及其他方面、特征和优点将会显而易见。
附图说明
将在下文中结合附图来描述各实施方式，其中类似标号表示类似元件，并且：
图1是常规互补金属氧化物半导体(CMOS)图像传感器(CIS)球栅阵列封装的分解视图；
图2是具有外壳的半导体封装的实施方式的侧视图；
图3是具有外壳的半导体封装的另一种实施方式的侧视图；
图4是具有外壳的半导体封装的另一种实施方式的侧视图，其中该外壳具有光学封装附件；
图5A至图5D示出了用于制造具有外壳的半导体封装的方法的实施方式的各个步骤的封装实施方式；
图6A至图6D示出了用于制造具有外壳的半导体封装的方法的另一种实施方式的各种步骤的封装实施方式。
具体实施方式
本公开、其各方面以及实施方式并不限于本文所公开的具体部件、组装工序或方法元素。显而易见的是，本领域已知的符合预期半导体外壳封装的许多其他部件、组装工序和/或方法元素能与本公开的特定实施方式一起使用。因此，例如，尽管本实用新型公开了具体实施方式，但是此类实施方式和实施组件可包括符合预期操作和方法的本领域已知用于此类半导体外壳封装以及实施组件和方法的任何形状、尺寸、样式、类型、模型、版本、量度、浓度、材料、数量、方法元素、步骤等。
图1示出了具有引线接合4和液体密封6的常规半导体封装2。液体密封6覆盖并保护引线接合4区域免受机械损坏。常规封装的主要缺点是液体密封树脂和衬底的热膨胀系数(CTE)之间存在不匹配。该CTE不匹配可在温度循环测试期间引起热应力，并降低封装的可靠性。
参见图2，示出了具有外壳20的半导体封装8的实施方式。在此，衬底10通过粘合剂13耦接到管芯12，并耦接到一个或多个连接器14。连接器14可包括由任何导电材料(焊线等)制成的引线。玻璃盖16通过粘合剂18耦接到管芯12。玻璃盖位于管芯12的感测区域19上方，并且粘合剂18在非感测区域上/在非感测区域处耦接到管芯12。外壳20具有一个或多个侧、一个底部开口和一个顶部开口。外壳20的底部开口机械地耦接到衬底10。玻璃盖16在顶部开口处耦接在外壳20下方。半导体封装8上位于液体密封(图1)上方的外壳20的一个特征是外壳20不接触连接器14。该外壳和连接器14之间的接触可导致与引线连接器发生引线疲劳。另一个特征是液体密封化合物和管芯之间不存在热能系数不匹配，因为外壳和管芯之间只有空气或气体(或者在各种实施方式中为真空)，这限制了在温度周期变化时对连接器造成任何损坏。
参见图3，示出了半导体封装外壳22的另一种实施方式。衬底24通过粘合剂27耦接到管芯26(第一管芯)，并耦接到一个或多个连接器28。作为非限制性实例，管芯26可以是系统内编程(ISP)管芯。模塑化合物/液体密封剂30密封管芯26和连接器28。模塑30围绕管芯26和连接器28呈平坦状，以使得能够将附加管芯32(第二管芯)耦接到半导体封装22。附加管芯32通过一个或多个连接器34电耦接到衬底24。作为非限制性示例，附加管芯32可以是接触图像传感器(CIS)管芯。附加管芯32还可通过粘合剂直接耦接到管芯26的表面。玻璃盖36通过粘合剂38耦接到附加管芯32。玻璃盖36位于附加管芯32的感测区域37上方，并且粘合剂38耦接到附加管芯32的非感测区域/在非感测区域处。外壳40在外壳40的底部开口处耦接到衬底24，并且通过粘合剂在外壳40的顶部开口处耦接到玻璃盖36上方。
参见图4，示出了具有外壳54的半导体封装42的另一实施方式，该外壳附接有光学封装/单元/组件56。衬底44通过粘合剂47耦接到管芯46，并且耦接到连接器48。玻璃盖50通过粘合剂52耦接到管芯46。玻璃盖50设置在管芯46的感测区域53上方，并且粘合剂52耦接到管芯46的非感测区域53。衬底44在底部开口处耦接到外壳54。玻璃盖50在顶部开口处耦接在外壳54下方。外壳54的平坦结构允许将光学封装56的外壳耦接到半导体封装42。具有透镜外壳58和一个或多个透镜60的光学封装56可在玻璃盖50的光通道中耦接到半导体封装42的外壳54。虽然在所示实施方式中，一个或多个透镜60位于管芯46的感测区域53正上方的光通道中，但是在其他实施方式中，它们可不在感测区域53的正上方，而是可位于其他位置，但是仍然通过使用其他反射镜、透镜等位于光通道中。
参见图5A至图5D，其示出了制造类似于本文中所公开的半导体封装的半导体封装的方法的实施方式。图5A示出了衬底62。作为非限制性实例，衬底62可以是具有通过多个层连接到球栅阵列的迹线的多层衬底，但是在其他实施方式中可使用不包括球栅阵列的单层衬底(如焊盘栅格阵列衬底)。图5B示出了通过粘合剂68和一个或多个连接器66将一个或多个管芯64耦接到衬底62，并将该管芯电耦合到衬底62。图5C示出了使用粘合剂72将玻璃盖70耦接到管芯64。玻璃盖70耦接在管芯64的感测区域74上方。粘合剂72被耦接到管芯64的非感测区域。作为非限制性实例，管芯64的感测区域74可以是像素阵列或发光二极管(LED)的有源区域。在此类LED实施方式中，感测区域变成主动发射光的有源区域。图5D示出了将外壳76耦接到半导体封装78。在该工艺中，外壳76通过粘合剂在该外壳76的底部开口处耦接到衬底62，同时在外壳76的顶部开口处耦接在玻璃盖68上方。在各种实施方式中，外壳76可由不透明材料制成，但在其他实施方式中也可由半透明或透明材料制成。外壳76可通过注射模塑、传递模塑和它们的任意组合中的一种方式形成。在各种实施方式中，球栅阵列79可耦接到衬底62的相对侧，其中外壳76耦接到该衬底62。
参见图6A至图6D，示出了用于制造类似于本文所公开的半导体封装的半导体封装的方法的另一实施方式。图6A示出了利用粘合剂84和连接器86将管芯80机械耦合和电耦合到衬底82。图6B示出了用模塑化合物88密封连接器86和管芯80的至少一部分。作为非限制性实例，可使用热定型(热固性)聚合物材料通过传递模塑工艺来添加模塑品，以使CTE失配降到最低。这种聚合物材料还可具有期望的物理性能和机械性能，可有助于实现封装良好的可靠性性能。图6C示出了将附加管芯90耦接到一个或多个管芯80中的一个，并且利用一个或多个连接器92将附加管芯90电耦合到衬底82。
图6D示出了使用粘合剂96将玻璃盖94耦接到附加管芯90。玻璃盖94设置在附加管芯90的感测区域98上方。粘合剂96耦接到附加管芯90的非感测区域。然后，外壳100通过粘合剂在该外壳100的底部开口处耦接到衬底82，同时在外壳100的顶部开口处耦接在玻璃盖94上方。外壳100不接触连接器92。球栅阵列102可耦接到衬底82。在该实施方案中，附加管芯90可以是如本文档中所公开的任何LED或图像传感器。
根据本实用新型的一个方面，提供了一种半导体封装，所述半导体封装的具体实施可包括：耦接到一个或多个管芯和一个或多个连接器的衬底；通过粘合剂耦接在一个或多个管芯上方的玻璃盖；以及包括一个或多个侧、一个底部开口和一个顶部开口的外壳。衬底可在底部开口处耦接到外壳，并且玻璃盖可在顶部开口处耦接在外壳下方。
在一个实施例中，衬底可以是球栅阵列衬底。
在一个实施例中，一个或多个管芯可彼此堆叠。
在一个实施例中，模塑化合物可密封一个或多个管芯中的一个的至少一部分或者一个或多个连接器中的至少一个。
在一个实施例中，外壳可由不透明材料制成。
在一个实施例中，外壳可通过注射模塑、传递模塑或这两种模塑方法的任意组合形成。
在一个实施例中，多个球座可被耦接到衬底的第二侧，该第二侧与衬底耦接到管芯的一侧相对。
在一个实施例中，一个或多个透镜可在玻璃盖的光通道中耦接到外壳。
根据本实用新型的另一个方面，提供了一种半导体封装，所述半导体封装的具体实施可包括：耦接到一个或多个管芯和一个或多个连接器的衬底；通过粘合剂耦接在一个或多个管芯上方的玻璃盖；以及包括一个或多个侧以及底部开口和顶部开口的外壳；其中当所述玻璃盖在所述顶部开口处耦接在所述外壳下方时，所述衬底在所述底部开口处同时耦接到所述外壳。
根据本实用新型的又另一个方面，提供了一种半导体封装，所述半导体封装的具体实施可包括：耦接到一个或多个管芯和一个或多个连接器的衬底；通过粘合剂耦接在一个或多个管芯上方的玻璃盖；以及包括一个或多个侧以及底部开口和顶部开口的外壳；其中当所述玻璃盖通过粘合剂在所述顶部开口处耦接在所述外壳下方时，所述衬底在所述底部开口处同时耦接到所述外壳。
半导体封装的实施方式可通过一种制造半导体封装的方法的实施方式来制造。该方法可包括提供衬底并将一个或多个管芯耦接到衬底。该方法还可包括使用一个或多个连接器将管芯电耦接到衬底。该方法还可包括使用粘合剂将玻璃盖耦接到一个或多个管芯。该方法还可包括在外壳的底部开口处将外壳耦接到衬底的同时，使用粘合剂在外壳的顶部开口处将外壳耦接到玻璃盖上方。
一种制造半导体封装的方法的实施方式可包括以下各项中的一项、全部或任一项：
衬底可以是球栅阵列衬底。
外壳可由不透明材料制成。
外壳可通过注射模塑、传递模塑或这两种模塑方法的任意组合形成。
多个球座可被耦接到衬底的第二侧，该第二侧与衬底耦接到管芯的一侧相对。
一个或多个透镜可在玻璃盖的光通道中耦接到外壳。
可使用制造半导体封装的方法的另一种实施方式来制造本文所公开的半导体封装的实施方式。该方法可包括提供衬底，将一个或多个管芯耦接到衬底，以及使用一个或多个连接器将管芯电耦接到衬底。该方法还可包括使用模塑化合物密封一个或多个连接器，以及一个或多个管芯中的一个的至少一部分。该方法还可包括将附加管芯耦接到一个或多个管芯中的一个。该方法还可包括利用一个或多个连接器将附加管芯电耦接到衬底。该方法还可包括使用粘合剂将玻璃盖耦接到附加管芯。该方法还可包括在外壳的底部开口处将外壳耦接到衬底的同时，使用粘合剂在外壳的顶部处将外壳耦接到玻璃盖上方。
一种制造半导体封装的方法的实施方式可包括以下各项中的一项、全部或任一项：
衬底可以是球栅阵列衬底。
外壳可由不透明材料制成。
外壳可通过注射模塑、传递模塑中的一种或这两种模塑方法的任意组合形成。
多个球座可被耦接到衬底的第二侧，该第二侧与衬底耦接到管芯的一侧相对。
一个或多个透镜可在玻璃盖的光通道中耦接到外壳。
在以上描述中提到具有外壳的半导体封装具体实施方式以及实施组件、子组件、方法和子方法的地方，应当显而易见的是，可在不脱离其实质的情况下作出多种修改，并且这些实施方式、实施组件、子组件、方法和子方法可应用于其他半导体封装系统。

Claims (8)

1.一种半导体封装，其特征在于：
耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；
通过粘合剂耦接在所述两个或更多个管芯上方的玻璃盖；以及
包括一个或多个侧以及底部开口和顶部开口的外壳；
其中所述衬底在所述底部开口处耦接到所述外壳，并且所述玻璃盖在所述顶部开口处耦接在所述外壳下方；以及
其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。
2.根据权利要求1所述的半导体封装，其中所述衬底是球栅阵列衬底。
3.根据权利要求1所述的半导体封装，其中所述外壳由不透明材料制成。
4.根据权利要求1所述的半导体封装，其中所述外壳通过注射模塑、传递模塑和它们的任意组合形成。
5.根据权利要求1所述的半导体封装，其中多个球座耦接到与所述衬底耦接到所述两个或更多个管芯的一侧相对的所述衬底的第二侧。
6.根据权利要求1所述的半导体封装，其中一个或多个透镜在所述玻璃盖的光通道中耦接到所述外壳。
7.一种半导体封装，其特征在于：
耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；
通过粘合剂耦接在两个或更多个管芯上方的玻璃盖；以及
包括一个或多个侧以及底部开口和顶部开口的外壳；
其中当所述玻璃盖在所述顶部开口处耦接在所述外壳下方时，所述衬底在所述底部开口处同时耦接到所述外壳；以及
其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。
8.一种半导体封装，其特征在于：
耦接到彼此堆叠的两个或更多个管芯以及耦接到一个或多个连接器的衬底；
通过粘合剂耦接在所述两个或更多个管芯上方的玻璃盖；以及
包括一个或多个侧以及底部开口和顶部开口的外壳；
其中当所述玻璃盖使用粘合剂在所述顶部开口处耦接在所述外壳下方时，所述衬底在所述底部开口处同时耦接到所述外壳；以及
其中模塑化合物至少密封所述两个或更多个管芯中的一个管芯的一部分以及所述一个或多个连接器中的至少一个连接器。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030042587A1 (en) * 2001-08-31 2003-03-06 Tsung-Jen Lee IC packaging and manufacturing methods
EP1357606A1 (en) * 2002-04-22 2003-10-29 Scientek Corporation Image sensor semiconductor package
US6906403B2 (en) * 2002-06-04 2005-06-14 Micron Technology, Inc. Sealed electronic device packages with transparent coverings
JP4233535B2 (ja) * 2005-03-29 2009-03-04 シャープ株式会社 光学装置用モジュール、光路画定器及び光学装置用モジュールの製造方法
US7576401B1 (en) * 2005-07-07 2009-08-18 Amkor Technology, Inc. Direct glass attached on die optical module
JP2007142042A (ja) * 2005-11-16 2007-06-07 Sharp Corp 半導体パッケージとその製造方法，半導体モジュール，および電子機器
JP4160083B2 (ja) * 2006-04-11 2008-10-01 シャープ株式会社 光学装置用モジュール及び光学装置用モジュールの製造方法
US7423335B2 (en) * 2006-12-29 2008-09-09 Advanced Chip Engineering Technology Inc. Sensor module package structure and method of the same
US7964945B2 (en) * 2007-09-28 2011-06-21 Samsung Electro-Mechanics Co., Ltd. Glass cap molding package, manufacturing method thereof and camera module
US9543282B2 (en) * 2013-11-18 2017-01-10 Stmicroelectronics Pte Ltd. Optical sensor package

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US20190096938A1 (en) 2019-03-28
CN206672913U (zh) 2017-11-24

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