CN206672913U - 半导体封装 - Google Patents
半导体封装 Download PDFInfo
- Publication number
- CN206672913U CN206672913U CN201720193682.1U CN201720193682U CN206672913U CN 206672913 U CN206672913 U CN 206672913U CN 201720193682 U CN201720193682 U CN 201720193682U CN 206672913 U CN206672913 U CN 206672913U
- Authority
- CN
- China
- Prior art keywords
- shell
- semiconductor packages
- couple
- substrate
- glass cover
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 58
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 239000011521 glass Substances 0.000 claims abstract description 39
- 239000000853 adhesive Substances 0.000 claims abstract description 30
- 230000001070 adhesive effect Effects 0.000 claims abstract description 30
- 238000000465 moulding Methods 0.000 claims description 10
- 230000003287 optical effect Effects 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 150000001875 compounds Chemical class 0.000 claims description 6
- 238000001746 injection moulding Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 description 32
- 238000005538 encapsulation Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 7
- UQMRAFJOBWOFNS-UHFFFAOYSA-N butyl 2-(2,4-dichlorophenoxy)acetate Chemical compound CCCCOC(=O)COC1=CC=C(Cl)C=C1Cl UQMRAFJOBWOFNS-UHFFFAOYSA-N 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000003384 imaging method Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14618—Containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14634—Assemblies, i.e. Hybrid structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14678—Contact-type imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/1469—Assemblies, i.e. hybrid integration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16151—Cap comprising an aperture, e.g. for pressure control, encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Abstract
本公开涉及半导体封装。要解决的一个技术问题是提供改进的半导体封装。所述半导体封装的具体实施可包括:耦接到一个或多个管芯和一个或多个连接器的衬底;通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及包括一个或多个侧和底部开口和顶部开口的外壳。所述衬底可在所述底部开口处耦接到所述外壳,并且所述玻璃盖可在所述顶部开口处耦接在所述外壳下方。通过本实用新型,可以实现改进的半导体封装。
Description
技术领域
本文件的各方面整体涉及其中的管芯具有感测区域的半导体封装。更具体的实施方式涉及具有图像传感器的板上芯片封装。
背景技术
为了密封半导体封装,通常使用液体密封(LE)或模塑。LE覆盖并保护连接器免受机械损坏,并且保护玻璃盖和管芯耦接在一起的区域免于受湿。
实用新型内容
本实用新型要解决的一个技术问题是提供改进的半导体封装。
根据本实用新型的一个方面,提供了一种半导体封装,所述半导体封装的具体实施可包括:耦接到一个或多个管芯和一个或多个连接器的衬底;通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及包括一个或多个侧、一个底部开口和一个顶部开口的外壳。衬底可在底部开口处耦接到外壳,并且玻璃盖可在顶部开口处耦接在外壳下方。
在一个实施例中,衬底可以是球栅阵列衬底。
在一个实施例中,一个或多个管芯可彼此堆叠。
在一个实施例中,模塑化合物可密封一个或多个管芯中的一个的至少一部分或者一个或多个连接器中的至少一个。
在一个实施例中,外壳可由不透明材料制成。
在一个实施例中,外壳可通过注射模塑、传递模塑或这两种模塑方法的任意组合形成。
在一个实施例中,多个球座可被耦接到衬底的第二侧,该第二侧与衬底耦接到管芯的一侧相对。
在一个实施例中,一个或多个透镜可在玻璃盖的光通道中耦接到外壳。
根据本实用新型的另一个方面,提供了一种半导体封装,所述半导体封装的具体实施可包括:耦接到一个或多个管芯和一个或多个连接器的衬底;通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及包括一个或多个侧以及底部开口和顶部开口的外壳;其中当所述玻璃盖在所述顶部开口处耦接在所述外壳下方时,所述衬底在所述底部开口处同时耦接到所述外壳。
根据本实用新型的又另一个方面,提供了一种半导体封装,所述半导体封装的具体实施可包括:耦接到一个或多个管芯和一个或多个连接器的衬底;通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及包括一个或多个侧以及底部开口和顶部开口的外壳;其中当所述玻璃盖通过粘合剂在所述顶部开口处耦接在所述外壳下方时,所述衬底在所述底部开口处同时耦接到所述外壳。
本实用新型的一个有益技术效果是提供改进的半导体封装。
对于本领域的普通技术人员而言,通过具体实施方式以及附图并通过权利要求书,上述以及其他方面、特征和优点将会显而易见。
附图说明
将在下文中结合附图来描述各实施方式,其中类似标号表示类似元件,并且:
图1是常规互补金属氧化物半导体(CMOS)图像传感器(CIS)球栅阵列封装的分解视图;
图2是具有外壳的半导体封装的实施方式的侧视图;
图3是具有外壳的半导体封装的另一种实施方式的侧视图;
图4是具有外壳的半导体封装的另一种实施方式的侧视图,其中该外壳具有光学封装附件;
图5A至图5D示出了用于制造具有外壳的半导体封装的方法的实施方式的各个步骤的封装实施方式;
图6A至图6D示出了用于制造具有外壳的半导体封装的方法的另一种实施方式的各种步骤的封装实施方式。
具体实施方式
本公开、其各方面以及实施方式并不限于本文所公开的具体部件、组装工序或方法元素。显而易见的是,本领域已知的符合预期半导体外壳封装的许多其他部件、组装工序和/或方法元素能与本公开的特定实施方式一起使用。因此,例如,尽管本实用新型公开了具体实施方式,但是此类实施方式和实施组件可包括符合预期操作和方法的本领域已知用于此类半导体外壳封装以及实施组件和方法的任何形状、尺寸、样式、类型、模型、版本、量度、浓度、材料、数量、方法元素、步骤等。
图1示出了具有引线接合4和液体密封6的常规半导体封装2。液体密封6覆盖并保护引线接合4区域免受机械损坏。常规封装的主要缺点是液体密封树脂和衬底的热膨胀系数(CTE)之间存在不匹配。该CTE不匹配可在温度循环测试期间引起热应力,并降低封装的可靠性。
参见图2,示出了具有外壳20的半导体封装8的实施方式。在此,衬底10通过粘合剂13耦接到管芯12,并耦接到一个或多个连接器14。连接器14可包括由任何导电材料(焊线等)制成的引线。玻璃盖16通过粘合剂18耦接到管芯12。玻璃盖位于管芯12的感测区域19上方,并且粘合剂18在非感测区域上/在非感测区域处耦接到管芯12。外壳20具有一个或多个侧、一个底部开口和一个顶部开口。外壳20的底部开口机械地耦接到衬底10。玻璃盖16在顶部开口处耦接在外壳20下方。半导体封装8上位于液体密封(图1)上方的外壳20的一个特征是外壳20不接触连接器14。该外壳和连接器14之间的接触可导致与引线连接器发生引线疲劳。另一个特征是液体密封化合物和管芯之间不存在热能系数不匹配,因为外壳和管芯之间只有空气或气体(或者在各种实施方式中为真空),这限制了在温度周期变化时对连接器造成任何损坏。
参见图3,示出了半导体封装外壳22的另一种实施方式。衬底24通过粘合剂27耦接到管芯26(第一管芯),并耦接到一个或多个连接器28。作为非限制性实例,管芯26可以是系统内编程(ISP)管芯。模塑化合物/液体密封剂30密封管芯26和连接器28。模塑30围绕管芯26和连接器28呈平坦状,以使得能够将附加管芯32(第二管芯)耦接到半导体封装22。附加管芯32通过一个或多个连接器34电耦接到衬底24。作为非限制性示例,附加管芯32可以是接触图像传感器(CIS)管芯。附加管芯32还可通过粘合剂直接耦接到管芯26的表面。玻璃盖36通过粘合剂38耦接到附加管芯32。玻璃盖36位于附加管芯32的感测区域37上方,并且粘合剂38耦接到附加管芯32的非感测区域/在非感测区域处。外壳40在外壳40的底部开口处耦接到衬底24,并且通过粘合剂在外壳40的顶部开口处耦接到玻璃盖36上方。
参见图4,示出了具有外壳54的半导体封装42的另一实施方式,该外壳附接有光学封装/单元/组件56。衬底44通过粘合剂47耦接到管芯46,并且耦接到连接器48。玻璃盖50通过粘合剂52耦接到管芯46。玻璃盖50设置在管芯46的感测区域53上方,并且粘合剂52耦接到管芯46的非感测区域53。衬底44在底部开口处耦接到外壳54。玻璃盖50在顶部开口处耦接在外壳54下方。外壳54的平坦结构允许将光学封装56的外壳耦接到半导体封装42。具有透镜外壳58和一个或多个透镜60的光学封装56可在玻璃盖50的光通道中耦接到半导体封装42的外壳54。虽然在所示实施方式中,一个或多个透镜60位于管芯46的感测区域53正上方的光通道中,但是在其他实施方式中,它们可不在感测区域53的正上方,而是可位于其他位置,但是仍然通过使用其他反射镜、透镜等位于光通道中。
参见图5A至图5D,其示出了制造类似于本文中所公开的半导体封装的半导体封装的方法的实施方式。图5A示出了衬底62。作为非限制性实例,衬底62可以是具有通过多个层连接到球栅阵列的迹线的多层衬底,但是在其他实施方式中可使用不包括球栅阵列的单层衬底(如焊盘栅格阵列衬底)。图5B示出了通过粘合剂68和一个或多个连接器66将一个或多个管芯64耦接到衬底62,并将该管芯电耦合到衬底62。图5C示出了使用粘合剂72将玻璃盖70耦接到管芯64。玻璃盖70耦接在管芯64的感测区域74上方。粘合剂72被耦接到管芯64的非感测区域。作为非限制性实例,管芯64的感测区域74可以是像素阵列或发光二极管(LED)的有源区域。在此类LED实施方式中,感测区域变成主动发射光的有源区域。图5D示出了将外壳76耦接到半导体封装78。在该工艺中,外壳76通过粘合剂在该外壳76的底部开口处耦接到衬底62,同时在外壳76的顶部开口处耦接在玻璃盖68上方。在各种实施方式中,外壳76可由不透明材料制成,但在其他实施方式中也可由半透明或透明材料制成。外壳76可通过注射模塑、传递模塑和它们的任意组合中的一种方式形成。在各种实施方式中,球栅阵列79可耦接到衬底62的相对侧,其中外壳76耦接到该衬底62。
参见图6A至图6D,示出了用于制造类似于本文所公开的半导体封装的半导体封装的方法的另一实施方式。图6A示出了利用粘合剂84和连接器86将管芯80机械耦合和电耦合到衬底82。图6B示出了用模塑化合物88密封连接器86和管芯80的至少一部分。作为非限制性实例,可使用热定型(热固性)聚合物材料通过传递模塑工艺来添加模塑品,以使CTE失配降到最低。这种聚合物材料还可具有期望的物理性能和机械性能,可有助于实现封装良好的可靠性性能。图6C示出了将附加管芯90耦接到一个或多个管芯80中的一个,并且利用一个或多个连接器92将附加管芯90电耦合到衬底82。
图6D示出了使用粘合剂96将玻璃盖94耦接到附加管芯90。玻璃盖94设置在附加管芯90的感测区域98上方。粘合剂96耦接到附加管芯90的非感测区域。然后,外壳100通过粘合剂在该外壳100的底部开口处耦接到衬底82,同时在外壳100的顶部开口处耦接在玻璃盖94上方。外壳100不接触连接器92。球栅阵列102可耦接到衬底82。在该实施方案中,附加管芯90可以是如本文档中所公开的任何LED或图像传感器。
半导体封装的实施方式可通过一种制造半导体封装的方法的实施方式来制造。该方法可包括提供衬底并将一个或多个管芯耦接到衬底。该方法还可包括使用一个或多个连接器将管芯电耦接到衬底。该方法还可包括使用粘合剂将玻璃盖耦接到一个或多个管芯。该方法还可包括在外壳的底部开口处将外壳耦接到衬底的同时,使用粘合剂在外壳的顶部开口处将外壳耦接到玻璃盖上方。
一种制造半导体封装的方法的实施方式可包括以下各项中的一项、全部或任一项:
衬底可以是球栅阵列衬底。
外壳可由不透明材料制成。
外壳可通过注射模塑、传递模塑或这两种模塑方法的任意组合形成。
多个球座可被耦接到衬底的第二侧,该第二侧与衬底耦接到管芯的一侧相对。
一个或多个透镜可在玻璃盖的光通道中耦接到外壳。
可使用制造半导体封装的方法的另一种实施方式来制造本文所公开的半导体封装的实施方式。该方法可包括提供衬底,将一个或多个管芯耦接到衬底,以及使用一个或多个连接器将管芯电耦接到衬底。该方法还可包括使用模塑化合物密封一个或多个连接器,以及一个或多个管芯中的一个的至少一部分。该方法还可包括将附加管芯耦接到一个或多个管芯中的一个。该方法还可包括利用一个或多个连接器将附加管芯电耦接到衬底。该方法还可包括使用粘合剂将玻璃盖耦接到附加管芯。该方法还可包括在外壳的底部开口处将外壳耦接到衬底的同时,使用粘合剂在外壳的顶部处将外壳耦接到玻璃盖上方。
一种制造半导体封装的方法的实施方式可包括以下各项中的一项、全部或任一项:
衬底可以是球栅阵列衬底。
外壳可由不透明材料制成。
外壳可通过注射模塑、传递模塑中的一种或这两种模塑方法的任意组合形成。
多个球座可被耦接到衬底的第二侧,该第二侧与衬底耦接到管芯的一侧相对。
一个或多个透镜可在玻璃盖的光通道中耦接到外壳。
在以上描述中提到具有外壳的半导体封装具体实施方式以及实施组件、子组件、方法和子方法的地方,应当显而易见的是,可在不脱离其实质的情况下作出多种修改,并且这些实施方式、实施组件、子组件、方法和子方法可应用于其他半导体封装系统。
Claims (10)
1.一种半导体封装,其特征在于所述半导体封装包括:
耦接到一个或多个管芯和一个或多个连接器的衬底;
通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及
包括一个或多个侧以及底部开口和顶部开口的外壳;
其中所述衬底在所述底部开口处耦接到所述外壳,并且所述玻璃盖在所述顶部开口处耦接在所述外壳下方。
2.根据权利要求1所述的半导体封装,其中所述衬底是球栅阵列衬底。
3.根据权利要求1所述的半导体封装,其中所述一个或多个管芯彼此堆叠。
4.根据权利要求2所述的半导体封装,其中模塑化合物密封所述一个或多个管芯中一者的至少一部分,以及所述一个或多个连接器中的至少一个。
5.根据权利要求1所述的半导体封装,其中所述外壳由不透明材料制成。
6.根据权利要求1所述的半导体封装,其中所述外壳通过注射模塑、传递模塑和它们的任意组合形成。
7.根据权利要求1所述的半导体封装,其中多个球座耦接到与所述衬底耦接到所述管芯的一侧相对的所述衬底的第二侧。
8.根据权利要求1所述的半导体封装,其中一个或多个透镜在所述玻璃盖的光通道中耦接到所述外壳。
9.一种半导体封装,其特征在于所述半导体封装包括:
耦接到一个或多个管芯和一个或多个连接器的衬底;
通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及
包括一个或多个侧以及底部开口和顶部开口的外壳;
其中当所述玻璃盖在所述顶部开口处耦接在所述外壳下方时,所述衬底在所述底部开口处同时耦接到所述外壳。
10.一种半导体封装,其特征在于所述半导体封装包括:
耦接到一个或多个管芯和一个或多个连接器的衬底;
通过粘合剂耦接在一个或多个管芯上方的玻璃盖;以及
包括一个或多个侧以及底部开口和顶部开口的外壳;
其中当所述玻璃盖通过粘合剂在所述顶部开口处耦接在所述外壳下方时,所述衬底在所述底部开口处同时耦接到所述外壳。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201721370958.5U CN207572355U (zh) | 2016-03-02 | 2017-03-02 | 半导体封装 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662302227P | 2016-03-02 | 2016-03-02 | |
US62/302,227 | 2016-03-02 | ||
US15/175,226 US20170256576A1 (en) | 2016-03-02 | 2016-06-07 | High reliability housing for a semiconductor package |
US15/175,226 | 2016-06-07 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201721370958.5U Division CN207572355U (zh) | 2016-03-02 | 2017-03-02 | 半导体封装 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206672913U true CN206672913U (zh) | 2017-11-24 |
Family
ID=59723674
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201720193682.1U Active CN206672913U (zh) | 2016-03-02 | 2017-03-02 | 半导体封装 |
CN201721370958.5U Active CN207572355U (zh) | 2016-03-02 | 2017-03-02 | 半导体封装 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201721370958.5U Active CN207572355U (zh) | 2016-03-02 | 2017-03-02 | 半导体封装 |
Country Status (2)
Country | Link |
---|---|
US (3) | US20170256576A1 (zh) |
CN (2) | CN206672913U (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111146216A (zh) * | 2018-11-01 | 2020-05-12 | 半导体元件工业有限责任公司 | 半导体封装件和形成半导体封装件的方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108010931B (zh) * | 2017-12-28 | 2021-03-30 | 苏州晶方半导体科技股份有限公司 | 一种光学指纹芯片的封装结构以及封装方法 |
US10714454B2 (en) * | 2018-08-14 | 2020-07-14 | Semiconductor Components Industries, Llc | Stack packaging structure for an image sensor |
US11063078B2 (en) * | 2019-06-28 | 2021-07-13 | Semiconductor Components Industries, Llc | Anti-flare semiconductor packages and related methods |
KR20210027578A (ko) * | 2019-08-28 | 2021-03-11 | 삼성전자주식회사 | 반도체 패키지 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030042587A1 (en) * | 2001-08-31 | 2003-03-06 | Tsung-Jen Lee | IC packaging and manufacturing methods |
EP1357606A1 (en) * | 2002-04-22 | 2003-10-29 | Scientek Corporation | Image sensor semiconductor package |
US6906403B2 (en) * | 2002-06-04 | 2005-06-14 | Micron Technology, Inc. | Sealed electronic device packages with transparent coverings |
JP4233535B2 (ja) * | 2005-03-29 | 2009-03-04 | シャープ株式会社 | 光学装置用モジュール、光路画定器及び光学装置用モジュールの製造方法 |
US7576401B1 (en) * | 2005-07-07 | 2009-08-18 | Amkor Technology, Inc. | Direct glass attached on die optical module |
JP2007142042A (ja) * | 2005-11-16 | 2007-06-07 | Sharp Corp | 半導体パッケージとその製造方法,半導体モジュール,および電子機器 |
JP4160083B2 (ja) * | 2006-04-11 | 2008-10-01 | シャープ株式会社 | 光学装置用モジュール及び光学装置用モジュールの製造方法 |
US7423335B2 (en) * | 2006-12-29 | 2008-09-09 | Advanced Chip Engineering Technology Inc. | Sensor module package structure and method of the same |
US7964945B2 (en) * | 2007-09-28 | 2011-06-21 | Samsung Electro-Mechanics Co., Ltd. | Glass cap molding package, manufacturing method thereof and camera module |
US9543282B2 (en) * | 2013-11-18 | 2017-01-10 | Stmicroelectronics Pte Ltd. | Optical sensor package |
-
2016
- 2016-06-07 US US15/175,226 patent/US20170256576A1/en not_active Abandoned
-
2017
- 2017-03-02 CN CN201720193682.1U patent/CN206672913U/zh active Active
- 2017-03-02 CN CN201721370958.5U patent/CN207572355U/zh active Active
- 2017-08-17 US US15/679,373 patent/US10181487B2/en active Active
-
2018
- 2018-11-29 US US16/204,097 patent/US20190096938A1/en not_active Abandoned
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111146216A (zh) * | 2018-11-01 | 2020-05-12 | 半导体元件工业有限责任公司 | 半导体封装件和形成半导体封装件的方法 |
CN111146216B (zh) * | 2018-11-01 | 2023-10-17 | 半导体元件工业有限责任公司 | 半导体封装件和形成半导体封装件的方法 |
Also Published As
Publication number | Publication date |
---|---|
CN207572355U (zh) | 2018-07-03 |
US20170345859A1 (en) | 2017-11-30 |
US20190096938A1 (en) | 2019-03-28 |
US10181487B2 (en) | 2019-01-15 |
US20170256576A1 (en) | 2017-09-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN206672913U (zh) | 半导体封装 | |
US20180114804A1 (en) | High reliability housing for a semiconductor package | |
US7553688B2 (en) | Methods for packaging image sensitive electronic devices | |
TWI274657B (en) | Transparent member, optical device using transparent member and method of manufacturing optical device | |
US7494292B2 (en) | Image sensor module structure comprising wire bonding package and method of manufacturing the image sensor module structure | |
CN104458101B (zh) | 侧通气压力传感器装置 | |
US11355423B2 (en) | Bottom package exposed die MEMS pressure sensor integrated circuit package design | |
US20170092689A1 (en) | Image Sensor Structure and Packaging Method Thereof | |
CN209626199U (zh) | 半导体封装 | |
US20070164407A1 (en) | Double encapsulated semiconductor package and manufacturing method thereof | |
CN110071077A (zh) | 光传感器装置 | |
TW201104747A (en) | Image sensor package structure | |
KR101579623B1 (ko) | 이미지 센서용 반도체 패키지 및 그 제조 방법 | |
CN102738351B (zh) | 发光二极管封装结构及其制造方法 | |
CN103178023A (zh) | 混合基板、半导体器件的封装方法和封装结构 | |
US7235887B2 (en) | Semiconductor package with improved chip attachment and manufacturing method thereof | |
CN107195597A (zh) | 光学式指纹感测封装结构及其制造方法 | |
CN103943613B (zh) | 半导体器件和半导体器件的制造方法 | |
CN206742222U (zh) | 光学式指纹感测封装结构 | |
US7939381B2 (en) | Method of semiconductor packaging and/or a semiconductor package | |
CN105097680B (zh) | 用于集成电路器件的保护性封装 | |
CN109616424A (zh) | 一种注塑成型装置及封装结构 | |
US20070272934A1 (en) | LED device with improved life performance | |
CN117613056A (zh) | 影像传感模组、显示模组及电子设备 | |
CN117059677A (zh) | 影像感测模组、显示模组及电子设备 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |