CN207097828U - The terminal structure of transistor device - Google Patents

The terminal structure of transistor device Download PDF

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Publication number
CN207097828U
CN207097828U CN201720978114.2U CN201720978114U CN207097828U CN 207097828 U CN207097828 U CN 207097828U CN 201720978114 U CN201720978114 U CN 201720978114U CN 207097828 U CN207097828 U CN 207097828U
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field plate
insulating medium
medium layer
type
outboard sections
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CN201720978114.2U
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朱袁正
张硕
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Wuxi NCE Power Co Ltd
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Wuxi NCE Power Co Ltd
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Abstract

The utility model provides a kind of terminal structure of transistor device, and cut-off ring structure includes two parts:Inboard portion and Outboard Sections;In inboard portion, polysilicon field plate is lightly doped type drift region with the first conduction type and is isolated by gate oxide, and polysilicon field plate is provided with insulating medium layer, and insulating medium layer is provided with Metal field plate;Metal field plate is electrically connected by pore structure through insulating medium layer with polysilicon field plate;In Outboard Sections, polysilicon field plate is lightly doped type drift region with the first conduction type and is isolated by gate oxide, and in the outermost of Outboard Sections, Metal field plate is lightly doped type drift region with the first conduction type through insulating medium layer by pore structure and is connected;When device bears pressure-resistant, under the gate oxide of cut-off ring structure inboard portion the first conduction type electric charge can be induced in drift region, it is the first conduction type heavily doped region to make the regions transform, therefore the horizontal broadening of depletion layer terminates at this, can effectively ensure that the reliability of breakdown characteristics.

Description

The terminal structure of transistor device
Technical field
It the utility model is related to a kind of insulated-gate bipolar transistor device(IGBT), especially a kind of end of IGBT device End structure.
Background technology
IGBT full name is Insulate Gate Bipolar Transistor, i.e. igbt.It Have MOSFET and GTR (power transistor Giant Transistor) multiple advantages concurrently, greatly extend power semiconductor The application field of device.As the main representative of novel power semiconductor device, IGBT is widely used in industry, information, new The energy, medical science, traffic, military affairs and aviation field.IGBT is one of currently the most important ones power device.IGBT due to The advantages that input impedance is high, and on-state voltage drop is low, and drive circuit is simple, and safety operation area is wide, and current handling capability is strong, various Increasingly attracted people's attention in power switch application.It in motor control, IF switch power supply and inverter, robot, Air-conditioning and the quick low-loss many fields of requirement have a wide range of applications.
IGBT saturation voltage drop(Vcesat)It is the several important of measurement IGBT device with impact resistance and voltage endurance Index.Saturation voltage drop is the important parameter for weighing IGBT product conduction losses, and reducing IGBT saturation voltage drops can effectively reduce IGBT power attenuations, reduce product heating, improve power conversion efficiency.Voltage endurance is one of most important parameters of product, resistance to Pressure deficiency may cause IGBT device using when there is the risk burnt of breakdown.The impact resistance that IGBT products are pressure-resistant is to embody One of important parameter index of product reliability.
In order to improve IGBT properties of product, a kind of reliable terminal structure is necessary, however, conventional IGBT terminal knots There is the shortcomings that obvious in structure, and when the voltage increases, depletion layer extends laterally, once reach cut-off ring position, due to cut-off The presence of ring p-well, electric field cut-off can not be played a part of, performed practically no function;Just need to be displaced outwardly cutting to improve voltage endurance capability Only ring, but so lack and waste chip area, improve cost;
In view of the defects of above routine techniques, one kind can effectively improve the pressure-resistant performances of IGBT, and with existing IGBT A kind of IGBT terminal structures of process compatible and its proposition of manufacture method are and its necessary.
The content of the invention
The purpose of this utility model is to overcome the deficiencies in the prior art, there is provided a kind of terminal of transistor device Structure, such a terminal structure are suitable for igbt transistor device, are also suitable for other power semiconductors;It can not increase On the basis of chip manufacturing cost, chip area is reduced, while improve IGBT voltage impact resistance ability;The utility model also carries Method of the manufacture with terminal structure IGBT is gone out.The technical solution adopted in the utility model is:
A kind of terminal structure of transistor device, it is mainly theed improvement is that,
The terminal protection area of device is located at cellular region periphery, around encirclement cellular region;Terminal protection area is included from inside to outside Transition plot structure, field limiting ring structure and the cut-off ring structure that direction is set;Cut-off ring structure is located in terminal protection area most Outside;
Cut-off ring structure includes two parts:Inboard portion and Outboard Sections;Inboard portion and Outboard Sections electrical communication;
In inboard portion, polysilicon field plate is lightly doped type drift region with the first conduction type and is isolated by gate oxide, Polysilicon field plate is provided with insulating medium layer, and insulating medium layer is provided with Metal field plate;Metal field plate is by pore structure through absolutely Edge dielectric layer electrically connects with polysilicon field plate;
In Outboard Sections, polysilicon field plate is lightly doped type drift region with the first conduction type and is isolated by gate oxide, Polysilicon field plate is provided with insulating medium layer, and insulating medium layer is provided with Metal field plate;Metal field plate is by pore structure through absolutely Edge dielectric layer electrically connects with polysilicon field plate;
In the outermost of Outboard Sections, Metal field plate is gently mixed by pore structure through insulating medium layer with the first conduction type Miscellaneous type drift region connection;The outside top of type drift region is lightly doped formed with the second conductivity type body region trap in first conduction type; The second conduction type heavy doping sub-district formed with connection Metal field plate at the top of second conductivity type body region trap.
Further,
In inboard portion, there is a lower concave part and the upper convex portion positioned at lower concave part both sides;It is provided with the inside of lower concave part the The field oxide on type drift region is lightly doped in one conduction type;
In lower concave part, polysilicon field plate, insulating medium layer and Metal field plate are recessed, in upper convex portion, polysilicon field plate, absolutely Edge dielectric layer and Metal field plate are convex;Metal field plate passes through insulating medium layer and polysilicon field plate in lower concave part by pore structure Electrical connection;
Upper convex portion in inboard portion in the outer part extends to Outboard Sections laterally, forms the upper convex portion of Outboard Sections, outside The upper convex portion of side part is lightly doped type drift section with the first conduction type and is provided with field oxide;
It is convex in the upper convex portion of Outboard Sections, polysilicon field plate, insulating medium layer and Metal field plate;Metal field plate is outside The upper convex portion of side part is electrically connected by pore structure through insulating medium layer with polysilicon field plate.
Further, cut-off ring structure inboard portion is isolated by field oxide in the horizontal direction with Outboard Sections.
Further, in transition plot structure, the second conduction type protection ring well depth is more than isolation trench.
Further, in transition plot structure, the second conduction type protection ring trap portion envelops isolated groove, or all parcels Isolated groove.
Further, field limiting ring structure is one or more.
IGBT of the manufacture with above-mentioned improved terminal structure method, comprises the following steps:
Step S1, choose the first conduction type and type semi-conducting material is lightly doped as semiconductor substrate, in semiconductor substrate Type drift region is lightly doped for forming the first conduction type;
Step S2, on the selected interarea of semiconductor substrate first, field oxide is grown, and selectively cover by photoresist Cover, wet etching field oxide;
Step S3, selectively sheltered by photoresist on the interarea of semiconductor substrate first, inject the second conductive type impurity, And promote and to form the second conduction type protection ring trap;
Step S4, hard mask layer is deposited in the interarea of semiconductor substrate first, it is hard by the masking of photoresist selectivity, etching Mask layer, the hard mask open of multiple etching grooves is formed, further by anisotropic silicon etching, in the first conduction type It is lightly doped in type drift region and forms multiple groove structures, including polygate electrodes groove and isolated groove;
Step S5, it is thermally grown to form gate oxide, depositing polysilicon, selected by photoresist after removing hard mask layer Property masking, etches polycrystalline silicon, formed polygate electrodes, polysilicon field plate;And the second conductive type impurity is injected, trap is pushed away, Form the second conductivity type body region trap;
Step S6, selectively sheltered by photoresist, inject the first conductive type impurity, it is heavily doped to form the first conduction type Miscellaneous sub-district, and insulating medium layer deposit is carried out, selective etching insulating medium layer forms through hole, and carries out the second conduction type Impurity injects, and forms the second conduction type heavy doping sub-district;
Step S7, metal is deposited on the interarea of semiconductor substrate first, and pass through the masking of photoresist selectivity, etching gold Category, form emitter metal electrode, Metal field plate;Outermost Metal field plate is as cut-off ring metal;
Step S8, required thickness is thinned to from the interarea of semiconductor substrate second, and passes through high energy ion implantation and laser annealing work Skill forms the first conduction type heavy doping type electric field cushion and the second conduction type heavy doping type collecting zone;
Step S9, back metal deposit is carried out in the interarea of semiconductor substrate second, forms collector electrode metal electrode.
The utility model has the advantage of:
1)In IGBT forward blockings, when voltage raises, after depletion layer broadening, the utility model is due in cut-off ring structure The presence of electron charge is induced under inboard portion F-a gate oxides 4, depletion layer ends in this, the anti-impact of the device improved Hit ability;Conventional structure, depletion layer broadening, because the presence of p-well can not terminate the broadening of depletion layer, are made to after ending ring position The unexpected decline pressure-resistant into breakdown;
2)The presence of cut-off ring structure inboard portion sensing electron charge can play a part of electric field cut-off, therefore, cut Only the distance between ring and field limiting ring can further reduce, and terminal structure area be reduced, so as to cause the reduction of chip cost;
3)The utility model is completely compatible with prior art processes, only does structural change, process costs are without increase.
Brief description of the drawings
Fig. 1 is IGBT device top view of the present utility model.
Fig. 2 is Fig. 1 of the present utility model A-A to sectional view.
Fig. 3 is Fig. 2 of the present utility model partial enlarged drawing.
Fig. 4 is semiconductive material substrate profile of the present utility model.
Fig. 5 is the profile after growth field oxide of the present utility model and selective corrosion.
Fig. 6 is the profile after formation p-type protection ring trap of the present utility model.
Fig. 7 is the profile of the present utility model for etching and being formed after groove structure.
Fig. 8 is the profile of formation polysilicon field plate of the present utility model.
Fig. 9 is deposit insulating medium layer of the present utility model and forms N+ sub-districts, the profile of P+ sub-districts.
Figure 10 is the profile after formation Metal field plate of the present utility model.
Figure 11 is the profile that the second interarea of the present utility model is formed after N+ type electric field cushions and P+ type collecting zone.
Figure 12 is the profile that the second interarea of the present utility model is formed after collector electrode metal electrode.
Embodiment
With reference to specific drawings and examples, the utility model is described in further detail.
The present embodiment illustrates the improved terminal knot of transistor device by taking insulated gate bipolar transistor IGBT device as an example Structure;
As shown in figure 1, in the top plan view of IGBT device, there is cellular region 101 and terminal protection on semiconductor substrate Area 102, the cellular region 101 are located at the center of semiconductor substrate, the terminal protection area 102, positioned at the outer of cellular region 101 Enclose, around encirclement cellular region 101;
Fig. 2 is the diagrammatic cross-section using the IGBT for improving terminal structure;The IGBT includes:
Cellular region 101, terminal protection area 102, N-type drift region 1, field oxide 2, p-type protection ring trap 3, gate oxide 4, Polygate electrodes 5a, polysilicon field plate 5-1~5-4;PXing Ti areas trap 6, N+ sub-districts 7, insulating medium layer 8, P+ sub-districts 9, hair Emitter-base bandgap grading metal 10a, Metal field plate 10-1~10-4, N+ type electric fields buffering area 11, P+ type collecting zone 12, collector electrode metal electrode 13;
As shown in Fig. 2 on the section of the IGBT device, the semiconductor substrate has the first relative interarea and Two interareas, N- drift regions 1 are included between the first interarea and the second interarea of semiconductor substrate;Set in the interarea of semiconductor substrate second There are P+ type collecting zone 12, P+ type collecting zone 12 and the Ohmic contact of collector electrode metal electrode 13;Drifted about in P+ type collecting zone 12 and N- It is isolated between area 1 by N+ type electric fields buffering area 11;It is provided with the cellular region 101 of the interarea of semiconductor substrate first IGBT device structure,
Terminal protection structure is provided with the terminal protection area 102 of first interarea;Terminal protection area 102 include by Transition plot structure D, the field limiting ring structure E and cut-off ring structure F that interior and outer direction is set;
The utility model is improved mainly for cut-off ring structure F, and cut-off ring structure F is located at terminal protection area 102 Interior outermost;
Cut-off ring structure F includes two parts:Inboard portion F-a and Outboard Sections F-b;Inboard portion F-a and outside portion Divide F-b electrical communications;
It is isolated in inboard portion F-a, polysilicon field plate 5-4 with N-type drift region 1 by gate oxide 4, polysilicon field Plate 5-4 is provided with insulating medium layer 8, and insulating medium layer 8 is provided with Metal field plate 10-4;Metal field plate 10-4 is worn by pore structure Insulating medium layer 8 is crossed to electrically connect with polysilicon field plate 5-4;
In inboard portion F-a, there is a lower concave part F1 and upper convex portion F2 positioned at lower concave part F1 both sides;In lower concave part F1 Side is the field oxide 2 being arranged on N- drift regions 1;
In lower concave part F1, polysilicon field plate 5-4, insulating medium layer 8 and Metal field plate 10-4 are recessed, in upper convex portion F2, Polysilicon field plate 5-4, insulating medium layer 8 and Metal field plate 10-4 are convex;Metal field plate 10-4 is tied in lower concave part F1 by hole Structure electrically connects through insulating medium layer 8 with polysilicon field plate 5-4;
Upper convex portion F2 in the F-a of inboard portion in the outer part extends to Outboard Sections F-b laterally, forms Outboard Sections F-b Upper convex portion F2 ', field oxide 2 is provided between the upper convex portion F2 ' of Outboard Sections and N-type drift region 1;
It is isolated in Outboard Sections F-b, polysilicon field plate 5-4 with N-type drift region 1 by gate oxide 4, polysilicon field Plate 5-4 is provided with insulating medium layer 8, and insulating medium layer 8 is provided with Metal field plate 10-4;It is more in the upper convex portion F2 ' of Outboard Sections Crystal silicon field plate 5-4, insulating medium layer 8 and Metal field plate 10-4 are convex;Upper convex portion F2s ' of the Metal field plate 10-4 in Outboard Sections Electrically connected by pore structure through insulating medium layer 8 with polysilicon field plate 5-4;
In Outboard Sections F-b outermost, Metal field plate 10-4 is drifted about by pore structure through insulating medium layer 8 and N-type Area 1 connects;The outside top of N-type drift region 1 is formed with PXing Ti areas trap 6;The top of PXing Ti areas trap 6 is formed with connection metal field Plate 10-4 P+ sub-districts 9;
In transition plot structure D, the depth of p-type protection ring trap 3 is more than isolated groove 1b depth;
In transition plot structure D, p-type protection ring trap 3 can also can all wrap up isolating trenches with portion envelops isolated groove 1b Groove 1b;
Field limiting ring structure E can be one or multiple;It is of the present utility model to focus on ending ring structure F, Therefore transition plot structure D and field limiting ring structure E are only briefly described;
Cut-off ring structure F inboard portion F-a and Outboard Sections F-b is isolated by field oxide 2 in the horizontal direction;
In above-mentioned IGBT, structure cell is not limited to trench gate structure, or planar gate structure;
In above-mentioned IGBT, the terminal structure is applicable not only to insulated gate bipolar transistor, is also applied for other work( Rate semiconductor device structure;
The principle that above-mentioned IGBT can improve breakdown characteristics reliability is, in IGBT forward blockings, when voltage rise, consumption To the greatest extent after layer broadening, the utility model under cut-off ring structure inboard portion F-a gate oxides 4 due to inducing depositing for electron charge Depletion layer ends in this, the impact resistance of the device improved;Conventional structure, after depletion layer broadening extremely ends ring position, Because the presence of p-well can not terminate the broadening of depletion layer, cause to puncture pressure-resistant unexpected decline;
The presence of cut-off ring structure inboard portion sensing electron charge can play a part of electric field cut-off, therefore, cut-off The distance between ring and field limiting ring can further reduce, and terminal structure area be reduced, so as to cause the reduction of chip cost;
With improvement terminal structure IGBT, can be prepared by following manufacture methods,
Step S1, as shown in figure 4, choosing N-type semi-conducting material as semiconductor substrate, it is used for shape in semiconductor substrate Into N-type drift region 1;
Step S2, as shown in figure 5, on the selected interarea of semiconductor substrate first, field oxide 2 is grown, and pass through photoetching Glue is selectively sheltered, wet etching field oxide 2;
Step S3, as shown in fig. 6, selectively being sheltered by photoresist on the interarea of semiconductor substrate first, injection second is led Electric type dopant boron ion etc., and promote and form p-type protection ring trap 3;
Step S4, as shown in fig. 7, depositing hard mask layer 1a in the interarea of semiconductor substrate first, pass through photoresist selectivity Masking, etch hard mask layer 1a, form the hard mask open of multiple etching grooves, further carved by anisotropic silicon Erosion, multiple groove structures, including polygate electrodes groove 1b and isolated groove 1b are formed in N-type drift region 1;
Step S5, as shown in figure 8, after removing hard mask layer 1a, thermally grown formation gate oxide 4, depositing polysilicon 5, By the masking of photoresist selectivity, etches polycrystalline silicon 5, polygate electrodes 5a, polysilicon field plate 5-1~5-4 are formed;And Injection P type dopant boron ions etc., trap is pushed away, form PXing Ti areas trap 6;
Step S6, as shown in figure 9, selectively being sheltered by photoresist, injection N-type impurity phosphonium ion, arsenic ion etc., formed N+ sub-districts 7, and carry out insulating medium layer 8 and deposit, selective etching insulating medium layer 8 forms through hole, and carries out p type impurity boron Ion implanting, form P+ sub-districts 9;
Step S7, as shown in Figure 10, metal, and covering by photoresist selectivity are deposited on the interarea of semiconductor substrate first Cover, etch metal, form emitter metal electrode 10, Metal field plate 10-1~10-4;Wherein Metal field plate 10-1 is as grid Metal electrode;Metal field plate 10-4 is as cut-off ring metal;
Step S8, as shown in figure 11, required thickness is thinned to from the interarea of semiconductor substrate second, and by high energy ion implantation and Laser annealing technique forms N+ type electric fields cushion 11 and P+ type collecting zone 12;
Step S9, as shown in figure 12, back metal deposit is carried out in the interarea of semiconductor substrate second, forms collector electrode metal Electrode 13;
In above-mentioned IGBT, semiconductive material substrate includes but is not limited to silicon;
When device bears pressure-resistant, first can be induced in drift region under the gate oxide of cut-off ring structure inboard portion and led Electric type charge, it is the first conduction type heavily doped region to make the regions transform, therefore the horizontal broadening of depletion layer terminates at this, It can effectively ensure that the reliability of breakdown characteristics;The structure does not increase work with first using IGBT technology platforms completely compatible simultaneously Skill cost.
In the above-described embodiments, using first conduction type as N types, second conduction type is exemplified by P type It is introduced, in the embodiment of other changes, it is also possible that the first conduction type is p-type, second conduction type is N Type, Each part are also corresponding N<->P conversion.

Claims (6)

  1. A kind of 1. terminal structure of transistor device, it is characterised in that
    The terminal protection area (102) of device is located at cellular region (101) periphery, around encirclement cellular region (101);Terminal protection area (102) the transition plot structure (D), field limiting ring structure (E) and cut-off ring structure (F) that direction is set from inside to outside are included;Cut-off Ring structure (F) is located at the outermost in terminal protection area (102);
    Cut-off ring structure (F) includes two parts:Inboard portion (F-a) and Outboard Sections (F-b);Inboard portion (F-a) and outer Side part (F-b) electrical communication;
    At inboard portion (F-a), polysilicon field plate (5-4) is lightly doped type drift region (1) with the first conduction type and passes through gate oxidation Layer (4) is isolated, and polysilicon field plate (5-4) is provided with insulating medium layer (8), and insulating medium layer (8) is provided with Metal field plate (10-4);Metal field plate (10-4) is electrically connected by pore structure through insulating medium layer (8) with polysilicon field plate (5-4);
    At Outboard Sections (F-b), polysilicon field plate (5-4) is lightly doped type drift region (1) with the first conduction type and passes through gate oxidation Layer (4) is isolated, and polysilicon field plate (5-4) is provided with insulating medium layer (8), and insulating medium layer (8) is provided with Metal field plate (10-4);Metal field plate (10-4) is electrically connected by pore structure through insulating medium layer (8) with polysilicon field plate (5-4);
    In Outboard Sections (F-b) outermost, Metal field plate (10-4) is led by pore structure through insulating medium layer (8) with first Type drift region (1) connection is lightly doped in electric type;The outside top of type drift region (1) is lightly doped formed with second in first conduction type Conductivity type body region trap (6);Second formed with connection Metal field plate (10-4) at the top of second conductivity type body region trap (6) is conductive Type heavy doping sub-district (9).
  2. 2. the terminal structure of transistor device as claimed in claim 1, it is characterised in that
    At inboard portion (F-a), there is a lower concave part (F1) and the upper convex portion (F2) positioned at lower concave part (F1) both sides;Lower concave part (F1) inner side is provided with the field oxide (2) being lightly doped in the first conduction type on type drift region (1);
    At lower concave part (F1), polysilicon field plate (5-4), insulating medium layer (8) and Metal field plate (10-4) are recessed, in upper convex portion (F2), polysilicon field plate (5-4), insulating medium layer (8) and Metal field plate (10-4) are convex;Metal field plate (10-4) is recessed Portion (F1) is electrically connected by pore structure through insulating medium layer (8) with polysilicon field plate (5-4);
    Upper convex portion (F2) in inboard portion (F-a) in the outer part extends to Outboard Sections (F-b) laterally, forms Outboard Sections (F-b) upper convex portion (F2 '), the upper convex portion (F2 ') of Outboard Sections and the first conduction type are provided between type drift region (1) is lightly doped Field oxide (2);
    In the upper convex portion (F2 ') of Outboard Sections, polysilicon field plate (5-4), insulating medium layer (8) and Metal field plate (10-4) on It is convex;Metal field plate (10-4) passes through insulating medium layer (8) and polysilicon field in the upper convex portion (F2 ') of Outboard Sections by pore structure Plate (5-4) electrically connects.
  3. 3. the terminal structure of transistor device as claimed in claim 1 or 2, it is characterised in that
    Cut-off ring structure (F) inboard portion (F-a) is separated by by field oxide (2) in the horizontal direction with Outboard Sections (F-b) From.
  4. 4. the terminal structure of transistor device as claimed in claim 1 or 2, it is characterised in that
    In transition plot structure (D), second conduction type protection ring trap (3) depth is more than isolated groove (1b) depth.
  5. 5. the terminal structure of transistor device as claimed in claim 1 or 2, it is characterised in that
    In transition plot structure (D), second conduction type protection ring trap (3) portion envelops isolated groove (1b), or all parcel every From groove (1b).
  6. 6. the terminal structure of transistor device as claimed in claim 1 or 2, it is characterised in that
    Field limiting ring structure (E) is one or more.
CN201720978114.2U 2017-08-07 2017-08-07 The terminal structure of transistor device Withdrawn - After Issue CN207097828U (en)

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107331703A (en) * 2017-08-07 2017-11-07 无锡新洁能股份有限公司 The method of terminal structure and manufacture with terminal structure IGBT of transistor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107331703A (en) * 2017-08-07 2017-11-07 无锡新洁能股份有限公司 The method of terminal structure and manufacture with terminal structure IGBT of transistor device
CN107331703B (en) * 2017-08-07 2023-04-25 无锡新洁能股份有限公司 Terminal structure of transistor device and method for manufacturing IGBT with terminal structure

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