CN206908946U - A kind of high wiring density printed circuit board (PCB) - Google Patents
A kind of high wiring density printed circuit board (PCB) Download PDFInfo
- Publication number
- CN206908946U CN206908946U CN201720480176.0U CN201720480176U CN206908946U CN 206908946 U CN206908946 U CN 206908946U CN 201720480176 U CN201720480176 U CN 201720480176U CN 206908946 U CN206908946 U CN 206908946U
- Authority
- CN
- China
- Prior art keywords
- layer
- substrate
- insulating barrier
- electric elements
- line layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 230000004888 barrier function Effects 0.000 claims abstract description 22
- 238000007747 plating Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 44
- 239000011241 protective layer Substances 0.000 claims description 3
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
The utility model provides a kind of high wiring density printed circuit board (PCB), including substrate, the upper surface of substrate is provided with first line layer, insulating barrier is provided with above line layer, second substrate layer is provided with above insulating barrier, multiple grooves are provided with second substrate layer, the second line layer is disposed with by the way of plating in groove, the bottom of second substrate layer groove is provided with blind hole, and the second line layer is connected by blind hole through upper insulating barrier with first line layer；The lower surface of substrate is provided with multiple grooves, electric elements are provided with groove, lower insulating barrier is provided with below electric elements, lower insulating barrier covers the protuberance of electric elements, the lower bottom part of lower insulating barrier is provided with projection, tertiary circuit layer is provided with projection, tertiary circuit layer is connected by blind hole with electric elements.The printed circuit board (PCB) arranges electric elements and line layer in vertical direction, has saved space, reduces printed circuit plate bulk.
Description
Technical field
It the utility model is related to a kind of printed circuit board arrangement.
Background technology
With requirement more and more higher of the electronic equipment to volume, arrange that more circuits are on smaller printed circuit board (PCB)
The generally pursuit of printed-board technology at present, realizes and more circuits is arranged on the substrate of equal volume, is to print at present
The subject matter that field of circuit boards faces.
Utility model content
In order to solve problem present in background technology, the utility model provides a kind of printed circuit of high wiring density
Plate, the printed circuit board (PCB) arranges electric elements and line layer in vertical direction, has saved space, reduces printed circuit board (PCB)
Volume.
To reach above-mentioned purpose, the utility model adopts the following technical scheme that：
A kind of high wiring density printed circuit board (PCB), including substrate, it is characterised in that the upper surface setting of substrate is fluted,
First line layer is provided with groove, insulating barrier is provided with above line layer, second substrate is provided with above insulating barrier
Layer, multiple grooves are provided with second substrate layer, the second line layer, second substrate layer are disposed with by the way of plating in groove
The bottom of groove is provided with blind hole, and the second line layer is connected by blind hole through upper insulating barrier with first line layer；
The lower surface of substrate is provided with multiple grooves, and electric elements are provided with groove, and electric elements are protruded under substrate
Surface, lower insulating barrier is provided with below electric elements, lower insulating barrier covers the protuberance of electric elements, under lower insulating barrier
Bottom is provided with projection, is provided with tertiary circuit layer in projection, tertiary circuit layer is connected by blind hole with electric elements.
The bottom setting matcoveredn of the tertiary circuit layer, protective layer are fully wrapped around by tertiary circuit layer.
Line layer is arranged in a groove by the way of plating.
The beneficial effects of the utility model are：Printed circuit board (PCB) described in the utility model exists electric elements and line layer
It is distributed in vertical direction, there is wiring density height, small volume.
Brief description of the drawings
The utility model is further illustrated below in conjunction with the accompanying drawings
Fig. 1 is the structural representation of printed circuit board (PCB) described in the utility model；
Embodiment
Explanation and embodiment are further described to the utility model below in conjunction with the accompanying drawings：
Embodiment 1
As shown in figure 1, a kind of high wiring density printed circuit board (PCB), including substrate 1, the upper surface setting of substrate 1 is fluted,
First line layer 2 is provided with groove, line layer 2 arranges in a groove that the top of line layer 2 is provided with by the way of plating
Upper insulating barrier 4, the top of insulating barrier 4 are provided with second substrate layer 5, multiple grooves are provided with second substrate layer 5, are adopted in groove
The second line layer 6 is disposed with the mode of plating.The bottom of the upper groove of second substrate layer 5 is provided with blind hole, and blind hole passes through upper exhausted
Second line layer 6 is connected by edge layer 4 with first line layer 2, and blind hole is the hole that madial wall is electroplate with copper.
The lower surface of substrate 1 is provided with multiple grooves, and electric elements 3 are provided with groove, and electric elements 3 protrude substrate 1
Lower surface, the lower sections of electric elements 3 is provided with lower insulating barrier 7, and lower insulating barrier 7 covers the convex portion of electric elements 3, it is lower absolutely
The lower bottom part of edge layer 7 is provided with projection, is provided with tertiary circuit layer 8 in projection, tertiary circuit layer 8 passes through blind hole and electric elements
3 are connected.The bottom setting matcoveredn 9 of tertiary circuit layer 3, protective layer 9 are fully wrapped around by tertiary circuit layer 3.
High wiring density printed circuit board (PCB) described in the utility model divides electric elements and line layer in vertical direction
Cloth, in the case where ensureing that printed circuit board area is constant, wiring density at least adds more than three times.
It will be recognized by those skilled in the art, can be to above-mentioned on the premise of without departing from protection scope of the present invention
Embodiment carries out various modifications, change and combination, and thinks that this modification, change and combination are the models in originality thought
Within enclosing.
Claims (3)
1. a kind of high wiring density printed circuit board (PCB), including substrate, it is characterised in that the upper surface setting of substrate is fluted, recessed
First line layer is provided with groove, insulating barrier is provided with above line layer, second substrate layer is provided with above insulating barrier,
Multiple grooves are provided with second substrate layer, are disposed with the second line layer by the way of plating in groove, second substrate layer is recessed
The bottom of groove is provided with blind hole, and the second line layer is connected by blind hole through upper insulating barrier with first line layer；
The lower surface of substrate is provided with multiple grooves, and electric elements are provided with groove, and electric elements protrude the lower surface of substrate,
Lower insulating barrier is provided with below electric elements, lower insulating barrier covers the protuberance of electric elements, the lower bottom part of lower insulating barrier
Projection is provided with, is provided with tertiary circuit layer in projection, tertiary circuit layer is connected by blind hole with electric elements.
A kind of 2. high wiring density printed circuit board (PCB) as claimed in claim 1, it is characterised in that the bottom of the tertiary circuit layer
Portion's setting matcoveredn, protective layer are fully wrapped around by tertiary circuit layer.
3. a kind of high wiring density printed circuit board (PCB) as claimed in claim 1, it is characterised in that line layer is using the side electroplated
Formula is arranged in a groove.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720480176.0U CN206908946U (en) | 2017-05-03 | 2017-05-03 | A kind of high wiring density printed circuit board (PCB) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720480176.0U CN206908946U (en) | 2017-05-03 | 2017-05-03 | A kind of high wiring density printed circuit board (PCB) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206908946U true CN206908946U (en) | 2018-01-19 |
Family
ID=61290207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720480176.0U Expired - Fee Related CN206908946U (en) | 2017-05-03 | 2017-05-03 | A kind of high wiring density printed circuit board (PCB) |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206908946U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111465167A (en) * | 2019-01-18 | 2020-07-28 | 欣兴电子股份有限公司 | Substrate structure and manufacturing method thereof |
-
2017
- 2017-05-03 CN CN201720480176.0U patent/CN206908946U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111465167A (en) * | 2019-01-18 | 2020-07-28 | 欣兴电子股份有限公司 | Substrate structure and manufacturing method thereof |
| CN111465167B (en) * | 2019-01-18 | 2021-11-02 | 欣兴电子股份有限公司 | Substrate structure and manufacturing method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180119 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |