CN206441733U - A kind of high threshold voltage high mobility notched gates MOSFET structure - Google Patents
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- CN206441733U CN206441733U CN201621096991.9U CN201621096991U CN206441733U CN 206441733 U CN206441733 U CN 206441733U CN 201621096991 U CN201621096991 U CN 201621096991U CN 206441733 U CN206441733 U CN 206441733U
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- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 36
- 239000004411 aluminium Substances 0.000 claims abstract description 25
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 25
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 25
- 238000005036 potential barrier Methods 0.000 claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 12
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 7
- 230000008020 evaporation Effects 0.000 claims abstract description 7
- 238000001704 evaporation Methods 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 229910001020 Au alloy Inorganic materials 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 13
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 4
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 2
- 229910000846 In alloy Inorganic materials 0.000 claims description 2
- 229910001182 Mo alloy Inorganic materials 0.000 claims description 2
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 2
- 229910052799 carbon Inorganic materials 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims description 2
- 229910052742 iron Inorganic materials 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims description 2
- 229910001252 Pd alloy Inorganic materials 0.000 claims 1
- BERDEBHAJNAUOM-UHFFFAOYSA-N copper(I) oxide Inorganic materials [Cu]O[Cu] BERDEBHAJNAUOM-UHFFFAOYSA-N 0.000 claims 1
- KRFJLUBVMFXRPN-UHFFFAOYSA-N cuprous oxide Chemical compound [O-2].[Cu+].[Cu+] KRFJLUBVMFXRPN-UHFFFAOYSA-N 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 11
- 230000008569 process Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 229910002601 GaN Inorganic materials 0.000 description 26
- 238000010586 diagram Methods 0.000 description 6
- 230000005669 field effect Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 238000009616 inductively coupled plasma Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 150000002927 oxygen compounds Chemical class 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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Abstract
The utility model is related to the technical field of semiconductor epitaxial process, more particularly, to a kind of high threshold voltage high mobility notched gates MOSFET structure.A kind of high threshold voltage high mobility notched gates MOSFET structure, wherein, it is included in the stress-buffer layer of Grown；The GaN epitaxial layer grown on stress-buffer layer；The one layer low aluminium component AlGaN potential barrier grown in GaN epitaxial layer；The one layer of GaN etch stop layer deposited in low aluminium component AlGaN potential barrier；The one layer of high aluminium component AlGaN potential barrier grown on GaN etch stop layers；Remove the high aluminium component AlGaN potential barrier of area of grid；Depositing p-type oxide gate；Source electrode and drain ohmic contact metal on source electrode and drain region evaporation；In groove grids region evaporation metal and p-type oxide formation Ohmic contact.
Description
Technical field
The utility model is related to the technical field of semiconductor epitaxial process, high more particularly, to a kind of high threshold voltage
Mobility notched gates MOSFET structure.
Background technology
Gallium nitride（GaN）Material has that energy gap is big, breakdown field strength is high, electronics saturation drift velocity is big, thermal conductivity
The advantages of rate is high, is very suitable for making high-power, high frequency, high temperature power electronic devices.In applied power electronics field, in order to full
Sufficient fail safe, field-effect transistor (FET) device must realize (also known as enhanced) work of normally-off, and in some occasions
Threshold voltage needs at least 4-5V.And for conventional AlGaN/GaN HFETs (HFET), due to interface
The presence of high concentration, the two-dimensional electron gas (2DEG) of high mobility, when additional grid voltage is zero, device is also at unlatching shape
State（Normally on device）.It it is one using the isolated-gate field effect transistor (IGFET) (MOSFET) of MOS structure to solve these problems
Effective technology path.
GaN base groove grid MOSFET component is retaining access area 2DEG concentration（Break-over of device characteristic is not sacrificed）Premise
Under, grid when reduction even removes zero-bias completely is reached by partly or completely etching grid region AlGaN potential barrier
The 2DEG of lower section, and normally-off, low-leakage current and the high grid voltage amplitude of oscillation can be realized using MOS structure grid.Carve part
Erosion barrier layer can be effectively retained electron channel and obtain high field-effect mobility, but barrier layer meeting and the gate metal of residual
And gate dielectric layer forms MOSHFET and reduces threshold voltage.On the contrary, etching barrier layer completely can obtain high threshold voltage,
But electron channel is produced between gate dielectric layer and GaN, strong interface scattering causes field-effect mobility relatively low.In addition, recessed
In groove etched technique, traditional plasma dry etch can cause damage to the lattice of channel region, although wet etching energy
Effectively removing plasma damage, still long time treatment can also observe substantial amounts of etching hole on the surface of GaN channel layers, enter
And influence the reliability and stability at MOS interfaces.It is therefore desirable to seek a kind of new GaN base notched gates MOSFET structure,
To overcome the shortcoming in traditional handicraft, so as to obtain higher mobility and threshold voltage.
The content of the invention
The utility model is that there is provided a kind of high threshold voltage Gao Qian at least one defect for overcoming described in above-mentioned prior art
Shifting rate notched gates MOSFET structure, can effectively improve channel mobility and threshold voltage.
In order to solve the above technical problems, the technical solution adopted in the utility model is：A kind of high threshold voltage high mobility
Notched gates MOSFET structure, wherein, it is included in the stress-buffer layer of Grown；Outside the GaN grown on stress-buffer layer
Prolong layer；The one layer low aluminium component AlGaN potential barrier grown in GaN epitaxial layer；Deposited in low aluminium component AlGaN potential barrier
One layer of GaN etch stop layer；The one layer of high aluminium component AlGaN potential barrier grown on GaN etch stop layers；Remove area of grid
High aluminium component AlGaN potential barrier；Depositing p-type oxide gate；Source electrode and drain ohmic on source electrode and drain region evaporation
Contacting metal；In groove grids region evaporation metal and p-type oxide formation Ohmic contact.
Further, described substrate is in Si substrates, Sapphire Substrate, silicon carbide substrates, GaN self-supported substrate
It is any.
Described stress-buffer layer thickness is 10 nm ~ 5 μm.
Described GaN epitaxial layer is the GaN epitaxial layer of unintentional doping or the high resistant GaN epitaxial layer of doping, the doping
The doped chemical of resistive formation is carbon or iron；GaN epitaxial layer thickness is 100 nm ~ 20 μm.
Described AlGaN potential barrier is low aluminium component AlGaN, and AlGaN layer thickness is 0-20 nm, and aluminium concentration of component can
In 0-15% changes.
Described GaN etch stop layers are high-quality, low-dislocation-density GaN etch stop layers；Stop layer thickness is 0
nm~20nm。
Described AlGaN potential barrier is high aluminium component AlGaN, and AlGaN layer thickness is 0-50 nm, and aluminium concentration of component can
In 15-40% changes.
In described AlGaN potential barrier, an AlN thin layers can also be inserted between GaN etch stop layers, thickness is 1-10
nm。
Described p-type oxide grid is high-quality NiO, Cu2The materials such as O, ZnO or its combination, thickness is 1-500
nm。
Described source electrode and drain material are Ti/Al/Ni/Au alloys, Ti/Al/Ti/Au alloys, Ti/Al/Mo/Au alloys
Or Ti/Al/Ti/TiN alloys；It is that Ni/Au alloys, In/Au alloys or Pd/Au are closed that gate electrode, which thickeies metal,.
Compared with prior art, beneficial effect is：The utility model utilizes lamination barrier layer construction, GaN insert layer conducts
Wet etching stop layer can remove plasma damage, and low aluminium component AlGaN can be retained again and low two-dimensional electron gas is formed
The raceway groove of concentration, and channel carrier concentration is regulated and controled with reference to p-type oxide grid, so as to improve the same of channel mobility
When obtain high threshold voltage.
Brief description of the drawings
Fig. 1-11 is the device manufacture method process schematic representation of the utility model embodiment 1.
Figure 12 is the device architecture schematic diagram of the utility model embodiment 2.
Figure 13 is the device architecture schematic diagram of the utility model embodiment 3.
Embodiment
Accompanying drawing being given for example only property explanation, it is impossible to be interpreted as the limitation to this patent；It is attached in order to more preferably illustrate the present embodiment
Scheme some parts to have omission, zoom in or out, do not represent the size of actual product；To those skilled in the art,
Some known features and its explanation may be omitted and will be understood by accompanying drawing.Being given for example only property of position relationship described in accompanying drawing
Explanation, it is impossible to be interpreted as the limitation to this patent.
Embodiment 1
It is the device architecture schematic diagram of the present embodiment as shown in figure 11, its structure includes substrate 1, stress successively from lower to upper
Cushion 2, GaN epitaxial layer 3, low aluminium component AlGaN potential barrier 4, GaN insert layers 5, high aluminium component AlGaN potential barrier 6, p-type oxygen
Compound grid 7, two ends form deposition in source electrode and drain electrode 8, oxide gate 7 and thicken metal 9.
The preparation method of above-mentioned GaN base notched gates MOSFET device field-effect transistor as Figure 1-Figure 11, including
Following steps：
S1, using mocvd method, grow a ply stress cushion 2 on Si substrates 1, stress delays
Layer is rushed for any of AlN, AlGaN, GaN or is combined, as shown in Figure 1；
S2, using mocvd method, on stress-buffer layer 2 grow GaN epitaxial layer 3, such as Fig. 2 institutes
Show；
S3, using mocvd method, low aluminium component AlGaN potential barrier is grown in GaN epitaxial layer 3
4, as shown in Figure 3；
S4, using mocvd method, in low aluminium component AlGaN potential barrier 4 grow GaN insert layers
5, as shown in Figure 4；
S5, using mocvd method, in GaN insert layers 5 grow high aluminium component AlGaN potential barrier
6, as shown in Figure 5；
S6, pass through one layer of SiO of plasma enhanced chemical vapor deposition2, as mask layer 10, as shown in Figure 6；
S7, etched by photolithography method selection region, remove the mask layer 10 of area of grid, as shown in Figure 7；
S8, inductively coupled plasma (ICP) or reactive ion etching (RIE) is utilized to remove area of grid high aluminium component
The formation groove of AlGaN potential barrier 6, as shown in Figure 8；
S9, removal mask layer 10, complete device isolation, and using sputtering method, one layer of high-quality p-type oxide of growth is thin
Layer 7, as shown in Figure 9；
S10, photoetching development go out on source electrode and drain ohmic contact region, evaporation Ti/Al/Ni/Au alloys as source electrode and
The metal ohmic contact 8 of drain electrode, as shown in Figure 10；
S11, on p-type oxide grid 7 be deposited Ni/Au alloys as grid thicken metal 9, as shown in figure 11；
So far, the preparation process of whole device is completed.Figure 11 is the device architecture schematic diagram of embodiment 1.
Embodiment 2
It is the device architecture schematic diagram of the present embodiment as shown in figure 12, it is differed only in the structure of embodiment 1：Embodiment
Grid is single oxide in 1, and two kinds or more of oxides formation lamination gate electrode structure is utilized in embodiment 2.
Embodiment 3
It is the device architecture schematic diagram of the present embodiment as shown in figure 13, it is differed only in the structure of embodiment 1：Embodiment
Grid is p-type oxide in 1, and embodiment 3 introduces insulating medium layer 11 below p-type oxide gate electrode, and dielectric layer is
Al2O3Or HfO2, thickness is 1-100 nm；Form dielectric layer/oxide stack structure.
Furthermore, it is necessary to explanation, the accompanying drawing of above example are merely to the purpose of signal, thus be not necessarily to by than
Example is drawn.
Obviously, above-described embodiment of the present utility model is only intended to clearly illustrate the utility model example, and
It is not the restriction to embodiment of the present utility model.For those of ordinary skill in the field, in described above
On the basis of can also make other changes in different forms.There is no need and unable to give all embodiments
It is exhaustive.All any modifications, equivalent substitutions and improvements made within spirit of the present utility model and principle etc., should be included in
Within the utility model scope of the claims.
Claims (10)
1. a kind of high threshold voltage high mobility notched gates MOSFET structure, it is characterised in that be included in substrate（1）Upper growth
Stress-buffer layer（2）；The GaN epitaxial layer grown on stress-buffer layer（3）；In GaN epitaxial layer（3）One layer of low aluminium of upper growth
Component AlGaN potential barrier（4）；In low aluminium component AlGaN potential barrier（4）One layer of GaN etch stop layer of upper deposition（5）；In GaN
Etch stop layer（5）One layer of high aluminium component AlGaN potential barrier of upper growth（6）；Remove the high aluminium component AlGaN gesture of area of grid
Barrier layer（6）；Depositing p-type oxide gate（7）；Source electrode and drain ohmic contact metal on source electrode and drain region evaporation（8）；
In groove grids region evaporation metal（9）With p-type oxide formation Ohmic contact.
2. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The substrate stated（1）For any of Si substrates, Sapphire Substrate, silicon carbide substrates, GaN self-supported substrates.
3. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Should
Power buffer layer thickness is 10 nm ~ 5 μm.
4. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The GaN epitaxial layer stated（3）The high resistant GaN epitaxial layer of GaN epitaxial layer or doping for unintentional doping, the doping resistive formation
Doped chemical is carbon or iron；GaN epitaxial layer thickness is 100 nm ~ 20 μm.
5. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The AlGaN potential barrier stated（4）For low aluminium component AlGaN, AlGaN layer thickness is 0-20 nm.
6. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The GaN etch stop layers stated（5）Stop layer thickness is 0 nm ~ 20nm.
7. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The AlGaN potential barrier stated（6）For high aluminium component AlGaN, AlGaN layer thickness is 0-50 nm.
8. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The AlGaN potential barrier stated（6）In, an AlN thin layers can also be inserted between GaN etch stop layers, thickness is 1-10 nm.
9. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：Institute
The p-type oxide grid stated（7）For NiO, Cu2O, ZnO material, thickness are 1-500 nm.
10. a kind of high threshold voltage high mobility notched gates MOSFET structure according to claim 1, it is characterised in that：
Described source electrode and drain electrode（8）Material is Ti/Al/Ni/Au alloys, Ti/Al/Ti/Au alloys, Ti/Al/Mo/Au alloys or Ti/
Al/Ti/TiN alloys；Gate electrode thickeies metal（9）For Ni/Au alloys, In/Au alloys or Pd/Au alloys.
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| CN201621096991.9U CN206441733U (en) | 2016-09-30 | 2016-09-30 | A kind of high threshold voltage high mobility notched gates MOSFET structure |
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| CN201621096991.9U CN206441733U (en) | 2016-09-30 | 2016-09-30 | A kind of high threshold voltage high mobility notched gates MOSFET structure |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107680901A (en) * | 2017-09-27 | 2018-02-09 | 闽南师范大学 | The flexible compound substrate and manufacture method of a kind of semiconductor epitaxial |
| CN109540987A (en) * | 2018-11-09 | 2019-03-29 | 中山大学 | Based on groove structure without reference electrode GaN base pH sensor and preparation method thereof |
| WO2019241905A1 (en) * | 2018-06-19 | 2019-12-26 | 深圳大学 | Heterojunction field effect transistor and preparation method therefor |
-
2016
- 2016-09-30 CN CN201621096991.9U patent/CN206441733U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107680901A (en) * | 2017-09-27 | 2018-02-09 | 闽南师范大学 | The flexible compound substrate and manufacture method of a kind of semiconductor epitaxial |
| CN107680901B (en) * | 2017-09-27 | 2020-07-07 | 闽南师范大学 | Flexible composite substrate for semiconductor epitaxy and manufacturing method |
| WO2019241905A1 (en) * | 2018-06-19 | 2019-12-26 | 深圳大学 | Heterojunction field effect transistor and preparation method therefor |
| CN109540987A (en) * | 2018-11-09 | 2019-03-29 | 中山大学 | Based on groove structure without reference electrode GaN base pH sensor and preparation method thereof |
| CN109540987B (en) * | 2018-11-09 | 2020-12-04 | 中山大学 | Reference electrode-free GaN-based pH sensor based on groove structure and preparation method thereof |
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