CN206379715U - The anti-reverse improvement circuit of DC supply input - Google Patents
The anti-reverse improvement circuit of DC supply input Download PDFInfo
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- CN206379715U CN206379715U CN201621433138.1U CN201621433138U CN206379715U CN 206379715 U CN206379715 U CN 206379715U CN 201621433138 U CN201621433138 U CN 201621433138U CN 206379715 U CN206379715 U CN 206379715U
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- channel mos
- circuit
- mos pipe
- reverse
- connection
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Abstract
The utility model provides a kind of anti-reverse improvement circuit of DC supply input, overcome the loss of prior art reverse-connection preventing circuit high, reversal connection circuit is easily breakdown the shortcomings of lose effect, it includes power interface and is connected to the reverse-connection preventing circuit of power interface, it is characterized in that, the reverse-connection preventing circuit includes the N-channel MOS pipe for being used to just connect conducting reversal connection cut-off, the grid of the N-channel MOS pipe is connected to power interface positive output end by one drive circuit, the drain electrode connection power interface negative output terminal of the N-channel MOS pipe, the source electrode connection load negative input end of the N-channel MOS pipe, RC circuits are parallel between the drain electrode of the N-channel MOS pipe and source electrode, mu balanced circuit is parallel between the source electrode and grid of the N-channel MOS pipe.The utility model have it is simple in construction, it is low in energy consumption, the advantages of small volume.
Description
Technical field
The utility model is related to a kind of reverse-connection preventing circuit, more particularly to a kind of anti-reverse improvement circuit of DC supply input.
Background technology
Industrial control unit (ICU) etc. needs that generally all power supply counnter attack can be increased in power input in the instrument of DC supply input
Connect in circuit, general reverse-connection preventing circuit such as Fig. 1, Fig. 1, power supply is inputted after diode D1 to whole by interface J1 1 and 3 pin
Late-class circuit is powered, under normal circumstances, and the pin of interface 3 inputs for positive source, diode forward conducting, circuit normal work;When
Reverse power connection, when the pin of interface 1 is that positive source is inputted, diode D1 reversely ends, and does not have electric current to pass through in circuit, after protecting
Level circuit, it is to avoid the late-class circuit that reverse power connection is caused is damaged.This circuit is frequently encountered following two problems in the application:
1st, diode forward conducting needs 0.7V pressure drop, and the voltage of late-class circuit can be because the partial pressure of diode be caused under supply voltage
Drop, particularly when input voltage is below 5V, voltage declines more than 14%, it is impossible to meet the normal work electricity of back-end circuit
Pressure;2nd, as late-class circuit operating current larger (10A), the loss (7 watts) on diode is larger, cause energy loss it is same
When add the radiating pressure of instrument.
And to solve the above problems, Chinese patent literature discloses a kind of anti-reverse connection circuit of direct current power supply [application number:
CN201010121102.0], including DC power polarity detection branch, it is connected between the positive and negative input of dc source, is used
In detection dc source just to connect or reversal connection;Triode, its base stage is connected with the DC power polarity detection branch, transmitting
Pole is connected with the dc source positive input terminal;Switch element, it is connected to the positive and negative input of dc source after being concatenated with load
Between, while its control end is connected with the colelctor electrode of the triode;The DC power polarity detection branch is being detected directly
Stream power supply is when just connecing, by controlling the triode ON so that the switch element is closed;The DC power polarity inspection
Branch road is surveyed when detecting dc source for reversal connection, by controlling the triode to turn off the switch element is opened.
Although such scheme reduces the power consumption of original circuit diode to a certain extent, its circuit still has
Structure is more loaded, and still higher shortcoming is lost.
Utility model content
The purpose of this utility model be in view of the above-mentioned problems, provide it is a kind of have low, direct current the advantages of small volume is lost
The anti-reverse improvement circuit of power input.
To reach above-mentioned purpose, the utility model employs following technical proposal:DC supply input of the present utility model
Anti-reverse improvement circuit, including power interface and the reverse-connection preventing circuit for being connected to power interface, it is characterised in that described anti-reverse
Circuit includes the N-channel MOS pipe for being used to just connect conducting reversal connection cut-off, and the grid of the N-channel MOS pipe passes through one drive circuit
It is connected to power interface positive output end, the drain electrode connection power interface negative output terminal of the N-channel MOS pipe, the N-channel MOS
The source electrode connection load negative input end of pipe, is parallel with RC circuits, the N-channel between the drain electrode of the N-channel MOS pipe and source electrode
Mu balanced circuit is parallel between the source electrode and grid of metal-oxide-semiconductor.
By above-mentioned technical proposal, the conducting and disconnection of circuit are controlled using the switching characteristic of metal-oxide-semiconductor, so as to prevent power supply
Reversal connection is damaged to load-strap, and the conducting resistance for the N-channel MOS pipe that the utility model is used is small, and power consumption is far below diode
And triode, and this circuit has simple in construction, the low advantage of input cost.
In the above-mentioned anti-reverse improvement circuit of DC supply input, the drive circuit includes a second resistance, and institute
One end connection power interface positive output end and load positive input terminal of second resistance are stated, the other end connects the grid of N-channel MOS pipe
Pole.
By above-mentioned technical proposal, second resistance provides voltage bias for N-channel MOS pipe, at the same for N-channel MOS pipe and
Voltage-stabiliser tube plays a part of current limliting.
Circuit is improved above-mentioned DC supply input is anti-reverse, and the RC circuits include the electric capacity being serially connected and the
One resistance, and the two ends of RC circuits connect power interface negative output terminal and load negative input end respectively.
In the above-mentioned anti-reverse improvement circuit of DC supply input, the size of the electric capacity is 1nF, the first resistor
Size be 33 Ω.
By above-mentioned technical proposal, first resistor and electric capacity suppress peak voltage, play a part of buffering.
In the above-mentioned anti-reverse improvement circuit of DC supply input, the mu balanced circuit includes a voltage-stabiliser tube, and described
The negative electrode of voltage-stabiliser tube is connected to the grid of N-channel MOS pipe and the common port of second resistance, and the anode of the voltage-stabiliser tube is connected to
Source electrode, RC circuits and the common port for loading negative input end of N-channel MOS pipe.
By above-mentioned technical proposal, voltage-stabiliser tube is used to the voltage of grid being limited in a value relatively stablized, and plays protection
The effect of metal-oxide-semiconductor.
In the above-mentioned anti-reverse improvement circuit of DC supply input, the model of the N-channel MOS pipe
FDMS86103L。
Compared with prior art, the utility model has the advantage of:1st, the conducting resistance very little of N-channel MOS pipe, is 8m
Ω, when electric current is 10A, pressure drop only has 80mV, far below the 0.7V of traditional circuit;2nd, when electric current is 10A in circuit, loss
For 0.8 watt, far below 7 watts of traditional circuit;3rd, as electric current larger (3-10A) in circuit, circuit institute can be effectively reduced
The volume needed:Because traditional circuit needs bigger radiator to ensure circuit normal work, and the utility model is due to power consumption
Low reason only needs to pcb board level radiating, it is not necessary to increase radiator in addition.
Brief description of the drawings
Fig. 1 is the circuit theory diagrams of prior art;
Fig. 2 is the circuit theory diagrams that the utility model is provided.
In figure, power interface J1;Power interface negative output terminal 1;Power interface positive output end 2;Reverse-connection preventing circuit 3;N-channel
Metal-oxide-semiconductor Q1;Grid G;Drain D;Source S;Drive circuit 4;Second resistance R2;Mu balanced circuit 5;Voltage-stabiliser tube Z1;RC circuits 6;The
One resistance R1;Electric capacity C1;Load negative input end DC-;Load positive input terminal DC+.
Embodiment
As shown in Fig. 2 this code device signal failure detector circuit based on two-way optocoupler,
The anti-reverse improvement circuit of DC supply input of the present utility model, including power interface J1 and it is connected to power interface
J1 reverse-connection preventing circuit 3, it is characterised in that the reverse-connection preventing circuit 3 includes the N-channel MOS for being used to just connect conducting reversal connection cut-off
Pipe Q1, the N-channel MOS pipe Q1 grid G are connected to power interface positive output end 2, the N ditches by one drive circuit 4
Road metal-oxide-semiconductor Q1 drain D connection power interface negative output terminal 1, the source S connection load negative input end of the N-channel MOS pipe Q1
Be parallel with RC circuits 6 between DC-, the N-channel MOS pipe Q1 drain D and source S, the source S of the N-channel MOS pipe Q1 and
Mu balanced circuit 5 is parallel between grid G;The utility model controls the conducting and disconnection of circuit using the switching characteristic of metal-oxide-semiconductor, from
And prevent from reverse power connection to load-strap to damage, and the conducting resistance for the N-channel MOS pipe Q1 that the utility model is used is small, power consumption
Far below diode and triode, and this circuit has simple in construction, the low advantage of input cost.
Further, drive circuit 4 includes a second resistance R2, and one end connection power interface of the second resistance R2
Positive output end 2 and load positive input terminal DC+, other end connection N-channel MOS pipe Q1 grid G, wherein second resistance R2 is N ditches
Road metal-oxide-semiconductor Q1 provides voltage bias, while being that N-channel MOS pipe Q1 and voltage-stabiliser tube Z1 play a part of current limliting.
Because when N-channel MOS pipe Q1 is closed and is opened, peak voltage occurs for drain D, it is necessary to which RC circuits 6 are with suppression
Peak voltage processed, wherein RC circuits 6 specifically include the electric capacity C1 and first resistor R1 being serially connected, and the two ends point of RC circuits 6
Not Lian Jie power interface negative output terminal 1 and load negative input end DC-, in the present embodiment, the frequency of resonance spikes voltage is about
35MHz, the value of parasitic capacitance is about 110PF, so electric capacity C1 values take 8-10 times of parasitic capacitance value, about 1nF, according to
1. and 2. formula:
L=1/ (2 Π F)2*C ①
Wherein:L=stray inductances, F=resonant frequencies, C=parasitic capacitance values
Draw L ≈ 0.18;
Z=SQRT (L/C) is 2.
Wherein:Z=characteristic impedance ≈ R, draw the Ω of R ≈ 33.
So the size of the first resistor R1 in the present embodiment can take 33 Ω.
More specifically, mu balanced circuit 5 includes a voltage-stabiliser tube Z1, and the negative electrode of the voltage-stabiliser tube Z1 is connected to N-channel MOS pipe
Q1 grid G and second resistance R2 common port, the anode of the voltage-stabiliser tube Z1 be connected to N-channel MOS pipe Q1 source S,
The common port of RC circuits 6 and load negative input end DC-, voltage-stabiliser tube Z1 be used for by the voltage of grid G be limited in one it is relatively stable
Value, plays a part of protecting metal-oxide-semiconductor.
Model FDMS86103L N-channel MOS pipe Q1 has the conducting resistance of very little, and with smaller chip chi
Very little, it is integrated in a variety of industrial standards and resistance to thermal enhanced package, and service life is longer, and hardware performance is more preferable.
The utility model is when coming into operation, when power interface positive output end 2 is that positive source is inputted, N-channel MOS pipe
Q1 is turned on, late-class circuit normal work;And when reverse power connection, N-channel MOS pipe Q1 is not turned on, reversal connection cut-off effect is played, is protected
The N-channel MOS pipe Q1 used in late-class circuit, and the present embodiment is protected when electric current is 10A, pressure drop is 80mv or so, pressure drop
0.2V of 0.7V far below diode or so and triode or so, with smaller energy consumption, it is not required that increase is extra to be dissipated
Hot device, the effectively volume needed for reduction circuit.
Specific embodiment described herein is only to the utility model spirit explanation for example.The utility model institute
Category those skilled in the art can make various modifications or supplement or using similar to described specific embodiment
Mode substitute, but without departing from spirit of the present utility model or surmount scope defined in appended claims.
Although more having used power interface J1 herein;Power interface negative output terminal 1;Power interface positive output end 2;It is anti-
Reversal connection circuit 3;N-channel MOS pipe Q1;Grid G;Drain D;Source S;Drive circuit 4;Second resistance R2;Mu balanced circuit 5;Voltage stabilizing
Pipe Z1;RC circuits 6;First resistor R1;Electric capacity C1;Load negative input end DC-;The terms such as positive input terminal DC+ are loaded, but are not arranged
Except the possibility using other terms.It is used for the purpose of more easily describing and explaining of the present utility model using these terms
Matter;Any additional limitation is construed as all to disagree with the utility model spirit.
Claims (6)
1. a kind of anti-reverse improvement circuit of DC supply input, including power interface (J1) and it is connected to the anti-of power interface (J1)
Reversal connection circuit (3), it is characterised in that the reverse-connection preventing circuit (3) includes the N-channel MOS pipe for being used to just connect conducting reversal connection cut-off
(Q1), the grid (G) of the N-channel MOS pipe (Q1) is connected to power interface positive output end (2) by one drive circuit (4),
Drain electrode (D) the connection power interface negative output terminal (1) of the N-channel MOS pipe (Q1), the source electrode of the N-channel MOS pipe (Q1)
(S) connection load negative input end (DC-), RC circuits are parallel between the drain electrode (D) of the N-channel MOS pipe (Q1) and source electrode (S)
(6), it is parallel with mu balanced circuit (5) between the source electrode (S) and grid (G) of the N-channel MOS pipe (Q1).
2. the anti-reverse improvement circuit of DC supply input according to claim 1, it is characterised in that the drive circuit
(4) second resistance (R2) is included, and one end connection power interface positive output end (2) of the second resistance (R2) and load are just
Input (DC+), the grid (G) of other end connection N-channel MOS pipe (Q1).
3. the anti-reverse improvement circuit of DC supply input according to claim 1, it is characterised in that the RC circuits (6)
Including the electric capacity (C1) being serially connected and first resistor (R1), and the two ends of RC circuits (6) connect power interface negative output respectively
Hold (1) and load negative input end (DC-).
4. the anti-reverse improvement circuit of DC supply input according to claim 3, it is characterised in that the electric capacity (C1)
Size is 1nF, and the size of the first resistor (R1) is 33 Ω.
5. the anti-reverse improvement circuit of DC supply input according to claim 1, it is characterised in that the mu balanced circuit
(5) voltage-stabiliser tube (Z1) is included, and the negative electrode of the voltage-stabiliser tube (Z1) is connected to N-channel MOS pipe (Q1) grid (G) and second
The common port of resistance (R2), the anode of the voltage-stabiliser tube (Z1) is connected to N-channel MOS pipe (Q1) source electrode (S), RC circuits
(6) and load negative input end (DC-) common port.
6. the anti-reverse improvement circuit of DC supply input according to claim 1, it is characterised in that the N-channel MOS pipe
(Q1) model FDMS86103L.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201621433138.1U CN206379715U (en) | 2016-12-26 | 2016-12-26 | The anti-reverse improvement circuit of DC supply input |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201621433138.1U CN206379715U (en) | 2016-12-26 | 2016-12-26 | The anti-reverse improvement circuit of DC supply input |
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Publication Number | Publication Date |
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CN206379715U true CN206379715U (en) | 2017-08-04 |
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CN201621433138.1U Expired - Fee Related CN206379715U (en) | 2016-12-26 | 2016-12-26 | The anti-reverse improvement circuit of DC supply input |
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CN (1) | CN206379715U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113078616A (en) * | 2021-04-02 | 2021-07-06 | 广东美电贝尔科技集团股份有限公司 | Rear-stage direct-current power supply circuit |
-
2016
- 2016-12-26 CN CN201621433138.1U patent/CN206379715U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113078616A (en) * | 2021-04-02 | 2021-07-06 | 广东美电贝尔科技集团股份有限公司 | Rear-stage direct-current power supply circuit |
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Legal Events
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GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20170804 Termination date: 20201226 |
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CF01 | Termination of patent right due to non-payment of annual fee |