CN102231598B - Power supply circuit - Google Patents

Power supply circuit Download PDF

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Publication number
CN102231598B
CN102231598B CN201110152021.1A CN201110152021A CN102231598B CN 102231598 B CN102231598 B CN 102231598B CN 201110152021 A CN201110152021 A CN 201110152021A CN 102231598 B CN102231598 B CN 102231598B
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CN
China
Prior art keywords
power
connected
source
diode
bias
Prior art date
Application number
CN201110152021.1A
Other languages
Chinese (zh)
Other versions
CN102231598A (en
Inventor
周翔
姚洪涛
罗轶峰
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三一重工股份有限公司
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Priority to CN201110152021.1A priority Critical patent/CN102231598B/en
Publication of CN102231598A publication Critical patent/CN102231598A/en
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Publication of CN102231598B publication Critical patent/CN102231598B/en

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/74Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of diodes

Abstract

The invention relates to the technical field of electronics and discloses a power supply circuit. The power supply circuit comprises an MOS (Metal Oxide Semiconductor) transistor and a bias control circuit; the source and the drain of the MOS transistor are connected between a power supply and a load in series; and the bias control circuit controls the bias state between the grid and the source of the MOS transistor according to a received power-on time sequence signal. The power supply circuit disclosed in the embodiment of the invention controls the bias state between the grid and the source of the MOS transistor by receiving an external pulse control signal (power-on time sequence signal) via the bias control circuit, namely, whether a power source supplies power to the load is controlled by the external control signal in order to ensure that the power source normally supplies power to the load. Moreover, by accessing a piezoresistor and a TVS (Transient Voltage Suppressor) transistor, the invention realizes the anti-access protection and transient protection functions of the power source with less elements.

Description

A kind of power circuit

Technical field

The present invention relates to electronic technology field, particularly relate to a kind of power circuit.

Background technology

In electronic controller system; existing reverse connection prevention protection circuit is conventionally for the Control System Design of plate level; general power consumption is lower; electric current is less, utilizes diode unilateral conduction characteristic or little electric current resettable fuse and diode unilateral conduction characteristic jointly to complete the reversal connection protection to power supply object power supply.But for the plate level power supply system that high-power driving is provided for load, especially vehicle-mounted power driving power supply system, its supply voltage is often 24V, therefore single line load current up to tens amperes, utilize single diode oppositely by characteristic exist power consumption loss large, cannot resist the problems such as transient impact.The reversal connection protection that little electric current resettable fuse and diode complete jointly cannot realize at all.And existing large power supply protection scheme is often for large current system specialized designs protection module independently, volume is large conventionally, device is many, and circuit is complicated, the protection of the especially vehicle-mounted plate level of uncomfortable plywood level power power-supply power power-supply.

Therefore, how developing a kind of power circuit that is applicable to the especially vehicle-mounted power power-supply of plate level power power-supply, is those skilled in the art's technical barriers urgently to be resolved hurrily.

Summary of the invention

In order to overcome the above-mentioned defect of prior art, the invention provides a kind of power circuit.This power circuit comprises metal-oxide-semiconductor (metal-oxide-semiconductor, Metal-oxide-semicondutor field effect transistor) and bias control circuit, the source electrode of described metal-oxide-semiconductor and drain electrode are serially connected with between power supply and load, and described bias control circuit is according to the bias state between the electrifying timing sequence signal controlling metal-oxide-semiconductor grid source receiving; Described bias control circuit comprises the first electric capacity, the second electric capacity, the first diode, the second diode, the 3rd diode, biasing NMOS pipe and bias PMOS pipe; Biasing NMOS pipe is connected with the grid of bias PMOS pipe and as input, receives the input of electrifying timing sequence signal, biasing NMOS pipe is connected as output with the drain electrode of bias PMOS pipe, this output is connected with one end of the first electric capacity, the source electrode of bias PMOS pipe is connected in the anode with positive source and the first diode, the source electrode of biasing NMOS pipe is connected in the anode of the 3rd diode, and the negative electrode of the 3rd diode is connected in power cathode; The other end of the first electric capacity is connected in the negative electrode of the first diode and the anode of the second diode, and one end of the negative electrode of the second diode and the second electric capacity is connected in the grid of metal-oxide-semiconductor, and the other end of the second electric capacity is connected in positive source or negative pole.

Preferably, between positive source and power cathode, be connected with piezo-resistance.

Preferably, between the drain electrode of metal-oxide-semiconductor and positive source or negative pole, be connected with TVS pipe (Transient Voltage Suppressor, Transient Voltage Suppressor).

Preferably, described metal-oxide-semiconductor is N channel power MOS pipe, and its source electrode is connected in positive source, and drain electrode is connected in load.

Preferably, the negative electrode of described TVS pipe is connected in the drain electrode of metal-oxide-semiconductor, and the anodic bonding of described TVS pipe is in power cathode.

A kind of power circuit provided by the invention; by bias control circuit, receive external pulse control signal (electrifying timing sequence signal) and control the bias state between metal-oxide-semiconductor grid source; be whether power power-supply is controlled by external pulse control signal to the power supply state of load; take guaranteed output power supply as load normal power supply; in addition; in preferred version, by access piezo-resistance and TVS, manage, with few device, realize reverse connecting protection and the transient protective function of power power-supply.

Accompanying drawing explanation

Figure 1 shows that the schematic diagram of a kind of power circuit that the embodiment of the present invention provides;

Embodiment

In order to make those skilled in the art understand better technical scheme of the present invention, below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.It should be pointed out that to the description of concrete structure and description order, to be only the explanation to specific embodiment in this part, should not be considered as that protection scope of the present invention is had to any restriction.

Please refer to Fig. 1, Figure 1 shows that the schematic diagram of a kind of power circuit that the embodiment of the present invention provides.

As shown in the figure, a kind of power circuit of the embodiment of the present invention comprises that piezo-resistance R1, TVS pipe D2, N channel power MOS pipe U2(conducting resistance are between a few milliohm to tens milliohms), biasing metal-oxide-semiconductor U3 and U4(U3 be bias PMOS pipe, U4 is biasing NMOS pipe), the first diode D3, the second diode D4, the 3rd diode D5, the first capacitor C 1 and the second capacitor C 2; The positive polarity of power power-supply meets VCC, minus earth line GND; The annexation of this power circuit is as follows:

Piezo-resistance R1 is parallel between positive source VCC and ground wire GND, the source S of N channel power MOS pipe U2 connects positive source VCC(or piezo-resistance R1 one end), the drain D of N channel power MOS pipe U2 connects the negative electrode of TVS pipe D2, the TVS pipe other end of D2 and one end of ground wire GND(or load) be connected, the grid G of N channel power MOS pipe U2 connects the negative electrode of the second diode D4 and one end of the second capacitor C 2, the other end of the second capacitor C 2 is connected with ground wire GND (if U2 is P channel power MOS pipe, be connected with positive source), one end of the first capacitor C 1 is connected with the anode of the second diode D4 with the negative electrode of the first diode D3 respectively, the grid of bias PMOS pipe U3 and biasing NMOS pipe U4 is connected and receives from outside electrifying timing sequence signal (being external pulse control signal P) as input, the drain electrode of bias PMOS pipe U3 and biasing NMOS pipe U4 is connected and as output, is connected in the other end of the first capacitor C 1, the source electrode of bias PMOS pipe U3 is connected with the anode of the first diode with positive source VCC, biasing NMOS pipe U4 is connected with the anode of the 3rd diode D5, the negative electrode of the 3rd diode D5 is connected with ground wire GND, wherein, bias PMOS pipe U3 and biasing NMOS pipe U4, the first diode D3, the second diode D4, the 3rd diode D5, the first capacitor C 1 and the common bias control circuit that forms N channel power MOS pipe U2 of the second capacitor C 2.

In the course of the work, when power power-supply exact connect ion, it is infinitely great that the resistance of piezo-resistance R1 can be thought, in open circuit, now, the diode-built-in conducting in advance of N channel power MOS pipe U2, biasing metal-oxide-semiconductor U3 and U4 can be logical at the effect lower whorl conductance of electrifying timing sequence signal (being external pulse control signal P), by the first capacitor C 1, the second capacitor C 2 are discharged and recharged, make N channel power MOS pipe U2Shan source normal bias, thereby the drain-source passage of N channel power MOS pipe U2 is opened, for load provides normal operation power supply;

In the course of the work, when power power-supply is during in reversal connection state, the resistance of piezo-resistance R1 is still infinitely great, in open circuit, now, TVS pipe D2 is in conducting state, cannot normal bias between N channel power MOS pipe U2Shan source, the drain-source passage of N channel power MOS pipe U2 is all the time in closed condition, and the path of reverse electrical source is cut off, and load is exerted an influence avoiding;

In the course of the work; when power circuit is subject to outside glitch (as thunderbolt, surge etc.); piezo-resistance R1 resistance value sharply reduces; make to form low impedance path between positive source VCC and ground wire GND; simultaneously; TVS pipe D2(is generally relatively high power) can sponge most transient energy, thus protection load is not subject to glitch.

It should be noted that, in above-described embodiment, N channel power MOS pipe U2Shan source bias state is subject to the control of bias control circuit, and bias control circuit is to carry out corresponding operating according to receiving external pulse control signal, be that power power-supply is controlled by external pulse control signal whether to the electric-opening that supplies of load, so can guarantee not have power stage when power power-supply system powers on, prevented the abnormal operation of powered on moment, the form of external pulse control signal can be set output by the control circuit outside power circuit, to meet various control needs, in addition, above-mentioned bias control circuit is when power power-supply reversal connection, also can make reverse bias between N channel power MOS pipe U2Shan source, thereby the drain-source passage of N channel power MOS pipe U2 is remained on to closed condition,

It should be noted that, bias control circuit in above-described embodiment also can adopt other circuit that can realize corresponding function to replace, and for example the circuit being comprised of bias PMOS pipe U3 and biasing NMOS pipe U4 in bigoted control circuit also can replace with the TTL circuit that can realize similar functions.

It should be noted that, above-described embodiment is used N to link up power MOS pipe U2, in other embodiments of the invention, also can use P channel MOS tube, its source electrode is connected with ground wire GND, and drain electrode is connected with load, the arrangement of its bias control circuit is similar to the above embodiments, does not hereby repeat.

A kind of power circuit that the embodiment of the present invention provides; by electrifying timing sequence signal (external pulse control signal) control bias control circuit with realize N link up power MOS pipe drain-source passage conducting and close; and by coordinating of piezo-resistance and TVS pipe; not only prevented the abnormal operation of power power-supply at powered on moment; also make power power-supply there is reversal connection protection function when reversal connection state, when being subject to surge impact, there is transient protective function.

The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (5)

1. a power circuit, it is characterized in that, described power circuit comprises metal-oxide-semiconductor and bias control circuit, and the source electrode of described metal-oxide-semiconductor and drain electrode are serially connected with between power supply and load, and described bias control circuit is according to the bias state between the electrifying timing sequence signal controlling metal-oxide-semiconductor grid source receiving; Described bias control circuit comprises the first electric capacity, the second electric capacity, the first diode, the second diode, the 3rd diode, biasing NMOS pipe and bias PMOS pipe; Biasing NMOS pipe is connected with the grid of bias PMOS pipe and as input, receives the input of electrifying timing sequence signal, biasing NMOS pipe is connected as output and is connected in one end of the first electric capacity with the drain electrode of bias PMOS pipe, the source electrode of bias PMOS pipe is connected in the anode with positive source and the first diode, the source electrode of biasing NMOS pipe is connected in the anode of the 3rd diode, and the negative electrode of the 3rd diode is connected in power cathode; The other end of the first electric capacity is connected in the negative electrode of the first diode and the anode of the second diode, and one end of the negative electrode of the second diode and the second electric capacity is connected in the grid of metal-oxide-semiconductor, and the other end of the second electric capacity is connected in positive source or negative pole.
2. power circuit as claimed in claim 1, is characterized in that, between positive source and power cathode, is connected with piezo-resistance.
3. power circuit as claimed in claim 2, is characterized in that, is connected with TVS pipe between the drain electrode of metal-oxide-semiconductor and positive source or negative pole.
4. power circuit as claimed in claim 3, is characterized in that, described metal-oxide-semiconductor is N channel power MOS pipe, and its source electrode is connected in positive source, and drain electrode is connected in load.
5. power circuit as claimed in claim 4, is characterized in that, the negative electrode of described TVS pipe is connected in the drain electrode of metal-oxide-semiconductor, and the anodic bonding of described TVS pipe is in power cathode.
CN201110152021.1A 2011-06-08 2011-06-08 Power supply circuit CN102231598B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110152021.1A CN102231598B (en) 2011-06-08 2011-06-08 Power supply circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201110152021.1A CN102231598B (en) 2011-06-08 2011-06-08 Power supply circuit
PCT/CN2012/074298 WO2012167673A1 (en) 2011-06-08 2012-04-18 Power supply circuit

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CN102231598A CN102231598A (en) 2011-11-02
CN102231598B true CN102231598B (en) 2014-01-15

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* Cited by examiner, † Cited by third party
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CN102231598B (en) * 2011-06-08 2014-01-15 三一重工股份有限公司 Power supply circuit
DE102012216185A1 (en) * 2012-09-12 2014-03-13 Robert Bosch Gmbh A semiconductor transistor limiting circuit and method of limiting the voltage across a semiconductor transistor
CN103354415B (en) * 2013-06-28 2016-01-20 江苏浩峰汽车附件有限公司 A kind of for anti-reverse N-channel MOS tube grid suspension drive circuit
CN103595035A (en) * 2013-11-14 2014-02-19 江苏绿扬电子仪器集团有限公司 Protective circuit capable of improving performance of power source
CN105068636A (en) * 2015-08-25 2015-11-18 山东超越数控电子有限公司 Anti-shock surge circuit applied to ruggedized computer
CN107168901A (en) * 2016-03-08 2017-09-15 德昌电机(深圳)有限公司 Mongline two-way communication circuit
CN107946299A (en) * 2017-12-14 2018-04-20 上海艾为电子技术股份有限公司 A kind of load switch and electronic equipment

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GB2356504A (en) * 1999-10-09 2001-05-23 Bosch Gmbh Robert A high side FET switch with a charge pump driven by a relatively low voltage CMOS inverter
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Publication number Priority date Publication date Assignee Title
US4992683A (en) * 1989-09-28 1991-02-12 Motorola, Inc. Load driver with reduced dissipation under reverse-battery conditions
GB2356504A (en) * 1999-10-09 2001-05-23 Bosch Gmbh Robert A high side FET switch with a charge pump driven by a relatively low voltage CMOS inverter
CN201398073Y (en) * 2009-05-22 2010-02-03 上海华魏光纤传感技术有限公司 Novel power supply safety protection system

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WO2012167673A1 (en) 2012-12-13
CN102231598A (en) 2011-11-02

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