CN206323639U - A kind of three sandwich circuit boards of warpage preventing - Google Patents
A kind of three sandwich circuit boards of warpage preventing Download PDFInfo
- Publication number
- CN206323639U CN206323639U CN201621224368.7U CN201621224368U CN206323639U CN 206323639 U CN206323639 U CN 206323639U CN 201621224368 U CN201621224368 U CN 201621224368U CN 206323639 U CN206323639 U CN 206323639U
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- Prior art keywords
- fully cured
- circuit boards
- core plate
- copper
- sandwich circuit
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Abstract
The utility model provides a kind of three sandwich circuit boards of warpage preventing, three sandwich circuit boards of the warpage preventing include a layers of copper, a prepreg and the not fully cured core plate being laminated, and the prepreg is located between the layers of copper and the not fully cured core plate.The core plate of three sandwich circuit boards of the warpage preventing is not fully cured core plate, and when not fully cured core plate is with prepreg and layers of copper pressing, the shrinkage stress of its shrinkage stress and prepreg balances each other, so as to prevent the warpage issues of three sandwich circuit boards.
Description
Technical field
The utility model is related to a kind of three sandwich circuit boards child's bogey, more particularly to a kind of warpage preventing three sandwich circuits
Plate.
Background technology
Multi-layer sheet is main based on even number multi-layer sheet in the industry at present, such as four, six, eight laminates, but still have part end
Bring out in the consideration of product function, cost, by PCB design into odd number plate, such as three ply board.
As shown in figure 1, the common structure of three ply board 1 ' is Copper Foil 10 '+prepreg 20 '+core plate 30 ', such as 1oz+2*
2116+0.25 1/1(2*2116).Although such template is with being symmetrical structure in this structure, unilateral due in pressing
Prepreg 20 ' can produce shrinkage stress in cure stage, and the shrinkage stress of the layer of core plate 30 ' is relatively small, so three ply board
After 1 ' pressing, it may appear that warpage issues (mainly based on bow), this warpage is structural issue.
Warpage issues can influence the normal production procedures of PCB, can also influence terminal client upper part and assembling.Current part terminal
It is required that three ply board depth of camber is less than 0.75%, and use normal production technology production PCB three ply boards 1 ', it is impossible to meet angularity
Requirement.
Therefore, it is necessary to provide a kind of three sandwich circuit board, structural warpage issues can be prevented, to overcome above-mentioned prior art
Deficiency.
Utility model content
The purpose of this utility model is to provide a kind of three sandwich circuit board, can prevent structural warpage issues.
To achieve the above object, the utility model provides a kind of three sandwich circuit boards of warpage preventing, three layers of the warpage preventing
Wiring board includes a layers of copper, a prepreg and the not fully cured core plate being laminated, and the prepreg is located at institute
State between layers of copper and the not fully cured core plate.
It is preferred that the prepreg is located between the layers of copper and the not fully cured core plate.
It is preferred that the layers of copper is bonded to the side of the not fully cured core plate by the prepreg.
It is preferred that the thickness of the thickness prepreg of the not fully cured core plate is thick.
It is preferred that the not fully cured core plate is formed by upper layers of copper, not fully cured insulating barrier, the pressing of lower layers of copper.
It is preferred that the not fully cured insulating barrier is bonded the upper layers of copper and the lower layers of copper.
Prior art is compared, and the core plate of three sandwich circuit boards of warpage preventing of the present utility model is not fully cured core plate, no
When core plate is fully cured with prepreg and layers of copper pressing, the shrinkage stress of its shrinkage stress and prepreg balances each other, so that
The warpage issues of three sandwich circuit boards can be prevented.
Brief description of the drawings
Fig. 1 is the structural representation of the sandwich circuit board of prior art three.
Fig. 2 is the structural representation of three sandwich circuit boards of the utility model warpage preventing.
Fig. 3 is the schematic diagram of the utility model core plate and heating platen.
Embodiment
The several different most preferred embodiments of the utility model are illustrated below with reference to the accompanying drawings, wherein identical mark in different figures
Number represent identical part.
Fig. 2 show three sandwich circuit boards 1 of warpage preventing of the present utility model, can prevent structural warpage issues, such as figure institute
Show, three sandwich circuit boards 1 of warpage preventing include the layers of copper 10, a prepreg 20 and the not fully cured core plate that are laminated
30, prepreg 20 is located between layers of copper 10 and not fully cured core plate 30.The thickness of not fully cured core plate 30 is compared with semi-solid preparation
The thickness of piece 20 is thick.Not fully cured core plate 30 is pressed and formed by upper layers of copper 31, not fully cured insulating barrier 33, lower layers of copper 35,
Not fully cured insulating barrier 33 is bonded with layers of copper 31 to lower layers of copper 35.As shown in figure 3, the not fully cured core plate of the hot pressing of heating platen 2
When 30, pressed using low temperature or/and short time, temperature is less than 180 degrees Celsius, and pressing time is 20~30min so that not exclusively
Solidify core plate 30 and be in not fully cured state.It is preferred that the curing degree of not fully cured core plate 30 more connects with prepreg 20
Closely, the effect for improving three sandwich circuit board warpage issues is more notable.Prepreg 20 is semi-cured state, with viscosity, hot pressing half
When cured sheets 20, layers of copper 10 are with not fully cured core plate 30, prepreg 20 is not fully cured with not fully cured core plate 30
Insulating barrier 33 shrinks simultaneously, and shrinkage stress is roughly equal, balance, so the warpage issues of three sandwich circuit boards 1 can be prevented.
Prior art is compared, and the core plate of three sandwich circuit boards 1 of warpage preventing of the present utility model is not fully cured core plate 30,
When not fully cured core plate 30 is with prepreg 20 and the pressing of layers of copper 10, the shrinkage stress phase of its shrinkage stress and prepreg 20
Balance, so as to prevent the warpage issues of three sandwich circuit boards.
Above disclosed is only preferred embodiment of the present utility model, can not limit this practicality with this certainly new
The interest field of type, therefore the equivalent variations made according to present utility model application the scope of the claims, still belong to the utility model and are covered
Scope.
Claims (6)
1. three sandwich circuit boards of a kind of warpage preventing, it is characterised in that three sandwich circuit boards of the warpage preventing include what is be laminated
One layers of copper, a prepreg and a not fully cured core plate.
2. three sandwich circuit boards of warpage preventing as claimed in claim 1, it is characterised in that：The prepreg is located at the layers of copper
Between the not fully cured core plate.
3. three sandwich circuit boards of warpage preventing as claimed in claim 1, it is characterised in that：The prepreg glues the layers of copper
It is connected to the side of the not fully cured core plate.
4. three sandwich circuit boards of warpage preventing as claimed in claim 1, it is characterised in that：The thickness of the not fully cured core plate
The thickness of the prepreg is thick.
5. three sandwich circuit boards of warpage preventing as claimed in claim 1, it is characterised in that：The not fully cured core plate is by upper copper
Layer, the pressing of not fully cured insulating barrier, lower layers of copper are formed.
6. three sandwich circuit boards of warpage preventing as claimed in claim 5, it is characterised in that：The not fully cured insulating barrier bonding
The upper layers of copper and the lower layers of copper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621224368.7U CN206323639U (en) | 2016-11-09 | 2016-11-09 | A kind of three sandwich circuit boards of warpage preventing |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621224368.7U CN206323639U (en) | 2016-11-09 | 2016-11-09 | A kind of three sandwich circuit boards of warpage preventing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206323639U true CN206323639U (en) | 2017-07-11 |
Family
ID=59264850
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201621224368.7U Active CN206323639U (en) | 2016-11-09 | 2016-11-09 | A kind of three sandwich circuit boards of warpage preventing |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206323639U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113194640A (en) * | 2021-04-28 | 2021-07-30 | 中国科学院微电子研究所 | Manufacturing method of low-warpage high-density packaging substrate |
| CN113207245A (en) * | 2021-04-28 | 2021-08-03 | 中国科学院微电子研究所 | Method for manufacturing low-warpage printed wiring board |
-
2016
- 2016-11-09 CN CN201621224368.7U patent/CN206323639U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113194640A (en) * | 2021-04-28 | 2021-07-30 | 中国科学院微电子研究所 | Manufacturing method of low-warpage high-density packaging substrate |
| CN113207245A (en) * | 2021-04-28 | 2021-08-03 | 中国科学院微电子研究所 | Method for manufacturing low-warpage printed wiring board |
| CN113207245B (en) * | 2021-04-28 | 2022-06-07 | 中国科学院微电子研究所 | Method for manufacturing low-warpage printed wiring board |
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