CN206312119U - Plural number with PCIE and USB interface adds multiplication device - Google Patents

Plural number with PCIE and USB interface adds multiplication device Download PDF

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Publication number
CN206312119U
CN206312119U CN201621441191.6U CN201621441191U CN206312119U CN 206312119 U CN206312119 U CN 206312119U CN 201621441191 U CN201621441191 U CN 201621441191U CN 206312119 U CN206312119 U CN 206312119U
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China
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pin
integrated circuit
connect
electric capacity
ground connection
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CN201621441191.6U
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Chinese (zh)
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纪晓玲
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Yulin University
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Yulin University
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Abstract

A kind of plural number with PCIE and USB interface adds multiplication device, has：The FPGA circuitry being controlled to device；PCI Express circuits；The input of the output termination FPGA circuitry of the circuit；USB drive circuits, the output end of the input termination FPGA circuitry of the circuit；The present apparatus have the advantages that few reasonable in design, simple structure, peripheral component, low cost, with various external interfaces, be easy to be networked with ancillary equipment, complex operation field can be promoted the use of.

Description

Plural number with PCIE and USB interface adds multiplication device
Technical field
The utility model belongs to the device technical field for finding a function value by calculating, and in particular to one kind Plural number with PCIE and USB interface adds multiplication device.
Background technology
PCI Express are a kind of equipment connection modes of point-to-point serial connection.PCI Express buses are supported two-way Transmission mode；The transmission speed of PCI Express buses is 250MB/s~4GB/s；At the same time, PCI Express equipment energy Enough support hot-swappable and heat exchange characteristics etc..PCI Express buses are widely used in PC extension, and on-chip system expands Exhibition etc..Plural number is the content that higher mathematics must be learned.In Learning of Complex Number, usually plural number is mapped with complex plane, makes plural number Application further extend.And in the study of plural number, can't do without plural number plus multiplication.Effect is performed by relatively more plural plus multiplication Rate, can make student produce new understanding, further improve innovation ability.At present, for plural number plus multiplication rely primarily on it is embedding Enter formula to realize：First it is necessary to have Embedded hardware platform；Secondly Embedded application program is needed, is realized in a program Plural plus multiplication.The multiplication technological means that adds of this plural number comes with some shortcomings：Circuit is complicated, the component for using compared with It is many；It is relatively costly, use embedded hardware；Without high speed data transfer and high-speed data disposal ability.
The content of the invention
Technical problem to be solved in the utility model is to overcome the shortcomings of above-mentioned plural computing device, provides one kind and sets Meter rationally, simple structure, few peripheral component, low cost, with various external interfaces, be easy to and ancillary equipment networking have The plural number of PCIE and USB interface adds multiplication device.
Solving the technical scheme of above-mentioned technical problem use is：Have：The FPGA circuitry being controlled to device；PCI Express circuits；The input of the output termination FPGA circuitry of the circuit；USB drive circuits, the input termination FPGA of the circuit The output end of circuit.
FPGA circuitry of the present utility model is：29 pin~27 pin, 25 pin~21 pin, 19 pin, 17 pin, 16 of integrated circuit U1 Pin, 14 pin, 12 pin, 10 pin~7 pin, 99 pin, 98 pin, 94 pin, 93 pin connect PCI Express circuits, 87 pin of integrated circuit U1 Connect 4 pin of crystal oscillator Y1,15 pin of integrated circuit U1,62 pin, 73 pin, 1 pin~4 pin of 4 pin connecting connector J1, integrated circuit U1's 68 pin, 69 pin, 71 pin, 72 pin, 76 pin, 77 pin, 79 pin~81 pin, 83 pin~85 pin connect USB drive circuits, integrated circuit U1's 82 pin, 66 pin, 51 pin, 34 pin, 18 pin, 3 pin, 39 pin, 91 pin connect 3V power supplys, 11 pin, 26 pin, 33 pin, 43 of integrated circuit U3 Pin, 53 pin, 59 pin, 65 pin, 74 pin, 78 pin, 95 pin, 86 pin, 38 pin ground connection, the 3 pin ground connection of crystal oscillator Y1,1 pin connect 3V power supplys, even Connect the 5 pin ground connection of device J1；The model JHY50M of the model EPM3128ATI100-10N of integrated circuit U1, crystal oscillator Y1.
USB drive circuits of the present utility model are：17 pin of integrated circuit U2 connect one end of electric capacity C1,19 pin and pass through resistance R1 is connect one end of 5V power supplys and electric capacity C2,15 pin and is connect in succession by resistance R3 by 3 pin of resistance R2 connecting connectors USB1,16 pin 2 pin of device USB1,12 pin connect 5V power supplys, 20 pin and connect 5V power supplys, 4 pin and connect 3V power supplys by resistance R4,14 pin of integrated circuit U2, 13 pin, 22 pin, 23 pin, 6 pin, 10 pin, 9 pin, 2 pin, 11 pin, 3 pin, 5 pin, 1 pin connect successively 68 pin of integrated circuit U1,69 pin, 71 pin, 72 pin, 76 pin, 77 pin, 79 pin~81 pin, 83 pin~85 pin, 26 pin of integrated circuit U2,21 pin, 18 pin, 7 pin, 25 pin Ground connection, the other end ground connection of electric capacity C1 and electric capacity C2,1 pin of connector USB1 connects 5V power supplys, 4 pin~6 pin ground connection；Integrated circuit U2 models FT245RL.
PCI Express circuits of the present utility model are：21 pin and 20 pin of integrated circuit U3 connect 1 pin of integrated circuit U4 One end of crystal oscillator Y2 is connect with 2 pin, 17 pin and one end of electric capacity C3,18 pin connect the other end of crystal oscillator Y2 and one end, 62 of electric capacity C4 Pin is grounded by resistance R5,63 pin connect electricity by 25 pin and 24 pin, 15 pin of resistance R6 ground connection, 11 pin and 12 pin connecting connector P1 19 pin and 18 pin, 10 pin that one end of appearance C5,14 pin meet one end of electric capacity C6,5 pin and 6 pin connecting connector P1 are connect by resistance R7 Ground, 1 pin connect one end of electric capacity C7 and 13 pin of connector P1, and 39 pin~46 pin of integrated circuit U3,57 pin~60 pin, 26 pin~ 22 pin, 27 pin, 50 pin, 53 pin, 34 pin connect 29 pin~27 pin, 25 pin~21 pin, 19 pin, 17 pin, 16 of integrated circuit U1 successively Pin, 14 pin, 12 pin, 10 pin~7 pin, 99 pin, 98 pin, 94 pin, 93 pin, 2 pin of integrated circuit U3,19 pin, 49 pin connect 3V power supplys, 4 pin of integrated circuit U3,32 pin, 47 pin, 7 pin, 13 pin connect 1.8V power supplys, 3 pin, 8 pin, 9 pin, 16 pin, 33 of integrated circuit U3 Pin, 48 pin, 56 pin, 61 pin ground connection, 3 pin of integrated circuit U4 connect 3V power supplys, ground terminal ground connection, electric capacity C3, electric capacity C4, electric capacity C7 The other end is grounded, 22 pin of connector P1 connect the other end of electric capacity C5,21 pin connect the other end of electric capacity C6,12 pin and 14 pin and 15 pin connect 3V power supplys, 1 pin of connector P1,16 pin, 17 pin, 20 pin, 23 pin, 26 pin ground connection；The model of integrated circuit U3 The model AT24C02 of CH382L, integrated circuit U4.
Because the utility model employs FPGA circuitry, USB drive circuits, PCI Express circuits, FPGA circuitry is received To the complex number operand data that outside is transmitted, the control of PCI Express circuit local bus and conversion logic start, and produce multiple Number operand, and the input of plural number plus multiplication logic is sent to, FPGA circuitry starts the control logic of Parallel Interface Communication, will The result data of complex operation sends, and the present apparatus has few reasonable in design, simple structure, peripheral component, low cost, tool There are various external interfaces, be easy to be networked with ancillary equipment, complex operation field can be promoted the use of.
Brief description of the drawings
Fig. 1 is electrical principle block diagram of the present utility model.
Fig. 2 is the electronic circuit schematic diagram of FPGA circuitry and USB drive circuits in Fig. 1.
Fig. 3 is the electronic circuit schematic diagram of PCI Express circuits in Fig. 1.
Specific embodiment
The utility model is described in further details with reference to the accompanying drawings and examples, but the utility model is not limited to this A little embodiments.
Embodiment 1
In Fig. 1, the plural number plus multiplication device that the utility model has PCIE and USB interface are driven by FPGA circuitry, USB Dynamic circuit, PCI Express circuits are connected and composed, input, the FPGA of the output termination FPGA circuitry of PCI Express circuits The input of the output termination USB drive circuits of circuit.
In fig. 2, the FPGA circuitry of the present embodiment is connected and composed by integrated circuit U1, crystal oscillator Y1, connector J1, integrated electricity The model JHY50M of the model EPM3128ATI100-10N of road U1, crystal oscillator Y1.29 pin~27 pin, 25 of integrated circuit U1 Pin~21 pin, 19 pin, 17 pin, 16 pin, 14 pin, 12 pin, 10 pin~7 pin, 99 pin, 98 pin, 94 pin, 93 pin meet PCI Express Circuit, 87 pin of integrated circuit U1 connect 4 pin of crystal oscillator Y1,15 pin of integrated circuit U1,62 pin, 73 pin, 4 pin connecting connector J1 1 pin~4 pin, 68 pin of integrated circuit U1,69 pin, 71 pin, 72 pin, 76 pin, 77 pin, 79 pin~81 pin, 83 pin~85 pin meet USB Drive circuit, 82 pin of integrated circuit U1,66 pin, 51 pin, 34 pin, 18 pin, 3 pin, 39 pin, 91 pin connect 3V power supplys, integrated circuit 11 pin of U3,26 pin, 33 pin, 43 pin, 53 pin, 59 pin, 65 pin, 74 pin, 78 pin, 95 pin, 86 pin, 38 pin ground connection, the 3 of crystal oscillator Y1 Pin ground connection, 1 pin connect 3V power supplys, the 5 pin ground connection of connector J1.
In fig. 2, the USB drive circuits of the present embodiment are by integrated circuit U2, resistance R1~resistance R4, electric capacity C1, electric capacity C2, connector USB1 are connected and composed, integrated circuit U2 models FT245RL.17 pin of integrated circuit U2 connect electric capacity C1 one end, 19 pin are connect one end of 5V power supplys and electric capacity C2,15 pin by resistance R1 and are passed through by 3 pin of resistance R2 connecting connectors USB1,16 pin 2 pin, 12 pin of resistance R3 connecting connectors USB1 connect 5V power supplys, 20 pin and connect 5V power supplys, 4 pin and connect 3V power supplys by resistance R4, integrated 14 pin of circuit U 2,13 pin, 22 pin, 23 pin, 6 pin, 10 pin, 9 pin, 2 pin, 11 pin, 3 pin, 5 pin, 1 pin meet integrated circuit U1 successively 68 pin, 69 pin, 71 pin, 72 pin, 76 pin, 77 pin, 79 pin~81 pin, 83 pin~85 pin, 26 pin of integrated circuit U2,21 pin, 18 pin, 7 pin, 25 pin ground connection, the other end ground connection of electric capacity C1 and electric capacity C2,1 pin of connector USB1 connect 5V power supplys, 4 pin~6 pin Ground connection.
In figure 3, the PCI Express circuits of the present embodiment are by integrated circuit U3, integrated circuit U4, resistance R5~resistance R7, electric capacity C3~electric capacity C7, connector P1, crystal oscillator Y2 are connected and composed, the model CH382L of integrated circuit U3, integrated circuit U4 Model AT24C02.21 pin and 20 pin of integrated circuit U3 connect 1 pin and 2 pin of integrated circuit U4,17 pin and connect the one of crystal oscillator Y2 One end of end and electric capacity C3,18 pin connect the other end of crystal oscillator Y2 and one end of electric capacity C4,62 pin are grounded by resistance R5,63 pin lead to Resistance R6 ground connection, 25 pin and 24 pin, 15 pin of 11 pin and 12 pin connecting connector P1 is crossed to connect one end of electric capacity C5,14 pin and meet electric capacity C6 One end, 5 pin and 6 pin connecting connector P1 19 pin and 18 pin, 10 pin by resistance R7 be grounded, 1 pin connect electric capacity C7 one end and 13 pin of connector P1,39 pin~46 pin, 57 pin~60 pin, 26 pin~22 pin, 27 pin, 50 pin, 53 pin, 34 of integrated circuit U3 Pin connect successively 29 pin~27 pin of integrated circuit U1,25 pin~21 pin, 19 pin, 17 pin, 16 pin, 14 pin, 12 pin, 10 pin~7 pin, 99 pin, 98 pin, 94 pin, 93 pin, 2 pin of integrated circuit U3,19 pin, 49 pin connect 3V power supplys, 4 pin, 32 pin, 47 of integrated circuit U3 Pin, 7 pin, 13 pin connect 1.8V power supplys, 3 pin of integrated circuit U3,8 pin, 9 pin, 16 pin, 33 pin, 48 pin, 56 pin, 61 pin ground connection, collection 3 pin into circuit U 4 connect 3V power supplys, ground terminal ground connection, electric capacity C3, electric capacity C4, the other end ground connection of electric capacity C7, the 22 of connector P1 Pin connects that the other end of electric capacity C5,21 pin connect the other end of electric capacity C6,12 pin and 14 pin and 15 pin connect 3V power supplys, connector P1's 1 pin, 16 pin, 17 pin, 20 pin, 23 pin, 26 pin ground connection.
Operation principle of the present utility model is as follows：
System electrification, integrated circuit U1 circuits start initial work：Including the control of PCI Express local bus Logic, two complex addition operations logics, 1 complex multiplication operation logic, parallel port control logic circuit.At the same time, it is integrated Circuit U 3 is initially configured chemical industry work, completes PCI Express buses to serial ports configuration work.Hereafter, circuit accesses normal work Make state.
First, main control device sends the data of 16 bytes, 24 pin, 25 pin output, input of the data-signal from connector P1 To integrated circuit U3, processed by the general line system of integrated circuit U3, exported from 50 pin of integrated circuit U3, be input to integrated electricity 98 pin of road U1.
Secondly, integrated circuit U1 receives the complex data of 16 bytes, and starts complex operation, first carries out complex addition fortune Calculate, the complex data input of 16 bytes performs complex addition operations, obtains 2 results of 4 byte complex additions；Then, 2 The result of addition performs complex multiplication operation again, obtains the result of multiplying.
Finally, integrated circuit U3 starts the control logic of parallel port, and control signal is exported from 72 pin of integrated circuit U1, input To 23 pin of integrated circuit U2, integrated circuit U2 receives this control signal, points out USB peripheral to receive plural number plus multiplication knot Really.Wherein, data-signal is input to integrated circuit from 76 pin, 77 pin, 79~81 pin, the output of 83~85 pin of integrated circuit U1 1 pin~3 pin of U2,5 pin, 6 pin, 9 pin~11 pin, by the conversion process of integrated circuit U2, from 15 pin, 16 of integrated circuit U2 Pin is exported, and by resistance R2, resistance R3,2 pin, 3 pin of output to connector USB1 export plural number plus multiply fortune from connector USB1 Calculate result.

Claims (4)

1. a kind of plural number with PCIE and USB interface adds multiplication device, it is characterised in that：Have：
The FPGA circuitry being controlled to device；
PCI Express circuits；The input of the output termination FPGA circuitry of the circuit；
USB drive circuits, the output end of the input termination FPGA circuitry of the circuit.
2. the plural number with PCIE and USB interface according to claim 1 adds multiplication device, it is characterised in that described FPGA circuitry is：29 pin~27 pin of integrated circuit U1,25 pin~21 pin, 19 pin, 17 pin, 16 pin, 14 pin, 12 pin, 10 pin~7 Pin, 99 pin, 98 pin, 94 pin, 93 pin connect PCI Express circuits, and 87 pin of integrated circuit U1 connect 4 pin of crystal oscillator Y1, integrated electricity 15 pin of road U1,62 pin, 73 pin, 1 pin~4 pin of 4 pin connecting connector J1,68 pin of integrated circuit U1,69 pin, 71 pin, 72 pin, 76 pin, 77 pin, 79 pin~81 pin, 83 pin~85 pin connect USB drive circuits, 82 pin of integrated circuit U1,66 pin, 51 pin, 34 pin, 18 pin, 3 pin, 39 pin, 91 pin connect 3V power supplys, 11 pin, 26 pin, 33 pin, 43 pin, 53 pin, 59 pin, 65 pin, 74 of integrated circuit U3 Pin, 78 pin, 95 pin, 86 pin, 38 pin ground connection, the 3 pin ground connection of crystal oscillator Y1,1 pin connect 3V power supplys, the 5 pin ground connection of connector J1；It is integrated The model JHY50M of the model EPM3128ATI100-10N of circuit U 1, crystal oscillator Y1.
3. the plural number with PCIE and USB interface according to claim 1 adds multiplication device, it is characterised in that described USB drive circuits are：17 pin of integrated circuit U2 connect one end of electric capacity C1,19 pin and meet 5V power supplys and electric capacity C2 by resistance R1 One end, 15 pin are passed through by 3 pin of resistance R2 connecting connectors USB1,16 pin by 2 pin of resistance R3 connecting connectors USB1,12 pin Resistance R4 connects 5V power supplys, 20 pin and connects 5V power supplys, 4 pin and connects 3V power supplys, 14 pin of integrated circuit U2,13 pin, 22 pin, 23 pin, 6 pin, 10 pin, 9 pin, 2 pin, 11 pin, 3 pin, 5 pin, 1 pin connect successively 68 pin of integrated circuit U1,69 pin, 71 pin, 72 pin, 76 pin, 77 pin, 79 pin~81 pin, 83 pin~85 pin, 26 pin of integrated circuit U2,21 pin, 18 pin, 7 pin, 25 pin ground connection, electric capacity C1 and electric capacity C2 Other end ground connection, 1 pin of connector USB1 connects 5V power supplys, 4 pin~6 pin ground connection；Integrated circuit U2 models FT245RL.
4. the plural number with PCIE and USB interface according to claim 1 adds multiplication device, it is characterised in that described PCI Express circuits are：21 pin and 20 pin of integrated circuit U3 connect 1 pin and 2 pin of integrated circuit U4,17 pin and connect crystal oscillator Y2's One end of one end and electric capacity C3,18 pin connect the other end of crystal oscillator Y2 and one end of electric capacity C4,62 pin by resistance R5 ground connection, 63 pin One end of electric capacity C5,14 pin are connect by 25 pin and 24 pin, 15 pin of resistance R6 ground connection, 11 pin and 12 pin connecting connector P1 connect electric capacity 19 pin and 18 pin, 10 pin of one end of C6,5 pin and 6 pin connecting connector P1 connect one end of electric capacity C7 by resistance R7 ground connection, 1 pin With 13 pin of connector P1,39 pin~46 pin of integrated circuit U3,57 pin~60 pin, 26 pin~22 pin, 27 pin, 50 pin, 53 pin, 34 pin connect 29 pin~27 pin, 25 pin~21 pin, 19 pin, 17 pin, 16 pin, 14 pin, 12 pin, 10 pin~7 of integrated circuit U1 successively Pin, 99 pin, 98 pin, 94 pin, 93 pin, 2 pin of integrated circuit U3,19 pin, 49 pin connect 3V power supplys, 4 pin, 32 of integrated circuit U3 Pin, 47 pin, 7 pin, 13 pin connect 1.8V power supplys, and 3 pin of integrated circuit U3,8 pin, 9 pin, 16 pin, 33 pin, 48 pin, 56 pin, 61 pin connect Ground, 3 pin of integrated circuit U4 connect 3V power supplys, ground terminal ground connection, electric capacity C3, electric capacity C4, the other end ground connection of electric capacity C7, connector P1 22 pin connect that the other end of electric capacity C5,21 pin connect the other end of electric capacity C6,12 pin and 14 pin and 15 pin connect 3V power supplys, connector 1 pin of P1,16 pin, 17 pin, 20 pin, 23 pin, 26 pin ground connection；The model CH382L of integrated circuit U3, the type of integrated circuit U4 Number be AT24C02.
CN201621441191.6U 2016-12-26 2016-12-26 Plural number with PCIE and USB interface adds multiplication device Expired - Fee Related CN206312119U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201621441191.6U CN206312119U (en) 2016-12-26 2016-12-26 Plural number with PCIE and USB interface adds multiplication device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201621441191.6U CN206312119U (en) 2016-12-26 2016-12-26 Plural number with PCIE and USB interface adds multiplication device

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CN206312119U true CN206312119U (en) 2017-07-07

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170707

Termination date: 20171226

CF01 Termination of patent right due to non-payment of annual fee