CN101344874B - Method and device for controlling I2C device - Google Patents
Method and device for controlling I2C device Download PDFInfo
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- CN101344874B CN101344874B CN2007100758654A CN200710075865A CN101344874B CN 101344874 B CN101344874 B CN 101344874B CN 2007100758654 A CN2007100758654 A CN 2007100758654A CN 200710075865 A CN200710075865 A CN 200710075865A CN 101344874 B CN101344874 B CN 101344874B
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Abstract
The invention discloses a method for controlling an I2C device, and a device thereof. The method for controlling the I2C device adopts an RS232 serial port of a computer for simulating an I2C bus. Furthermore, the device for controlling the I2C comprises a computer provided with the RS232 serial port and the I2C device provided with an I2C bus interface. The RS232 serial port of the computer, an electrical level transformation circuit, an electrical level revertive circuit and the I2C bus interface are connected in sequence. The electrical level transformation circuit transforms the electrical level logic of the RS232 serial port into the electrical level logic of TTL and the electrical level revertive circuit inverts the electrical level logic of the TTL so as to ensure that the inverted electrical level logic corresponds to the electrical level logic of the I2C bus. By utilizing the RS232 serial port for directly simulating the I2C bus to realize the control of the computer to the I2C device, no special translation chip is needed, therefore, the price of the whole transformation device and the volume of the transformation device are reduced.
Description
Technical field
The present invention relates to computer communication field, especially about a kind of device and method of in computer communication complex, controlling the I2C device.
Background technology
In recent years, along with some increased functionality of using IC, the control of IC becomes increasingly complex, and is used for the function that makes IC is easier, and IC supplier generally can do piece DEMO plate, and cooperates PC (computing machine) software interface to control its function.In general, IC is (to be I by I2C
2C) bus is controlled, and PC itself does not possess the interface of I2C agreement, so this will relate to the control signal that how control signal of PC is converted to the I2C bus protocol.The method of conversion has following several at present:
1) utilize the parallel port direct modeling I2C bus of PC, advantage is a low price, and shortcoming is that the interface device volume is bigger;
2) utilize the USB conversion chip, advantage is that volume is little, but price is more expensive;
3) utilize the RS232 serial ports to communicate by letter with MCU, again by MCU Simulation with I 2C bus, advantage is that the DEMO plate can also be controlled under the situation that breaks away from PC, but the software work amount can be bigger, also needs the software programming of MCU except the programming of PC language.
Summary of the invention
Technical matters to be solved by this invention is, overcomes the deficiencies in the prior art, and the device and method of the little control I2C device of a kind of low price and volume is provided.
The technical solution adopted for the present invention to solve the technical problems is: the method for this control I2C device is the RS232 serial ports Simulation with I 2C bus with computing machine, DTR by control RS232 serial ports, CTS, RTS, the level of DSR handshake just comes Simulation with I 2C bus operation, wherein said DTR handshake is corresponding with the output of the data line SDA of I2C bus, the DSR handshake is corresponding with the input of the data line SDA of I2C bus, the RTS handshake is corresponding with the output of the clock line SCL of I2C bus, the CTS handshake is corresponding with the input of the clock line SCL of I2C bus, convert the level logic of RS232 serial ports to the Transistor-Transistor Logic level logic by level shifting circuit, and the level logic after making the Transistor-Transistor Logic level logic reversal oppositely by the level negater circuit is corresponding with the level logic of I2C bus.
A kind of device of the I2C of control device comprises the computing machine with RS232 serial ports and has the I2C device of I2C bus interface, the RS232 serial ports of computing machine, level shifting circuit, level negater circuit and I2C bus interface connect in turn, level shifting circuit converts the level logic of RS232 serial ports to the Transistor-Transistor Logic level logic, level logic after the level negater circuit makes the Transistor-Transistor Logic level logic reversal oppositely is corresponding with the level logic of I2C bus, DTR by control RS232 serial ports, CTS, RTS, the level of DSR handshake just comes Simulation with I 2C bus operation, described DTR handshake is corresponding with the output of the data line SDA of I2C bus, the DSR handshake is corresponding with the input of the data line SDA of I2C bus, the RTS handshake is corresponding with the output of the clock line SCL of I2C bus, and the CTS handshake is corresponding with the input of the clock line SCL of I2C bus.
Described level shifting circuit is selected from: SP3232 chip, MAX232 chip, level negater circuit are the 74HC05 chip.
Described level shifting circuit is the SP3232 chip, pin DTR, the CTS of RS232 serial ports, RTS, DSR are connected with four pins of SP3232 chip respectively, the pin SDAO of SP3232 links to each other with the pin 2A of 74HC05, the pin SDAI of SP3232 links to each other with the pin 5Y of 74HC05, the pin SCLO of SP3232 links to each other with the pin 3A of 74HC05, the pin SCLI of SP3232 links to each other with the pin 4Y of 74HC05, the clock pin of 74HC05 chip is connected with the clock scl line of I2C bus interface, and the data pin of 74HC05 chip is connected with the data sda line of I2C bus interface.
Obtain 5V voltage behind the output level process rectification circuit of pin DTR, the RTS of described RS232 serial ports and the mu balanced circuit, this 5V voltage is given SP3232 chip and 74HC05 chip power supply.
Two clock SCL pins of described SP3232 chip connect dichromatic LED.
The invention has the beneficial effects as follows, utilize RS232 serial ports direct modeling I2C bus, realize the control of computing machine, do not need special-purpose conversion chip, reduced the price of whole conversion equipment, and reduced the volume of conversion equipment the I2C device.
Description of drawings
Fig. 1 is the process flow diagram of the method for present embodiment control I2C device when the I2C device is carried out write operation;
Fig. 2 is the process flow diagram of the method for present embodiment control I2C device when the I2C device is carried out read operation;
Fig. 3 is the circuit theory diagrams of the device of present embodiment control I2C device.
Embodiment
The method of present embodiment control I2C device is to be used to realize the control of computing machine to the I2C device, and it is that RS232 serial ports by computing machine comes Simulation with I 2C bus.
This RS232 serial ports has nine pins, and is specifically as shown in table 1:
Table 1 RS232 serial ports pin
| 1 | Data carrier detects | Input | | Carrier Detect | |
| 2 | Receive data | Input | RXD | Receive |
|
| 3 | Send data | Output | | Transmit Data | |
| 4 | Data terminal is prepared | Output | DTR | Data Terminal Ready | |
| 5 | Signal ground | Ground wire | | System Ground | |
| 6 | DSR | Input | DSR | Data Set Ready | |
| 7 | Request sends | Output | RTS | Request to Send | |
| 8 | Clear to send | Input | CTS | Clear to Send | |
| 9 | The ring indication | Input | DELL | Ring Indicator |
Wherein, only need RXD, TXD, three pins of GND just can finish the communication work of RS232 serial ports.RXD, TXD pin can only can not directly be controlled its output level as the RS232 serial communication.The level of DTR, the DSR by control RS232 serial ports, RTS, CTS handshake (respectively by pin DTR, DSR, RTS, CTS output) just can Simulation with I 2C bus operation, and promptly the level of the clock line SCL of Simulation with I 2C bus and data line SDA just changes.
The corresponding relation such as the table 2 of each handshake and I2C bus:
The corresponding relation of table 2 RS231 serial ports handshake and I2C bus
| DTR | The output of I2C bus data line SDA |
| DSR | The input of I2C bus data line SDA |
| RTS | The output of I2C bus clock line SCL |
| CTS | The input of I2C bus clock line SCL |
DTR, RTS handshake also bear the work of serial ports power taking when removing and exporting as the I2C bus, when not carrying out the I2C bus operation, make DTR, RTS handshake be in high level.
When by the method for present embodiment the I2C device being controlled, it comprises read operation and write operation, and write operation is that the CPU of computing machine writes data in the register of I2C device, and read operation is CPU reading of data from the register of I2C device of computing machine.
As shown in Figure 1, write operation comprises the steps: a) to send start signal, i.e. operation beginning; B) write the address of I2C device; C) CPU reads the response message of I2C device, judges whether to receiving the low level of data, if then write register address and enter step d), if not then shut-down operation (promptly sending end signal); D) CPU reads the response message of I2C device, judges whether for receiving the low level of data, if then write data and enter step e) to register, if not then shut-down operation; E) CPU reads the response message of I2C device, judges whether for receiving the low level of data, if then expression writes the data success and continues to write data, if not then shut-down operation.
As shown in Figure 2, read operation comprises the steps: a) to send start signal; B) write the address of the I2C device that need read; C) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then write register address and enter step d), if not then shut-down operation; D) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then send start signal once more and enter step e), if not then shut-down operation; E) address with the I2C device adds 1; F) CPU reads the response message of this I2C device, judges whether to receiving the low level of data, if then read register data and reading the back shut-down operation that finishes, if not then shut-down operation.
The method of present embodiment control I2C device can be controlled a plurality of I2C devices that hang on the same I2C bus.
As shown in Figure 3, the I2C device that the device of present embodiment control I2C device comprises the computing machine with RS232 serial ports and has the I2C bus interface, the RS232 serial ports of this computing machine, level shifting circuit, level negater circuit and I2C bus interface connect in turn.Level shifting circuit converts the level logic of RS232 serial ports to the Transistor-Transistor Logic level logic, and the level logic after the level negater circuit makes the Transistor-Transistor Logic level logic reversal oppositely is corresponding with the level logic of I2C bus.
Level shifting circuit is selected from: SP3232 chip, MAX232 chip.The level negater circuit is the 74HC05 chip.The pin DTR of RS232 serial ports JP1, CTS, RTS, DSR is four pin (pin R1IN by connecting line and SP3232 chip IC 1 respectively, T2OUT, R2IN, T1OUT) connect, two clock SCL pin (pin T2IN of SP3232 chip, R2OUT) two pin (pin 4Y by connecting line and 74HC05 chip IC 2 respectively, 3A) connect, two data SDA pin (pin T1IN of SP3232 chip, R1OUT) two pin (pin 5Y by connecting line and 74HC05 chip respectively, 2A) connect, clock pin of 74HC05 chip (pin 4A) and data pin (5A) be the pin SCL by connecting line and I2C interface plug JP2 respectively, SDA connects, and this I2C interface plug JP2 and I2C interface socket JP3 peg graft.In addition, pin DTR, the RTS of RS232 serial ports obtains stable 5V voltage through the voltage stabilizing diode D4 of 5V after by diode D2, D3 rectification again, and this 5V voltage is SP3232 chip and 74HC05 chip power supply; Two clock SCL pins of SP3232 chip are connected with dichromatic LED D1 by resistance R 5, R6 respectively, thereby indicate the associated level of I2C bus by this two-color diode D1.
In the present embodiment, SP3232 chip (or MAX232 chip) is finished level conversion, what adopt because of the level logic of RS232 serial ports is negative logic, can cause the I2C bus to be in low level during power taking and drawn dead, therefore with the 74HC05 chip that associated level is reverse, both made things convenient for the serial ports power taking, and made the high-low level of handshake corresponding again, made things convenient for the work of writing of PC Control Software with the high-low level of I2C bus.In addition, because of the handshake of RS232 serial ports is an one-way transmission, and the data line of I2C bus is a transmitted in both directions, so 74HC05 also finishes the isolation work of I2C bus input and output.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to protection scope of the present invention.
Claims (8)
1. method of controlling the I2C device, it is characterized in that: with the RS232 serial ports Simulation with I 2C bus of computing machine, DTR by control RS232 serial ports, CTS, RTS, the level of DSR handshake just comes Simulation with I 2C bus operation, wherein said DTR handshake is corresponding with the output of the data line SDA of I2C bus, the DSR handshake is corresponding with the input of the data line SDA of I2C bus, the RTS handshake is corresponding with the output of the clock line SCL of I2C bus, the CTS handshake is corresponding with the input of the clock line SCL of I2C bus, convert the level logic of RS232 serial ports to the Transistor-Transistor Logic level logic by level shifting circuit, and the level logic after making the Transistor-Transistor Logic level logic reversal oppositely by the level negater circuit is corresponding with the level logic of I2C bus.
2. the method for control I2C device according to claim 1, it is characterized in that: when the CPU of computing machine write data in the register of I2C device, it comprised the steps:
A) send start signal;
B) write the address of this I2C device;
C) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then write register address and enter step d), if not then shut-down operation;
D) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then write data and enter step e) to register, if not then shut-down operation;
E) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then expression writes the data success and continues to write data, if not then shut-down operation.
3. the method for control according to claim 2 I2C device is characterized in that: when computer CPU read data in the register of I2C device, it comprised the steps:
A) send start signal;
B) write the address of the I2C device that need read;
C) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then write register address and enter step d), if not then shut-down operation;
D) CPU reads the response message of this I2C device, judges whether for receiving the low level of data, if then send start signal once more and enter step e), if not then shut-down operation;
E) address with the I2C device adds 1;
F) CPU reads the response message of this I2C device, judges whether to receiving the low level of data, if then read register data and reading the back shut-down operation that finishes, if not then shut-down operation.
4. device of controlling the I2C device, it is characterized in that: the I2C device that comprises computing machine and have the I2C bus interface with RS232 serial ports, the RS232 serial ports of computing machine, level shifting circuit, level negater circuit and I2C bus interface connect in turn, level shifting circuit converts the level logic of RS232 serial ports to the Transistor-Transistor Logic level logic, level logic after the level negater circuit makes the Transistor-Transistor Logic level logic reversal oppositely is corresponding with the level logic of I2C bus, DTR by control RS232 serial ports, CTS, RTS, the level of DSR handshake just comes Simulation with I 2C bus operation, described DTR handshake is corresponding with the output of the data line SDA of I2C bus, the DSR handshake is corresponding with the input of the data line SDA of I2C bus, the RTS handshake is corresponding with the output of the clock line SCL of I2C bus, and the CTS handshake is corresponding with the input of the clock line SCL of I2C bus.
5. the device of control I2C device according to claim 4, it is characterized in that: described level shifting circuit is selected from: SP3232 chip, MAX232 chip, level negater circuit are the 74HC05 chip.
6. the device of control I2C device according to claim 5, it is characterized in that: described level shifting circuit is the SP3232 chip, the pin DTR of RS232 serial ports, CTS, RTS, DSR is connected with four pins of SP3232 chip respectively, the pin SDAO of SP3232 links to each other with the pin 2A of 74HC05, the pin SDAI of SP3232 links to each other with the pin 5Y of 74HC05, the pin SCLO of SP3232 links to each other with the pin 3A of 74HC05, the pin SCLI of SP3232 links to each other with the pin 4Y of 74HC05, the clock pin of 74HC05 chip is connected with the clock scl line of I2C bus interface, and the data pin of 74HC05 chip is connected with the data sda line of I2C bus interface.
7. the device of control I2C device according to claim 6, it is characterized in that: obtain 5V voltage behind the output level process rectification circuit of pin DTR, the RTS of described RS232 serial ports and the mu balanced circuit, this 5V voltage is given SP3232 chip and 74HC05 chip power supply.
8. the device of control I2C device according to claim 7, it is characterized in that: two clock SCL pins of described SP3232 chip connect dichromatic LED.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007100758654A CN101344874B (en) | 2007-07-11 | 2007-07-11 | Method and device for controlling I2C device |
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| CN2007100758654A CN101344874B (en) | 2007-07-11 | 2007-07-11 | Method and device for controlling I2C device |
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| CN101344874B true CN101344874B (en) | 2010-09-29 |
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| CN102866683B (en) * | 2012-07-26 | 2014-12-17 | 苏州市大富通信技术有限公司 | Signal conversion device and automatic testing system |
| CN105446837B (en) * | 2015-04-02 | 2019-05-07 | 北京眼神智能科技有限公司 | The method, apparatus and system whether detection IIC interface device connects |
| CN105786734B (en) * | 2016-02-25 | 2018-12-18 | 广州视源电子科技股份有限公司 | Method, expanding unit, peripheral equipment and the system of data transmission |
| CN106528460B (en) * | 2016-10-11 | 2019-07-19 | Oppo广东移动通信有限公司 | Initialization control method, device and the terminal device of terminal device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1790303A (en) * | 2004-12-17 | 2006-06-21 | 鸿富锦精密工业（深圳）有限公司 | Signal conversion circuit |
| CN2888537Y (en) * | 2006-04-19 | 2007-04-11 | 武汉电信器件有限公司 | A digital communication interface conversion module |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1790303A (en) * | 2004-12-17 | 2006-06-21 | 鸿富锦精密工业（深圳）有限公司 | Signal conversion circuit |
| CN2888537Y (en) * | 2006-04-19 | 2007-04-11 | 武汉电信器件有限公司 | A digital communication interface conversion module |
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