CN206163475U - Semiconductor device packaging structure - Google Patents
Semiconductor device packaging structure Download PDFInfo
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- CN206163475U CN206163475U CN201621265537.1U CN201621265537U CN206163475U CN 206163475 U CN206163475 U CN 206163475U CN 201621265537 U CN201621265537 U CN 201621265537U CN 206163475 U CN206163475 U CN 206163475U
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- electrode molybdenum
- chip
- molybdenum sheet
- electrode
- base
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 43
- 238000004806 packaging method and process Methods 0.000 title abstract 3
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims abstract description 110
- 229910052750 molybdenum Inorganic materials 0.000 claims abstract description 43
- 239000011733 molybdenum Substances 0.000 claims abstract description 43
- 239000011810 insulating material Substances 0.000 claims description 6
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 abstract description 20
- 238000005516 engineering process Methods 0.000 abstract description 3
- 238000004377 microelectronic Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 239000002360 explosive Substances 0.000 description 6
- 238000003466 welding Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000012856 packing Methods 0.000 description 4
- 229920003023 plastic Polymers 0.000 description 4
- 239000004033 plastic Substances 0.000 description 4
- 238000002788 crimping Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
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Abstract
The embodiment of the utility model provides a semiconductor device packaging structure relates to the microelectronics technology field, can reduce semiconductor device's encapsulation complexity, reduces semiconductor device's thermal resistance and conduction voltage drop simultaneously. The semiconductor device packaging structure comprises a tube cover and a tube seat, wherein the tube cover covers the tube seat, a plurality of first electrode molybdenum sheets are welded on the lower surface of the tube cover, a plurality of second electrode molybdenum sheets are welded on the upper surface of the tube seat, and the plurality of second electrode molybdenum sheets correspond to the plurality of first electrode molybdenum sheets one by one; the chip positioning device also comprises a plurality of chips and a plurality of positioning frames, wherein the positioning frames are used for positioning the chips; the plurality of chips correspond to the plurality of first electrode molybdenum sheets one by one; the chip is positioned between the first electrode molybdenum sheet and the second electrode molybdenum sheet, and the chip is jointed with the first electrode molybdenum sheet and the second electrode molybdenum sheet. The utility model is used for the semiconductor device encapsulation.
Description
Technical field
The utility model is related to microelectronics technology, more particularly to a kind of package structure of semiconductor device.
Background technology
Semiconductor devices as electronic product important component part, always research emphasis of scientific research personnel, wherein half
The encapsulation of conductor device is even more becomes study hotspot.Example, as shown in Figures 1 to 4, Fig. 1 is IGBT (Insulated
Gate Bipolar Transistor, igbt) device encapsulation structure schematic diagram.IGBT device encapsulating structure
Including lid 01 and base 02, and the IGBT subelements 03, pcb board 05 between lid 01 and base 02 and grid are drawn
Line 06, wherein, the explosive view of IGBT subelements 03 is as shown in figure 3, IGBT subelements 03 include the first frame of plastic 035, Yi Jiwei
In the first frame of plastic 035, and the colelctor electrode molybdenum sheet 031 for crimping successively from top to bottom, igbt chip 032, emitter stage molybdenum sheet 033
With grid spring needle 034.Fig. 2 is FRD (Fast Recovery Diode, fast recovery diode) device encapsulation structure schematic diagram.
FRD device encapsulation structures include lid 01 and base 02, and the FRD subelements 04 between lid 01 and base 02, its
In, the explosive view of FRD subelements 04 as shown in figure 4, FRD subelements 04 include the second frame of plastic 044, and positioned at the second plastics
In frame 044, and the anode molybdenum sheet 041 for crimping successively from top to bottom, FRD chips 042 and negative electrode molybdenum sheet 043.
From above-mentioned IGBT device and the encapsulating structure of FRD devices, the encapsulating structure of existing semiconductor devices compared with
For complexity, so cause the production efficiency of semiconductor devices relatively low.Simultaneously as existing encapsulating structure chips connect with molybdenum sheet
Touch, molybdenum sheet is contacted with lid or base again, so causes the presence of multiple contact surfaces between chip and lid or base, and then is caused
The thermal resistance and conduction voltage drop of semiconductor devices is higher, is unfavorable for the radiating of semiconductor devices.
Utility model content
Embodiment of the present utility model provides a kind of package structure of semiconductor device, can reduce the encapsulation of semiconductor devices
Complexity, while reducing the thermal resistance and conduction voltage drop of semiconductor devices.
To reach above-mentioned purpose, embodiment of the present utility model is adopted the following technical scheme that：
On the one hand, the utility model embodiment provides a kind of package structure of semiconductor device, including lid and base, described
Lid is placed on the base,
The lower surface of the lid is welded with multiple first electrode molybdenum sheets, and the upper surface of the base is welded with multiple second
Electrode molybdenum slice, multiple second electrode molybdenum sheets are corresponded with multiple first electrode molybdenum sheets；
Also include multiple chips and multiple positioning frameworks, the positioning framework is used to position the chip；It is multiple
The chip is corresponded with multiple first electrode molybdenum sheets；
The chip is located between the first electrode molybdenum sheet and the second electrode molybdenum sheet, and the chip and described the
One electrode molybdenum slice and the second electrode molybdenum sheet are fitted.
Optionally, multiple positioning frameworks are connected to form one structure.
Optionally, the chip is igbt chip；The first electrode molybdenum sheet be colelctor electrode molybdenum sheet, the second electrode molybdenum
Piece is emitter stage molybdenum sheet.
Optionally, the chip is FRD chips；The first electrode molybdenum sheet be anode molybdenum sheet, the second electrode molybdenum sheet
For negative electrode molybdenum sheet.
Optionally, grid spring needle and pcb board, the grid spring are provided between the igbt chip and the base
Pin is located between the igbt chip and the pcb board, and is contacted with the igbt chip and the pcb board；The pcb board
On be also associated with grid lead wire.
Optionally, the positioning framework is made by insulating materials.
Optionally, the insulating materials is King.
The package structure of semiconductor device that the utility model embodiment is provided, including lid and base, lid is placed on base
On, the lower surface of lid is welded with multiple first electrode molybdenum sheets, and the upper surface of base is welded with multiple second electrode molybdenum sheets, multiple
Second electrode molybdenum sheet is corresponded with multiple first electrode molybdenum sheets；Also include multiple chips and multiple positioning frameworks, positioning framework
For positioning to chip；Multiple chips are corresponded with multiple first electrode molybdenum sheets；Chip be located at first electrode molybdenum sheet and
Between second electrode molybdenum sheet, and chip is fitted with first electrode molybdenum sheet and second electrode molybdenum sheet.Compared to prior art, this reality
Multiple first electrode molybdenum sheets are welded on into lid by advance with the package structure of semiconductor device of new embodiment offer
Multiple second electrode molybdenum sheets are welded on the upper surface of base by lower surface so that first electrode molybdenum sheet and lid become a dress
With entirety, it is overall that second electrode molybdenum sheet and base become an assembling, only need to install so in encapsulation process positioning framework and
Chip, then lid and base welding can be completed into device encapsulation, the encapsulation complexity of semiconductor devices is which decreased, improve
The production efficiency of semiconductor devices.Simultaneously as first electrode molybdenum sheet is welded with lid, second electrode molybdenum sheet is welded with base
Connect, such layer has blocked the directly contact between first electrode molybdenum sheet and lid, and second electrode molybdenum sheet and base, that is, subtract
The contact surface between chip and lid or base is lacked, thus has reduced the thermal resistance and conduction voltage drop of semiconductor devices, improve
The heat-sinking capability of semiconductor devices.
Description of the drawings
In order to be illustrated more clearly that the utility model embodiment or technical scheme of the prior art, below will be to embodiment
Or the accompanying drawing to be used needed for description of the prior art is briefly described, it should be apparent that, drawings in the following description are only
It is some embodiments of the present utility model, for those of ordinary skill in the art, in the premise for not paying creative work
Under, can be with according to these other accompanying drawings of accompanying drawings acquisition.
A kind of IGBT device encapsulating structure schematic diagram that Fig. 1 is provided for prior art；
A kind of FRD device encapsulation structures schematic diagram that Fig. 2 is provided for prior art；
A kind of IGBT sub-unit structures explosive view that Fig. 3 is provided for prior art；
A kind of FRD sub-unit structures explosive view that Fig. 4 is provided for prior art；
A kind of IGBT device encapsulating structure schematic diagram that Fig. 5 is provided for the utility model embodiment；
A kind of FRD device encapsulation structures schematic diagram that Fig. 6 is provided for the utility model embodiment；
A kind of IGBT device encapsulating structure explosive view that Fig. 7 is provided for the utility model embodiment；
A kind of FRD device encapsulation structures explosive view that Fig. 8 is provided for the utility model embodiment；
A kind of lid structural representation that Fig. 9 is provided for the utility model embodiment；
A kind of base structural representation that Figure 10 is provided for the utility model embodiment；
A kind of semiconductor packages method flow diagram that Figure 11 is provided for the utility model embodiment.
Specific embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical scheme in the utility model embodiment is carried out
Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the utility model, rather than whole
Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made
The every other embodiment for being obtained, belongs to the scope of the utility model protection.
The utility model embodiment provides a kind of package structure of semiconductor device, as shown in Fig. 5 to Figure 10, including lid 11
With base 12, lid 11 is placed on base 12, and the lower surface of lid 11 is welded with multiple first electrode molybdenum sheets 13, base 12 it is upper
Surface soldered has multiple second electrode molybdenum sheets 14, and multiple second electrode molybdenum sheets 14 are corresponded with multiple first electrode molybdenum sheets 13；
Also include multiple chips 15 and multiple positioning frameworks 16, positioning framework 16 is used to position chip 15；Multiple chips 15 with
Multiple first electrode molybdenum sheets 13 are corresponded；Chip 15 is located between first electrode molybdenum sheet 13 and second electrode molybdenum sheet 14, and core
Piece 15 is fitted with first electrode molybdenum sheet 13 and second electrode molybdenum sheet 14.
The utility model embodiment is for the setting number of first electrode molybdenum sheet, second electrode molybdenum sheet, chip and positioning framework
Amount is not limited, and those skilled in the art can be set according to actual conditions.It should be noted that due to multiple second
Electrode molybdenum slice 14 is corresponded with multiple first electrode molybdenum sheets 13, a pair of multiple chips 15 and multiple first electrode molybdenum sheets 13 1
Should, positioning framework 16 is used for chip placement 15, and chip 15 is positioned, thus first electrode molybdenum sheet, second electrode molybdenum sheet, core
It is equal that piece and positioning framework arrange quantity.
The chip can be igbt chip, FRD chips or other semiconductor chips, and the utility model embodiment is to this
Also do not limit.With reference to shown in Fig. 5 and Fig. 7, when chip 15 is igbt chip；First electrode molybdenum sheet 13 is colelctor electrode molybdenum sheet, the
Two electrode molybdenum slices 14 are emitter stage molybdenum sheet.Further, grid spring needle 17 is provided between the igbt chip and base 12
With pcb board 18, grid spring needle 17 be located between the igbt chip and pcb board 18, and with the igbt chip and pcb board 18
Contact；Grid lead wire 19 is also associated with pcb board 18.With reference to shown in Fig. 6 and Fig. 8, when chip 15 is FRD chips；First
Electrode molybdenum slice 13 is anode molybdenum sheet, and second electrode molybdenum sheet 14 is negative electrode molybdenum sheet.
So, compared to prior art, lead in the package structure of semiconductor device that the utility model embodiment is provided
After the lower surface that multiple first electrode molybdenum sheets are welded in advance lid, multiple second electrode molybdenum sheets are welded on into the upper table of base
Face so that first electrode molybdenum sheet and lid become an assembling entirety, second electrode molybdenum sheet becomes an assembling entirety with base,
Positioning framework and chip need to be only installed so in encapsulation process, then lid and base welding can be completed into device encapsulation, this
Sample reduces the encapsulation complexity of semiconductor devices, improves the production efficiency of semiconductor devices.Simultaneously as first electrode molybdenum
Piece is welded with lid, and second electrode molybdenum sheet is welded with base, and such layer has blocked first electrode molybdenum sheet and lid, and second
Directly contact between electrode molybdenum slice and base, that is, reduce the contact surface between chip and lid or base, thus reduces
The thermal resistance and conduction voltage drop of semiconductor devices, improves the heat-sinking capability of semiconductor devices.
Preferably, with reference to shown in Fig. 5 to Fig. 8, multiple positioning frameworks 16 are connected to form one structure, so can be reduced
Number of parts in package structure of semiconductor device, reduces packaging technology complexity, and improves the reliability of semiconductor devices.
Wherein, positioning framework 16 is made by insulating materials.In actual applications, typically from King making positioning framework
16。
Another embodiment of the utility model provides a kind of method for packing for above-mentioned encapsulating structure, as shown in figure 11, institute
Stating method for packing includes：
Step 111, multiple first electrode molybdenum sheets are welded on the lower surface of lid, by the welding of multiple second electrode molybdenum sheets
On the upper surface of base.
Step 112, by multiple positioning frameworks be arranged on base in.
Wherein, the positioning framework is typically made by insulating materials.In actual applications, can will be multiple described fixed
Position framework is connected to form one structure, can so reduce the number of parts in package structure of semiconductor device, reduces encapsulation work
Skill complexity, and improve the reliability of semiconductor devices.
Step 113, multiple chips are separately mounted in corresponding positioning framework.
The chip is igbt chip, FRD chips or other semiconductor chips.
Step 114, by lid and base Cold welding.
The method for packing of the package structure of semiconductor device that the utility model embodiment is provided, including first by multiple first
Electrode molybdenum slice is welded on the lower surface of lid, and multiple second electrode molybdenum sheets are welded on the upper surface of base；Then will be many
Individual positioning framework is arranged in the base；Then multiple chips are separately mounted in the corresponding positioning framework；Finally
By the lid and the base Cold welding.Compared to the semiconductor devices that prior art, the utility model embodiment are provided
It is electric by multiple second by the advance lower surface that multiple first electrode molybdenum sheets are welded on lid in the method for packing of encapsulating structure
Pole molybdenum sheet is welded on the upper surface of base so that first electrode molybdenum sheet and lid become an assembling entirety, second electrode molybdenum sheet
Become an assembling with base overall, positioning framework and chip only need to be installed so in encapsulation process, then by lid and base
Welding can complete device encapsulation, which decrease the encapsulation complexity of semiconductor devices, improve the production of semiconductor devices
Efficiency.Simultaneously as first electrode molybdenum sheet and lid are welded, second electrode molybdenum sheet is welded with base, and such layer has blocked the
Directly contact between one electrode molybdenum slice and lid, and second electrode molybdenum sheet and base, that is, reduce chip with lid or pipe
Contact surface between seat, thus the thermal resistance and conduction voltage drop of semiconductor devices is reduced, improve the heat radiation energy of semiconductor devices
Power.
The above, specific embodiment only of the present utility model, but protection domain of the present utility model do not limit to
In this, any those familiar with the art can readily occur in change in the technical scope that the utility model is disclosed
Or replace, all should cover within protection domain of the present utility model.Therefore, protection domain of the present utility model should be with the power
The protection domain that profit is required is defined.
Claims (7)
1. a kind of package structure of semiconductor device, including lid and base, the lid is placed on the base, and its feature exists
In,
The lower surface of the lid is welded with multiple first electrode molybdenum sheets, and the upper surface of the base is welded with multiple second electrodes
Molybdenum sheet, multiple second electrode molybdenum sheets are corresponded with multiple first electrode molybdenum sheets；
Also include multiple chips and multiple positioning frameworks, the positioning framework is used to position the chip；It is multiple described
Chip is corresponded with multiple first electrode molybdenum sheets；
The chip is located between the first electrode molybdenum sheet and the second electrode molybdenum sheet, and the chip is electric with described first
Pole molybdenum sheet and the second electrode molybdenum sheet are fitted.
2. encapsulating structure according to claim 1, it is characterised in that multiple positioning frameworks are connected to form one knot
Structure.
3. encapsulating structure according to claim 1, it is characterised in that the chip is igbt chip；The first electrode
Molybdenum sheet is colelctor electrode molybdenum sheet, and the second electrode molybdenum sheet is emitter stage molybdenum sheet.
4. encapsulating structure according to claim 1, it is characterised in that the chip is FRD chips；The first electrode molybdenum
Piece is anode molybdenum sheet, and the second electrode molybdenum sheet is negative electrode molybdenum sheet.
5. encapsulating structure according to claim 3, it is characterised in that be provided between the igbt chip and the base
Grid spring needle and pcb board, the grid spring needle be located between the igbt chip and the pcb board, and with the IGBT
Chip and the pcb board are contacted；Grid lead wire is also associated with the pcb board.
6. encapsulating structure according to claim 1, it is characterised in that the positioning framework is made by insulating materials.
7. encapsulating structure according to claim 6, it is characterised in that the insulating materials is King.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621265537.1U CN206163475U (en) | 2016-11-23 | 2016-11-23 | Semiconductor device packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621265537.1U CN206163475U (en) | 2016-11-23 | 2016-11-23 | Semiconductor device packaging structure |
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| Publication Number | Publication Date |
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| CN206163475U true CN206163475U (en) | 2017-05-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201621265537.1U Active CN206163475U (en) | 2016-11-23 | 2016-11-23 | Semiconductor device packaging structure |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107768357A (en) * | 2017-10-31 | 2018-03-06 | 华北电力大学 | A kind of power device for realizing internal series-connection |
| CN108091614A (en) * | 2016-11-23 | 2018-05-29 | 南方电网科学研究院有限责任公司 | Semiconductor device packaging structure and packaging method thereof |
| CN115206949A (en) * | 2022-07-13 | 2022-10-18 | 西安电子科技大学 | Vertical conductive type power semiconductor device double-sided compression joint packaging structure |
-
2016
- 2016-11-23 CN CN201621265537.1U patent/CN206163475U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108091614A (en) * | 2016-11-23 | 2018-05-29 | 南方电网科学研究院有限责任公司 | Semiconductor device packaging structure and packaging method thereof |
| CN107768357A (en) * | 2017-10-31 | 2018-03-06 | 华北电力大学 | A kind of power device for realizing internal series-connection |
| CN115206949A (en) * | 2022-07-13 | 2022-10-18 | 西安电子科技大学 | Vertical conductive type power semiconductor device double-sided compression joint packaging structure |
| CN115206949B (en) * | 2022-07-13 | 2023-09-29 | 西安电子科技大学 | Double-sided crimping packaging structure of vertical conduction type power semiconductor device |
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| GR01 | Patent grant | ||
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| TR01 | Transfer of patent right |
Effective date of registration: 20210628 Address after: 510700 3rd, 4th and 5th floors of building J1 and 3rd floor of building J3, No.11 Kexiang Road, Science City, Luogang District, Guangzhou City, Guangdong Province Patentee after: China South Power Grid International Co.,Ltd. Patentee after: ZHUZHOU CRRC TIMES ELECTRIC Co.,Ltd. Address before: 510080 West Tower 13-20 Floor, Shui Jungang 6 and 8 Dongfeng East Road, Yuexiu District, Guangzhou City, Guangdong Province Patentee before: China South Power Grid International Co.,Ltd. Patentee before: POWER GRID TECHNOLOGY RESEARCH CENTER. CHINA SOUTHERN POWER GRID Patentee before: ZHUZHOU CRRC TIMES ELECTRIC Co.,Ltd. |