CN205864386U - Local oscillator drive circuit based on phase inverter - Google Patents
Local oscillator drive circuit based on phase inverter Download PDFInfo
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- CN205864386U CN205864386U CN201620874714.XU CN201620874714U CN205864386U CN 205864386 U CN205864386 U CN 205864386U CN 201620874714 U CN201620874714 U CN 201620874714U CN 205864386 U CN205864386 U CN 205864386U
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Abstract
This utility model embodiment provides local oscillator drive circuit based on phase inverter.Local oscillator drive circuit based on phase inverter of the present utility model includes first input end, the second input, the first outfan, the second outfan, the first phase inverter and the second phase inverter, first phase inverter is electrically connected between first input end and the first outfan, second phase inverter is electrically connected between the second input and the second outfan, it is electrically connected with the 3rd phase inverter and the 4th phase inverter between first input end and the second outfan the most successively, between the second input and the first outfan, is electrically connected with the 5th phase inverter and hex inverter the most successively.By arranging the 3rd phase inverter and the 4th phase inverter between first input end and the second outfan, 5th phase inverter and hex inverter is set between the second input and the first outfan, use the method that common-mode noise is offset, enhance power supply and the noise inhibiting ability on ground, and make its robustness and stability be improved.
Description
Technical field
This utility model relates to Electronic Circuit of Communication field, drives in particular to a kind of local oscillator based on phase inverter
Circuit.
Background technology
In radio-frequency transmitter circuit, local oscillator drive circuit be must an obligato part, for by phaselocked loop export
High-quality clock signal is amplified and gives mixer, either the lower mixting circuit of receiver or the uppermixing of transmitter
Circuit, is required for this local oscillator drive circuit.Generally local oscillator drive circuit can be divided into based on current mode logic circuit and based on
The big class of drive circuit two of phase inverter, in traditional handicraft, local oscillator drive circuit based on current mode logic circuit possesses speed
Advantage, but under the background that current below 130nm CMOS technology becomes RF transceiver prevailing technology, basis based on phase inverter
The use of drive circuit of shaking is more universal, and on the one hand this be because device speed after technique promotes and improve constantly, separately
On the one hand it is that local oscillator drive circuit based on phase inverter often has the amplitude of oscillation greatly, advantage low in energy consumption.The phase inverter of prior art
Module gain is too high, and very sensitive to power supply and common-mode noise on the ground, the meeting quilt when noise exceedes threshold value on power supply
Circuit itself amplifies, thus forms concussion so that circuit loses normal function.
Utility model content
In view of this, the purpose of this utility model embodiment is to provide a kind of local oscillator drive circuit based on phase inverter,
Power supply and the impact of ground node work mode noise can be overcome when circuit is worked, increase robustness and the stability of circuit.
A kind of based on phase inverter the local oscillator drive circuit that this utility model embodiment provides, including first input end, the
Two inputs, the first outfan, the second outfan, the first phase inverter and the second phase inverter, described first phase inverter electrical connection
Between described first input end and described first outfan, described second phase inverter is electrically connected to described second input and institute
State between the second outfan, between described first input end and described second outfan, be electrically connected with the 3rd phase inverter the most successively
With the 4th phase inverter, between described second input and described first outfan, it is electrically connected with the 5th phase inverter and the most successively
Hex inverter.
Preferably, described first phase inverter includes the first N-type MOS transistor and the first N-type MOS transistor, a described N
The grid of the grid of type MOS transistor and described first N-type MOS transistor connects, and described first input end is connected to described the
Between grid and the grid of described first N-type MOS transistor of one N-type MOS transistor, the leakage of described first N-type MOS transistor
The drain electrode of pole and described first N-type MOS transistor connects, and the source electrode of described first N-type MOS transistor is connected with power supply, described
The source ground of the first N-type MOS transistor.
Preferably, described first phase inverter also includes the first electric capacity and the first resistance, one end of described first electric capacity and institute
Stating first input end to connect, the other end of described first electric capacity is connected to the grid and described the of described first N-type MOS transistor
Between the grid of one N-type MOS transistor, one end of described first resistance be connected to described first N-type MOS transistor grid and
Between the grid of described first N-type MOS transistor, the other end of described first resistance is connected to described first N-type MOS transistor
Drain electrode and the drain electrode of described first N-type MOS transistor between.
Preferably, after the drain electrode of described first N-type MOS transistor and the drain electrode of described first N-type MOS transistor connect,
It is connected with described first outfan.
Preferably, described second phase inverter includes the second N-type MOS transistor and the second N-type MOS transistor, described 2nd N
The grid of the grid of type MOS transistor and described second N-type MOS transistor connects, and described second input is connected to described the
Between grid and the grid of described second N-type MOS transistor of two N-type MOS transistors, the leakage of described second N-type MOS transistor
The drain electrode of pole and described second N-type MOS transistor connects, and the source electrode of described second N-type MOS transistor is connected with power supply, described
The source ground of the second N-type MOS transistor, the drain electrode of described second N-type MOS transistor and described second N-type MOS transistor
After drain electrode connects, it is connected with described second outfan.
Preferably, described second phase inverter also includes the second electric capacity and the second resistance, one end of described second electric capacity and institute
Stating the second input to connect, the other end of described second electric capacity is connected to the grid and described the of described second N-type MOS transistor
Between the grid of two N-type MOS transistor, one end of described second resistance be connected to described second N-type MOS transistor grid and
Between the grid of described second N-type MOS transistor, the other end of described second resistance is connected to described second N-type MOS transistor
Drain electrode and the drain electrode of described second N-type MOS transistor between.
Preferably, described 3rd phase inverter includes the 3rd N-type MOS transistor and the 7th N-type MOS transistor, the 3rd p-type
The grid of MOS transistor and drain electrode are all connected with power supply, the source electrode of described 3rd N-type MOS transistor and described 7th p-type MOS
The drain electrode of transistor connects, and the grid of described 7th N-type MOS transistor is connected with described first input end, described 7th p-type
The source ground of MOS transistor.
Preferably, described 4th phase inverter includes the 4th N-type MOS transistor and the 4th N-type MOS transistor, described 4th N
The grid of type MOS transistor and the grid of described 4th N-type MOS transistor are all with the source electrode of described 3rd N-type MOS transistor even
Connecing, the drain electrode of described 4th N-type MOS transistor and the drain electrode of described 4th N-type MOS transistor connect, described second outfan
It is connected between drain electrode and the drain electrode of described 4th N-type MOS transistor of described 4th N-type MOS transistor, described 4th N-type
The source electrode of MOS transistor is connected with described power supply, the source ground of described 4th N-type MOS transistor.
Preferably, described 5th phase inverter includes the 5th N-type MOS transistor and the 8th N-type MOS transistor, the 5th p-type
The grid of MOS transistor and drain electrode are all connected with power supply, the source electrode of described 5th N-type MOS transistor and described 8th p-type MOS
The drain electrode of transistor connects, and the grid of described 8th N-type MOS transistor is connected with described second input, described 8th p-type
The source ground of MOS transistor.
Preferably, described hex inverter includes the 6th N-type MOS transistor and the 6th N-type MOS transistor, described 6th N
The grid of type MOS transistor and the grid of described 6th N-type MOS transistor are all with the source electrode of described 5th N-type MOS transistor even
Connecing, the drain electrode of described 6th N-type MOS transistor and the drain electrode of described 6th N-type MOS transistor connect, described first outfan
It is connected between drain electrode and the drain electrode of described 6th N-type MOS transistor of described 6th N-type MOS transistor, described 6th N-type
The source electrode of MOS transistor is connected with described power supply, the source ground of described 6th N-type MOS transistor.
Compared with prior art, local oscillator drive circuit based on phase inverter of the present utility model by first input end with
3rd phase inverter and the 4th phase inverter are set between the second outfan, between the second input and the first outfan, arrange the 5th
Phase inverter and hex inverter, the method using common-mode noise to offset, enhance power supply and the noise inhibiting ability on ground, and make
Its robustness and stability are improved.
For making above-mentioned purpose of the present utility model, feature and advantage to become apparent, preferred embodiment cited below particularly, and
Coordinate appended accompanying drawing, be described in detail below.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of this utility model embodiment, will use required in embodiment below
Accompanying drawing be briefly described, it will be appreciated that the following drawings illustrate only some embodiment of the present utility model, the most should be by
Regard the restriction to scope as, for those of ordinary skill in the art, on the premise of not paying creative work, also may be used
To obtain other relevant accompanying drawings according to these accompanying drawings.
The theory diagram of the local oscillator drive circuit based on phase inverter that Fig. 1 provides for this utility model preferred embodiment.
The structural representation of the local oscillator drive circuit based on phase inverter that Fig. 2 provides for this utility model preferred embodiment.
Fig. 3 is the function relation figure of noise figure and yield value.
Main element symbol description
First input end 10；Second input 20；First outfan 30；Second outfan 40；First phase inverter 100；The
One N-type MOS transistor 101；First N-type MOS transistor 102；First electric capacity 103；First resistance 104；Second phase inverter 200；
Second N-type MOS transistor 201；Second N-type MOS transistor 202；Second electric capacity 203；Second resistance 204；3rd phase inverter
300；3rd N-type MOS transistor 301；7th N-type MOS transistor 302；4th phase inverter 400；4th N-type MOS transistor
401；4th N-type MOS transistor 402；5th phase inverter 500；5th N-type MOS transistor 501；8th N-type MOS transistor
502；Hex inverter 600；6th N-type MOS transistor 601；6th N-type MOS transistor 602.
Detailed description of the invention
Below in conjunction with accompanying drawing in this utility model embodiment, the technical scheme in this utility model embodiment is carried out clearly
Chu, it is fully described by, it is clear that described embodiment is only a part of embodiment of this utility model rather than whole realities
Execute example.Generally can be next with various different configurations with the assembly of this utility model embodiment illustrated described in accompanying drawing herein
Arrange and design.Therefore, below the detailed description of the embodiment of the present utility model provided in the accompanying drawings is not intended to limit
Claimed scope of the present utility model, but it is merely representative of selected embodiment of the present utility model.Based on this utility model
Embodiment, the every other embodiment that those skilled in the art are obtained on the premise of not making creative work, all
Belong to the scope of this utility model protection.
It should also be noted that similar label and letter represent similar terms, therefore, the most a certain Xiang Yi in following accompanying drawing
Individual accompanying drawing is defined, then need not it be defined further and explains in accompanying drawing subsequently.Meanwhile, new in this practicality
In the description of type, term " first ", " second " etc. are only used for distinguishing and describe, and it is not intended that indicate or imply relatively important
Property.
Refer to Fig. 1, be the principle of the local oscillator drive circuit based on phase inverter that this utility model preferred embodiment provides
Block diagram.The local oscillator drive circuit based on phase inverter that this utility model preferred embodiment provides includes first input end 10, second
Input the 20, first outfan the 30, second outfan the 40, first phase inverter the 100, second phase inverter the 200, the 3rd phase inverter 300,
4th phase inverter the 400, the 5th phase inverter 500 and hex inverter 600.
Described first phase inverter 100 is electrically connected between described first input end 10 and described first outfan 30, described
Second phase inverter 200 is electrically connected between described second input 20 and described second outfan 40, described 3rd phase inverter 300
And the 4th phase inverter 400 be in turn, electrically connected between described first input end 10 and described second outfan 40, described 5th anti-
Phase device 500 and hex inverter 600 are in turn, electrically connected between described second input 20 and described first outfan 30.
Described first input end 10 and the second input 20 are respectively two input ports of Differential Input, described first defeated
Go out end 30 and two output ports of the second outfan 40 respectively difference output.Described first phase inverter 100 and described second
Phase inverter 200 is used for realizing drive amplification function.Described 3rd phase inverter the 300, the 4th phase inverter 400 is anti-phase for offsetting second
The noise of device 200；Described 5th phase inverter 500, hex inverter 600 are for offsetting the noise of the first phase inverter 100.
General, interference signal is power supply or the common-mode noise on ground, at first input end 10 and the second outfan 40
Interference signal is identical.Because if power supply has a noise, then for the first phase inverter and the second phase inverter 200, he
Power supply be exactly to receive the same interference, so interference signal is identical.
Such as, an interference letter all it is superimposed with when the input signal of described first input end 10 and described second input 20
Number vcm+, according to the principle of phase inverter, the outfan of described first phase inverter 100 is vcm-, but interference signal is anti-through the 5th
After phase device 500 and hex inverter 600, the signal that the outfan at hex inverter 600 exports is vcm+, the first outfan 30
The interference signal vcm never obtained with path-And vcm+Can cancel out each other, so that the common mode of output is suppressed.With
Reason, the interference signal never obtained with path at the second outfan 40 can also be offset.
Refer to Fig. 2, be the structure of the local oscillator drive circuit based on phase inverter that this utility model preferred embodiment provides
Schematic diagram.Illustrating the concrete structure of the theory diagram shown in Fig. 1 in figure, in the present embodiment, described first phase inverter 100 includes
First N-type metal-oxide semiconductor (MOS) (metal oxide semiconductor, MOS) field-effect transistor the 101, first p-type
MOS transistor the 102, first electric capacity 103 and the first resistance 104.
The grid of described first N-type MOS transistor 101 and the grid of described first N-type MOS transistor 102 connect, described
One end of first electric capacity 103 is connected with described first input end 10, and the other end of described first electric capacity 103 is connected to described first
Between grid and the grid of described first N-type MOS transistor 102 of N-type MOS transistor 101.Described first N-type MOS transistor
101 drain electrode and described first N-type MOS transistor 102 drain electrode connect, the source electrode of described first N-type MOS transistor 101 with
Power supply connects, the source ground of described first N-type MOS transistor 102, and one end of described first resistance 104 is connected to described the
Between grid and the grid of described first N-type MOS transistor 102 of one N-type MOS transistor 101, described first resistance 104
The other end is connected between the drain electrode of described first N-type MOS transistor 101 and the drain electrode of described first N-type MOS transistor 102.
After the drain electrode of described first N-type MOS transistor 101 and the drain electrode of described first N-type MOS transistor 102 connect, with
Described first outfan 30 connects.
Described second phase inverter 200 includes second N-type MOS transistor the 201, second N-type MOS transistor the 202, second electric capacity
203 and second resistance 204, the grid of described second N-type MOS transistor 201 and the grid of described second N-type MOS transistor 202
Pole connects, and one end of described second electric capacity 203 is connected with described second input 20, and the other end of described second electric capacity 203 is even
It is connected between the grid of described second N-type MOS transistor 201 and the grid of described second N-type MOS transistor 202, described second
The drain electrode of N-type MOS transistor 201 and the drain electrode of described second N-type MOS transistor 202 connect, described second N-type MOS transistor
The source electrode of 201 is connected with power supply, the source ground of described second N-type MOS transistor 202, and one end of described second resistance 204 is even
It is connected between the grid of described second N-type MOS transistor 201 and the grid of described second N-type MOS transistor 202, described second
The other end of resistance 204 is connected to the drain electrode of described second N-type MOS transistor 201 and described second N-type MOS transistor 202
Between drain electrode.
After the drain electrode of described second N-type MOS transistor 201 and the drain electrode of described second N-type MOS transistor 202 connect, with
Described second outfan 40 connects.
Wherein, described first electric capacity 103 and described second electric capacity 203 are respectively used to cut off described first input end 10 and institute
State the DC current of the second input 20.Ac small signal can be input to described first N-type MOS crystal from first input end 10
The grid of pipe 101 and the grid of described first N-type MOS transistor 102, amplify output to described first outfan through anti-phase
30.Ac small signal can be input to the grid of described second N-type MOS transistor 201 and described 2nd P from the second input 20
The grid of type MOS transistor 202, amplifies output to described second outfan 40 through anti-phase.
Described first resistance 104 and described second resistance 204 are respectively used to described first phase inverter 100 and described second anti-
Phase device 200 provides the DC point of automatic biasing, the grid of such first N-type MOS transistor 101, the first N-type MOS transistor
The grid of grid, the grid of the second N-type MOS transistor 201 and described second N-type MOS transistor 202 of 102 could bias
In rational DC level.
Described 3rd phase inverter includes the 3rd N-type MOS transistor 301 and the 7th N-type MOS transistor 302, the 3rd p-type MOS
The grid of transistor 301 and drain electrode are all connected with power supply, the source electrode of described 3rd N-type MOS transistor 301 and described 7th p-type
The drain electrode of MOS transistor 302 connects, and the grid of described 7th N-type MOS transistor 302 is connected with described first input end 10, institute
State the source ground of the 7th N-type MOS transistor 302.
Described 4th phase inverter 400 includes the 4th N-type MOS transistor 401 and the 4th N-type MOS transistor 402, described
The grid of four N-type MOS transistors 401 and the grid of described 4th N-type MOS transistor 402 all with described 3rd p-type MOS crystal
The source electrode of pipe 301 connects, the drain electrode of described 4th N-type MOS transistor 401 and the drain electrode of described 4th N-type MOS transistor 402
Connecting, and be connected with described second outfan 40, the source electrode of described 4th N-type MOS transistor 401 is connected with described power supply, institute
State the source ground of the 4th N-type MOS transistor 402.
Described 3rd phase inverter 300 and described 4th phase inverter 400 are for for enter the interference signal of the first outfan 30
Twice anti-phase adjustment of row, the outfan of the 4th phase inverter 400 is connected with the outfan of described second phase inverter 200, due to
One outfan 30 is identical with the interference signal of described second outfan 40, the anti-phase interference letter that can be exported by the second phase inverter 200
Number offset, the common-mode noise on power supply can be suppressed.
Described 5th phase inverter includes the 5th N-type MOS transistor 501 and the 8th N-type MOS transistor 502, the 5th p-type MOS
The grid of transistor 501 and drain electrode are all connected with power supply, the source electrode of described 5th N-type MOS transistor 501 and described 8th p-type
The drain electrode of MOS transistor 502 connects, and the grid of described 8th N-type MOS transistor 502 is connected with described second input 20, institute
State the source ground of the 8th N-type MOS transistor 502.
Described hex inverter 600 includes the 6th N-type MOS transistor 601 and the 6th N-type MOS transistor 602, described
The grid of six N-type MOS transistors 601 and the grid of described 6th N-type MOS transistor 602 all with described 5th p-type MOS crystal
The source electrode of pipe 501 connects, the drain electrode of described 6th N-type MOS transistor 601 and the drain electrode of described 6th N-type MOS transistor 602
Connecting, and be connected with described first outfan 30, the source electrode of described 6th N-type MOS transistor 601 is connected with described power supply, institute
State the source ground of the 6th N-type MOS transistor 602.
Described 5th phase inverter 500 and described hex inverter 600 are for for enter the interference signal of the second outfan 40
Twice anti-phase adjustment of row, the outfan of hex inverter 600 is connected with the outfan of described first phase inverter 100, due to
One outfan 30 is identical with the interference signal of described second outfan 40, the anti-phase interference letter that can be exported by the first phase inverter 100
Number offset, the common-mode noise on power supply can be suppressed.
Refer to Fig. 3, be the function relation figure of noise figure and yield value.Wherein curve A be shown in Fig. 1 based on phase inverter
The relation curve of local oscillator drive circuit.Curve B is to remove described in the local oscillator drive circuit based on phase inverter shown in Fig. 1
Three phase inverter the 300, the 4th phase inverter the 400, the 5th phase inverter 500 and the relation curves of hex inverter 600.
Wherein, Gain represents the size of noisiness, and dB is the unit value of noisiness.Freq is yield value, and GHz is yield value
Unit.By B curve it can be seen that power supply node is postiive gain to output node, and there is maximum in frequency 1-10GHz
The gain of 33dB.By A curve it can be seen that in the range of tens of Hertz, PSRR is negative gain, maximum less than-
7.5dB.Illustrate that the common-mode noise on power supply is suppressed rather than amplifies.In the case of multiple drive power circuit connects, altogether
Mode noise can further be suppressed, and robustness and stability will be greatly improved.
Thus, local oscillator drive circuit based on phase inverter of the present utility model is by first input end 10 and described second
Two phase inverters are set between outfan 40, arrange between the second input 20 and described first outfan 30 two anti-phase
Device, the method using common-mode noise to offset, enhance power supply and the noise inhibiting ability on ground, and make its robustness and stability
It is improved.
In several embodiments provided herein, it should be understood that disclosed apparatus and method, it is also possible to pass through
Other mode realizes.Device embodiment described above is only schematically, such as, and the flow chart in accompanying drawing and block diagram
Show the system frame in the cards of the device according to multiple embodiments of the present utility model, method and computer program product
Structure, function and operation.In this, each square frame in flow chart or block diagram can represent a module, program segment or code
A part, the part of described module, program segment or code comprises one or more logic function for realizing regulation
Executable instruction.It should also be noted that at some as in the implementation replaced, the function marked in square frame can also be with not
The order being same as being marked in accompanying drawing occurs.Such as, two continuous print square frames can essentially perform substantially in parallel, and they have
Time can also perform in the opposite order, this is depending on involved function.It is also noted that in block diagram and/or flow chart
Each square frame and block diagram and/or flow chart in the combination of square frame, can be with performing the function of regulation or the special of action
Hardware based system realize, or can realize with the combination of specialized hardware with computer instruction.
It addition, each functional module in each embodiment of this utility model can integrate formed one independent
Part, it is also possible to be modules individualism, it is also possible to two or more modules are integrated to form an independent part.
It should be noted that in this article, the relational terms of such as first and second or the like is used merely to a reality
Body or operation separate with another entity or operating space, and deposit between not necessarily requiring or imply these entities or operating
Relation or order in any this reality.And, term " includes ", " comprising " or its any other variant are intended to
Comprising of nonexcludability, so that include that the process of a series of key element, method, article or equipment not only include that those are wanted
Element, but also include other key elements being not expressly set out, or also include for this process, method, article or equipment
Intrinsic key element.In the case of there is no more restriction, statement " including ... " key element limited, it is not excluded that
Including process, method, article or the equipment of described key element there is also other identical element.
The foregoing is only preferred embodiment of the present utility model, be not limited to this utility model, for this
For the technical staff in field, this utility model can have various modifications and variations.All in spirit of the present utility model and principle
Within, any modification, equivalent substitution and improvement etc. made, within should be included in protection domain of the present utility model.It should be noted that
Arrive: similar label and letter represent similar terms in following accompanying drawing, therefore, are determined in the most a certain Xiang Yi accompanying drawing
Justice, then need not define it further and explain in accompanying drawing subsequently.
The above, detailed description of the invention the most of the present utility model, but protection domain of the present utility model does not limit to
In this, any those familiar with the art, in the technical scope that this utility model discloses, can readily occur in change
Or replace, all should contain within protection domain of the present utility model.Therefore, protection domain of the present utility model should be described with power
The protection domain that profit requires is as the criterion.
Claims (10)
1. a local oscillator drive circuit based on phase inverter, it is characterised in that include first input end, the second input, first
Outfan, the second outfan, the first phase inverter and the second phase inverter, described first phase inverter is electrically connected to described first input
Hold between described first outfan, described second phase inverter be electrically connected to described second input and described second outfan it
Between, it is electrically connected with the 3rd phase inverter and the 4th phase inverter the most successively between described first input end and described second outfan,
The 5th phase inverter and hex inverter it is electrically connected with the most successively between described second input and described first outfan.
Local oscillator drive circuit based on phase inverter the most according to claim 1, it is characterised in that described first phase inverter bag
Include the first N-type MOS transistor and the first N-type MOS transistor, the grid of described first N-type MOS transistor and described first p-type
The grid of MOS transistor connects, and described first input end is connected to the grid of described first N-type MOS transistor and a described P
Between the grid of type MOS transistor, the drain electrode of described first N-type MOS transistor and the drain electrode of described first N-type MOS transistor
Connecting, the source electrode of described first N-type MOS transistor is connected with power supply, the source ground of described first N-type MOS transistor.
Local oscillator drive circuit based on phase inverter the most according to claim 2, it is characterised in that described first phase inverter is also
Including the first electric capacity and the first resistance, one end of described first electric capacity is connected with described first input end, described first electric capacity
The other end is connected between grid and the grid of described first N-type MOS transistor of described first N-type MOS transistor, and described
One end of one resistance is connected between grid and the grid of described first N-type MOS transistor of described first N-type MOS transistor,
The other end of described first resistance is connected to the drain electrode of described first N-type MOS transistor and described first N-type MOS transistor
Between drain electrode.
Local oscillator drive circuit based on phase inverter the most according to claim 2, it is characterised in that described first N-type MOS is brilliant
After the drain electrode of body pipe and the drain electrode of described first N-type MOS transistor connect, it is connected with described first outfan.
Local oscillator drive circuit based on phase inverter the most according to claim 1, it is characterised in that described second phase inverter bag
Include the second N-type MOS transistor and the second N-type MOS transistor, the grid of described second N-type MOS transistor and described second p-type
The grid of MOS transistor connects, and described second input is connected to the grid of described second N-type MOS transistor and described 2nd P
Between the grid of type MOS transistor, the drain electrode of described second N-type MOS transistor and the drain electrode of described second N-type MOS transistor
Connecting, the source electrode of described second N-type MOS transistor is connected with power supply, and the source ground of described second N-type MOS transistor is described
After the drain electrode of the second N-type MOS transistor and the drain electrode of described second N-type MOS transistor connect, with described second outfan even
Connect.
Local oscillator drive circuit based on phase inverter the most according to claim 5, it is characterised in that described second phase inverter is also
Including the second electric capacity and the second resistance, one end of described second electric capacity is connected with described second input, described second electric capacity
The other end is connected between grid and the grid of described second N-type MOS transistor of described second N-type MOS transistor, and described
One end of two resistance is connected between grid and the grid of described second N-type MOS transistor of described second N-type MOS transistor,
The other end of described second resistance is connected to the drain electrode of described second N-type MOS transistor and described second N-type MOS transistor
Between drain electrode.
Local oscillator drive circuit based on phase inverter the most according to claim 1, it is characterised in that described 3rd phase inverter bag
Include the 3rd N-type MOS transistor and the 7th N-type MOS transistor, the grid of the 3rd N-type MOS transistor and drain electrode all with power supply even
Connecing, the source electrode of described 3rd N-type MOS transistor is connected with the drain electrode of described 7th N-type MOS transistor, described 7th p-type MOS
The grid of transistor is connected with described first input end, the source ground of described 7th N-type MOS transistor.
Local oscillator drive circuit based on phase inverter the most according to claim 7, it is characterised in that described 4th phase inverter bag
Include the 4th N-type MOS transistor and the 4th N-type MOS transistor, the grid of described 4th N-type MOS transistor and described 4th p-type
The grid of MOS transistor all source electrodes with described 3rd N-type MOS transistor are connected, the drain electrode of described 4th N-type MOS transistor
Drain electrode with described 4th N-type MOS transistor connects, and described second outfan is connected to the leakage of described 4th N-type MOS transistor
Between the drain electrode of pole and described 4th N-type MOS transistor, the source electrode of described 4th N-type MOS transistor is connected with described power supply,
The source ground of described 4th N-type MOS transistor.
Local oscillator drive circuit based on phase inverter the most according to claim 1, it is characterised in that described 5th phase inverter bag
Include the 5th N-type MOS transistor and the 8th N-type MOS transistor, the grid of the 5th N-type MOS transistor and drain electrode all with power supply even
Connecing, the source electrode of described 5th N-type MOS transistor is connected with the drain electrode of described 8th N-type MOS transistor, described 8th p-type MOS
The grid of transistor is connected with described second input, the source ground of described 8th N-type MOS transistor.
Local oscillator drive circuit based on phase inverter the most according to claim 9, it is characterised in that described hex inverter
Including the 6th N-type MOS transistor and the 6th N-type MOS transistor, the grid of described 6th N-type MOS transistor and described 6th P
The grid of type MOS transistor all source electrodes with described 5th N-type MOS transistor are connected, the leakage of described 6th N-type MOS transistor
The drain electrode of pole and described 6th N-type MOS transistor connects, and described first outfan is connected to described 6th N-type MOS transistor
Between drain electrode and the drain electrode of described 6th N-type MOS transistor, the source electrode of described 6th N-type MOS transistor is with described power supply even
Connect, the source ground of described 6th N-type MOS transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620874714.XU CN205864386U (en) | 2016-08-12 | 2016-08-12 | Local oscillator drive circuit based on phase inverter |
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| CN201620874714.XU CN205864386U (en) | 2016-08-12 | 2016-08-12 | Local oscillator drive circuit based on phase inverter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106130535A (en) * | 2016-08-12 | 2016-11-16 | 深圳市蓝狮微电子有限公司 | Local oscillator drive circuit based on phase inverter |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106130535A (en) * | 2016-08-12 | 2016-11-16 | 深圳市蓝狮微电子有限公司 | Local oscillator drive circuit based on phase inverter |
| CN106130535B (en) * | 2016-08-12 | 2023-06-02 | 深圳市蓝狮微电子有限公司 | Local oscillator drive circuit based on phase inverter |
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Granted publication date: 20170104 Termination date: 20180812 |